JP3942495B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP3942495B2
JP3942495B2 JP2002181809A JP2002181809A JP3942495B2 JP 3942495 B2 JP3942495 B2 JP 3942495B2 JP 2002181809 A JP2002181809 A JP 2002181809A JP 2002181809 A JP2002181809 A JP 2002181809A JP 3942495 B2 JP3942495 B2 JP 3942495B2
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Prior art keywords
semiconductor chip
adhesive tape
semiconductor
chip
electrically connected
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JP2002181809A
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Japanese (ja)
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JP2004031432A5 (enExample
JP2004031432A (ja
Inventor
弘倫 松嶋
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Renesas Technology Corp
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Renesas Technology Corp
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Priority to JP2002181809A priority Critical patent/JP3942495B2/ja
Priority to US10/348,013 priority patent/US6984882B2/en
Publication of JP2004031432A publication Critical patent/JP2004031432A/ja
Publication of JP2004031432A5 publication Critical patent/JP2004031432A5/ja
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
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US10/348,013 US6984882B2 (en) 2002-06-21 2003-01-22 Semiconductor device with reduced wiring paths between an array of semiconductor chip parts

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US8339514B2 (en) 2008-09-03 2012-12-25 Sony Corporation Modular flexible software architecture for TV
US8304854B2 (en) * 2008-11-13 2012-11-06 Samsung Electro-Mechanics Co., Ltd. Semiconductor integrated circuit chip, multilayer chip capacitor and semiconductor integrated circuit chip package
CN112397630A (zh) * 2019-08-13 2021-02-23 光宝光电(常州)有限公司 发光装置
US11710802B2 (en) 2019-08-13 2023-07-25 Lite-On Opto Technology (Changzhou) Co., Ltd. Sensing device
CN120674385A (zh) * 2024-03-19 2025-09-19 奥特斯奥地利科技与系统技术有限公司 封装件及其制造方法、以及封装件的用于高频应用的用途

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US5060052A (en) * 1990-09-04 1991-10-22 Motorola, Inc. TAB bonded semiconductor device having off-chip power and ground distribution
US5225633A (en) * 1991-10-04 1993-07-06 The United States Of America As Represented By The Secretary Of The Air Force Bridge chip interconnect system
JPH06204393A (ja) 1992-12-28 1994-07-22 Kawasaki Steel Corp 半導体装置
JP2897696B2 (ja) * 1995-09-07 1999-05-31 日本電気株式会社 半導体モジュール
JPH11145374A (ja) 1997-11-06 1999-05-28 Nec Ic Microcomput Syst Ltd 半導体チップの接続方法および半導体集積回路
KR100319608B1 (ko) * 1999-03-09 2002-01-05 김영환 적층형 반도체 패키지 및 그 제조방법
JP2001111192A (ja) 1999-10-13 2001-04-20 Toshiba Corp 電子部品及びその製造方法、電子機器及び超音波センサ部品
JP3495305B2 (ja) * 2000-02-02 2004-02-09 Ｎｅｃエレクトロニクス株式会社 半導体装置及び半導体モジュール
TW459361B (en) * 2000-07-17 2001-10-11 Siliconware Precision Industries Co Ltd Three-dimensional multiple stacked-die packaging structure
JP2002184934A (ja) * 2000-12-13 2002-06-28 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
KR100364635B1 (ko) * 2001-02-09 2002-12-16 삼성전자 주식회사 칩-레벨에 형성된 칩 선택용 패드를 포함하는 칩-레벨3차원 멀티-칩 패키지 및 그 제조 방법
JP4790157B2 (ja) * 2001-06-07 2011-10-12 ルネサスエレクトロニクス株式会社 半導体装置

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