JP3939858B2 - 同期型ｄｒａｍのアクセス方法、インタフェース回路、及び、半導体集積回路装置 - Google Patents

同期型ｄｒａｍのアクセス方法、インタフェース回路、及び、半導体集積回路装置 Download PDF

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JP3939858B2
JP3939858B2 JP15768498A JP15768498A JP3939858B2 JP 3939858 B2 JP3939858 B2 JP 3939858B2 JP 15768498 A JP15768498 A JP 15768498A JP 15768498 A JP15768498 A JP 15768498A JP 3939858 B2 JP3939858 B2 JP 3939858B2
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address
instruction
bank
signal
circuit
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JPH11353874A5 (enExample
JPH11353874A (ja
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靖訓 稲垣
正志 都築
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Fujitsu Ltd
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Fujitsu Ltd
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JP15768498A 1998-06-05 1998-06-05 同期型ｄｒａｍのアクセス方法、インタフェース回路、及び、半導体集積回路装置 Expired - Fee Related JP3939858B2 (ja)

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JP15768498A JP3939858B2 (ja) 1998-06-05 1998-06-05 同期型ｄｒａｍのアクセス方法、インタフェース回路、及び、半導体集積回路装置

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JP15768498A JP3939858B2 (ja) 1998-06-05 1998-06-05 同期型ｄｒａｍのアクセス方法、インタフェース回路、及び、半導体集積回路装置

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JPH11353874A JPH11353874A (ja) 1999-12-24
JPH11353874A5 JPH11353874A5 (enExample) 2005-02-24
JP3939858B2 true JP3939858B2 (ja) 2007-07-04

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JP15768498A Expired - Fee Related JP3939858B2 (ja) 1998-06-05 1998-06-05 同期型ｄｒａｍのアクセス方法、インタフェース回路、及び、半導体集積回路装置

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4524439B2 (ja) * 2000-03-30 2010-08-18 ラウンド ロック リサーチ、エルエルシー ゼロレイテンシ機能、ゼロバスターンアラウンド機能を有するシンクロナスフラッシュメモリ
JP2002244920A (ja) * 2001-02-15 2002-08-30 Oki Electric Ind Co Ltd Ｄｒａｍインターフェース回路
JP6418983B2 (ja) * 2015-03-05 2018-11-07 キヤノン株式会社 メモリのアクセス制御装置、その制御方法、および、プログラム
CN106710624B (zh) * 2017-01-06 2024-04-09 西安紫光国芯半导体有限公司 一种dram锤压侦测电路及方法
CN113383317B (zh) * 2019-01-31 2023-07-18 华为技术有限公司 一种处理装置、方法及相关设备

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