JP3923248B2 - 回路基板への電子部品の実装方法及び回路基板 - Google Patents

回路基板への電子部品の実装方法及び回路基板 Download PDF

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Publication number
JP3923248B2
JP3923248B2 JP2000330981A JP2000330981A JP3923248B2 JP 3923248 B2 JP3923248 B2 JP 3923248B2 JP 2000330981 A JP2000330981 A JP 2000330981A JP 2000330981 A JP2000330981 A JP 2000330981A JP 3923248 B2 JP3923248 B2 JP 3923248B2
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Japan
Prior art keywords
circuit board
chip
electronic component
electrode
thermosetting resin
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Expired - Fee Related
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JP2000330981A
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English (en)
Japanese (ja)
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JP2001185580A (ja
JP2001185580A5 (enExample
Inventor
一人 西田
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Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Priority to JP2000330981A priority Critical patent/JP3923248B2/ja
Publication of JP2001185580A publication Critical patent/JP2001185580A/ja
Publication of JP2001185580A5 publication Critical patent/JP2001185580A5/ja
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  • Wire Bonding (AREA)
JP2000330981A 1996-12-27 2000-10-30 回路基板への電子部品の実装方法及び回路基板 Expired - Fee Related JP3923248B2 (ja)

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JP8-350738 1996-12-27
JP35073896 1996-12-27
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KR100604334B1 (ko) * 2003-11-25 2006-08-08 (주)케이나인 플립칩 패키징 공정에서 접합력이 향상된 플립칩 접합 방법
KR100905642B1 (ko) 2007-12-13 2009-06-30 삼성전기주식회사 칩 내장형 인쇄회로기판 및 그 제조방법
JP5104687B2 (ja) * 2008-09-19 2012-12-19 日本電気株式会社 接合シート及び電子回路装置並びに製造方法
CN112486892B (zh) * 2020-12-15 2024-07-26 泰和电路科技（惠州）有限公司 邦定ic管控计算器的计算方法
CN114823648A (zh) * 2021-01-28 2022-07-29 成都辰显光电有限公司 显示面板及显示装置

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