JP3916931B2 - 電圧発生回路、レベルシフト回路及び半導体装置 - Google Patents

電圧発生回路、レベルシフト回路及び半導体装置 Download PDF

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Publication number
JP3916931B2
JP3916931B2 JP2001353576A JP2001353576A JP3916931B2 JP 3916931 B2 JP3916931 B2 JP 3916931B2 JP 2001353576 A JP2001353576 A JP 2001353576A JP 2001353576 A JP2001353576 A JP 2001353576A JP 3916931 B2 JP3916931 B2 JP 3916931B2
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JP
Japan
Prior art keywords
voltage
channel mos
side power
level
power source
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2001353576A
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English (en)
Japanese (ja)
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JP2003152525A5 (enExample
JP2003152525A (ja
Inventor
久雄 鈴木
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Fujitsu Ltd
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Fujitsu Ltd
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Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2001353576A priority Critical patent/JP3916931B2/ja
Priority to US10/103,761 priority patent/US6621322B2/en
Priority to KR1020020021124A priority patent/KR100812878B1/ko
Publication of JP2003152525A publication Critical patent/JP2003152525A/ja
Publication of JP2003152525A5 publication Critical patent/JP2003152525A5/ja
Application granted granted Critical
Publication of JP3916931B2 publication Critical patent/JP3916931B2/ja
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Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP2001353576A 2001-11-19 2001-11-19 電圧発生回路、レベルシフト回路及び半導体装置 Expired - Fee Related JP3916931B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001353576A JP3916931B2 (ja) 2001-11-19 2001-11-19 電圧発生回路、レベルシフト回路及び半導体装置
US10/103,761 US6621322B2 (en) 2001-11-19 2002-03-25 Voltage generating circuit, level shift circuit and semiconductor device
KR1020020021124A KR100812878B1 (ko) 2001-11-19 2002-04-18 전압 발생 회로, 레벨 시프트 회로 및 반도체 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001353576A JP3916931B2 (ja) 2001-11-19 2001-11-19 電圧発生回路、レベルシフト回路及び半導体装置

Publications (3)

Publication Number Publication Date
JP2003152525A JP2003152525A (ja) 2003-05-23
JP2003152525A5 JP2003152525A5 (enExample) 2005-07-14
JP3916931B2 true JP3916931B2 (ja) 2007-05-23

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ID=19165572

Family Applications (1)

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JP2001353576A Expired - Fee Related JP3916931B2 (ja) 2001-11-19 2001-11-19 電圧発生回路、レベルシフト回路及び半導体装置

Country Status (3)

Country Link
US (1) US6621322B2 (enExample)
JP (1) JP3916931B2 (enExample)
KR (1) KR100812878B1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4487559B2 (ja) * 2003-12-18 2010-06-23 株式会社ニコン レベルシフト回路、並びに、これを用いたアクチュエータ装置及び光スイッチシステム
US8736304B2 (en) * 2005-06-30 2014-05-27 International Business Machines Corporation Self-biased high speed level shifter circuit
JP4955254B2 (ja) 2005-10-31 2012-06-20 ルネサスエレクトロニクス株式会社 Ｐｄｐ駆動装置及び表示装置
KR100801031B1 (ko) * 2006-08-11 2008-02-04 삼성전자주식회사 레벨 쉬프팅 회로 및 레벨 쉬프팅 방법
US7589560B2 (en) * 2006-10-19 2009-09-15 Hewlett-Packard Development Company, L.P. Apparatus for configuring I/O signal levels of interfacing logic circuits

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6422107A (en) * 1987-07-17 1989-01-25 Oki Electric Ind Co Ltd Voltage level detecting circuit
JPH0537344A (ja) * 1991-06-26 1993-02-12 Nec Kyushu Ltd レベル変換回路
US5852372A (en) * 1996-02-20 1998-12-22 Intergraph Corporation Apparatus and method for signal handling on GTL-type buses
KR100261179B1 (ko) * 1997-12-26 2000-07-01 김영환 씨모스 전압 레벨 쉬프트 회로
JP3481121B2 (ja) * 1998-03-20 2003-12-22 松下電器産業株式会社 レベルシフト回路
US6127848A (en) * 1998-07-20 2000-10-03 National Semiconductor Corporation Voltage translator with gate oxide breakdown protection
US6194944B1 (en) * 1999-04-29 2001-02-27 National Semiconductor Corporation Input structure for I/O device
JP3556533B2 (ja) * 1999-07-27 2004-08-18 シャープ株式会社 レベルシフタ回路
KR100324336B1 (ko) * 2000-02-10 2002-02-16 박종섭 메모리 소자의 레벨 시프트 초기화 회로
US6462602B1 (en) * 2001-02-01 2002-10-08 Lattice Semiconductor Corporation Voltage level translator systems and methods

Also Published As

Publication number Publication date
KR100812878B1 (ko) 2008-03-11
US6621322B2 (en) 2003-09-16
KR20030041755A (ko) 2003-05-27
US20030094988A1 (en) 2003-05-22
JP2003152525A (ja) 2003-05-23

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