KR100812878B1 - 전압 발생 회로, 레벨 시프트 회로 및 반도체 장치 - Google Patents
전압 발생 회로, 레벨 시프트 회로 및 반도체 장치 Download PDFInfo
- Publication number
- KR100812878B1 KR100812878B1 KR1020020021124A KR20020021124A KR100812878B1 KR 100812878 B1 KR100812878 B1 KR 100812878B1 KR 1020020021124 A KR1020020021124 A KR 1020020021124A KR 20020021124 A KR20020021124 A KR 20020021124A KR 100812878 B1 KR100812878 B1 KR 100812878B1
- Authority
- KR
- South Korea
- Prior art keywords
- voltage
- circuit
- power supply
- signal
- level shift
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001353576A JP3916931B2 (ja) | 2001-11-19 | 2001-11-19 | 電圧発生回路、レベルシフト回路及び半導体装置 |
| JPJP-P-2001-00353576 | 2001-11-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20030041755A KR20030041755A (ko) | 2003-05-27 |
| KR100812878B1 true KR100812878B1 (ko) | 2008-03-11 |
Family
ID=19165572
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020020021124A Expired - Fee Related KR100812878B1 (ko) | 2001-11-19 | 2002-04-18 | 전압 발생 회로, 레벨 시프트 회로 및 반도체 장치 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6621322B2 (enExample) |
| JP (1) | JP3916931B2 (enExample) |
| KR (1) | KR100812878B1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4487559B2 (ja) * | 2003-12-18 | 2010-06-23 | 株式会社ニコン | レベルシフト回路、並びに、これを用いたアクチュエータ装置及び光スイッチシステム |
| US8736304B2 (en) * | 2005-06-30 | 2014-05-27 | International Business Machines Corporation | Self-biased high speed level shifter circuit |
| JP4955254B2 (ja) | 2005-10-31 | 2012-06-20 | ルネサスエレクトロニクス株式会社 | Pdp駆動装置及び表示装置 |
| KR100801031B1 (ko) * | 2006-08-11 | 2008-02-04 | 삼성전자주식회사 | 레벨 쉬프팅 회로 및 레벨 쉬프팅 방법 |
| US7589560B2 (en) * | 2006-10-19 | 2009-09-15 | Hewlett-Packard Development Company, L.P. | Apparatus for configuring I/O signal levels of interfacing logic circuits |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4873458A (en) * | 1987-07-17 | 1989-10-10 | Oki Electric Industry Co., Ltd. | Voltage level detecting circuit having a level converter |
| JPH0537344A (ja) * | 1991-06-26 | 1993-02-12 | Nec Kyushu Ltd | レベル変換回路 |
| KR19990054556A (ko) * | 1997-12-26 | 1999-07-15 | 구본준 | 씨모스 전압 레벨 쉬프트 회로 |
| KR20010083282A (ko) * | 2000-02-10 | 2001-09-01 | 박종섭 | 메모리 소자의 레벨 시프트 초기화 회로 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5852372A (en) * | 1996-02-20 | 1998-12-22 | Intergraph Corporation | Apparatus and method for signal handling on GTL-type buses |
| JP3481121B2 (ja) * | 1998-03-20 | 2003-12-22 | 松下電器産業株式会社 | レベルシフト回路 |
| US6127848A (en) * | 1998-07-20 | 2000-10-03 | National Semiconductor Corporation | Voltage translator with gate oxide breakdown protection |
| US6194944B1 (en) * | 1999-04-29 | 2001-02-27 | National Semiconductor Corporation | Input structure for I/O device |
| JP3556533B2 (ja) * | 1999-07-27 | 2004-08-18 | シャープ株式会社 | レベルシフタ回路 |
| US6462602B1 (en) * | 2001-02-01 | 2002-10-08 | Lattice Semiconductor Corporation | Voltage level translator systems and methods |
-
2001
- 2001-11-19 JP JP2001353576A patent/JP3916931B2/ja not_active Expired - Fee Related
-
2002
- 2002-03-25 US US10/103,761 patent/US6621322B2/en not_active Expired - Lifetime
- 2002-04-18 KR KR1020020021124A patent/KR100812878B1/ko not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4873458A (en) * | 1987-07-17 | 1989-10-10 | Oki Electric Industry Co., Ltd. | Voltage level detecting circuit having a level converter |
| JPH0537344A (ja) * | 1991-06-26 | 1993-02-12 | Nec Kyushu Ltd | レベル変換回路 |
| KR19990054556A (ko) * | 1997-12-26 | 1999-07-15 | 구본준 | 씨모스 전압 레벨 쉬프트 회로 |
| KR20010083282A (ko) * | 2000-02-10 | 2001-09-01 | 박종섭 | 메모리 소자의 레벨 시프트 초기화 회로 |
Also Published As
| Publication number | Publication date |
|---|---|
| US6621322B2 (en) | 2003-09-16 |
| KR20030041755A (ko) | 2003-05-27 |
| US20030094988A1 (en) | 2003-05-22 |
| JP2003152525A (ja) | 2003-05-23 |
| JP3916931B2 (ja) | 2007-05-23 |
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