JP3900637B2 - ビタビ復号装置 - Google Patents
ビタビ復号装置 Download PDFInfo
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- JP3900637B2 JP3900637B2 JP35143497A JP35143497A JP3900637B2 JP 3900637 B2 JP3900637 B2 JP 3900637B2 JP 35143497 A JP35143497 A JP 35143497A JP 35143497 A JP35143497 A JP 35143497A JP 3900637 B2 JP3900637 B2 JP 3900637B2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
- H03M13/6583—Normalization other than scaling, e.g. by subtraction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4123—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing the return to a predetermined state
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
- H03M13/4169—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback
- H03M13/4176—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback using a plurality of RAMs, e.g. for carrying out a plurality of traceback implementations simultaneously
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- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Compression Of Band Width Or Redundancy In Fax (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35143497A JP3900637B2 (ja) | 1997-12-19 | 1997-12-19 | ビタビ復号装置 |
| MYPI98005661A MY119831A (en) | 1997-12-19 | 1998-12-15 | Viterbi decoding apparatus and viterbi decoding method |
| US09/215,452 US6748034B2 (en) | 1997-12-19 | 1998-12-17 | Viterbi decoding apparatus and viterbi decoding method |
| EP98124034A EP0924863A3 (en) | 1997-12-19 | 1998-12-17 | Viterbi decoding apparatus and viterbi decoding method |
| EP09001553A EP2053750A1 (en) | 1997-12-19 | 1998-12-17 | Viterbi decoding apparatus and Viterbi decoding method |
| KR1019980056323A KR100538730B1 (ko) | 1997-12-19 | 1998-12-18 | 비터비디코딩장치및비터비디코딩방법 |
| CN98125339A CN1220522A (zh) | 1997-12-19 | 1998-12-18 | 维特比译码装置及维特比译码方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35143497A JP3900637B2 (ja) | 1997-12-19 | 1997-12-19 | ビタビ復号装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11186919A JPH11186919A (ja) | 1999-07-09 |
| JPH11186919A5 JPH11186919A5 (enExample) | 2005-03-17 |
| JP3900637B2 true JP3900637B2 (ja) | 2007-04-04 |
Family
ID=18417266
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35143497A Expired - Fee Related JP3900637B2 (ja) | 1997-12-19 | 1997-12-19 | ビタビ復号装置 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6748034B2 (enExample) |
| EP (2) | EP2053750A1 (enExample) |
| JP (1) | JP3900637B2 (enExample) |
| KR (1) | KR100538730B1 (enExample) |
| CN (1) | CN1220522A (enExample) |
| MY (1) | MY119831A (enExample) |
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| JP4840651B2 (ja) * | 2006-07-27 | 2011-12-21 | ソニー株式会社 | 復号装置および復号方法 |
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| US477636A (en) * | 1892-06-28 | blodgett | ||
| CA1260143A (en) * | 1986-02-24 | 1989-09-26 | Atsushi Yamashita | Path trace viterbi decoder |
| GB2309867A (en) * | 1996-01-30 | 1997-08-06 | Sony Corp | Reliability data in decoding apparatus |
| JPH09266448A (ja) * | 1996-03-28 | 1997-10-07 | Sony Corp | ビタビ復号化装置およびビタビ復号化方法 |
| US5878098A (en) * | 1996-06-27 | 1999-03-02 | Motorola, Inc. | Method and apparatus for rate determination in a communication system |
| EP0837564B1 (en) * | 1996-10-15 | 2003-02-19 | Matsushita Electric Industrial Co., Ltd. | Apparatus for performing a trace back operation in a Viterbi decoder |
| WO1998018209A1 (en) * | 1996-10-24 | 1998-04-30 | Sony Corporation | Device and method for viterbi decoding |
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- 1998-12-18 KR KR1019980056323A patent/KR100538730B1/ko not_active Expired - Fee Related
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| CN1220522A (zh) | 1999-06-23 |
| EP2053750A1 (en) | 2009-04-29 |
| EP0924863A3 (en) | 2004-06-09 |
| KR100538730B1 (ko) | 2006-02-28 |
| KR19990063227A (ko) | 1999-07-26 |
| EP0924863A2 (en) | 1999-06-23 |
| JPH11186919A (ja) | 1999-07-09 |
| US20030108128A1 (en) | 2003-06-12 |
| MY119831A (en) | 2005-07-29 |
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