JP3876518B2 - Nitride semiconductor substrate manufacturing method and nitride semiconductor substrate - Google Patents

Nitride semiconductor substrate manufacturing method and nitride semiconductor substrate Download PDF

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JP3876518B2
JP3876518B2 JP05257398A JP5257398A JP3876518B2 JP 3876518 B2 JP3876518 B2 JP 3876518B2 JP 05257398 A JP05257398 A JP 05257398A JP 5257398 A JP5257398 A JP 5257398A JP 3876518 B2 JP3876518 B2 JP 3876518B2
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nitride semiconductor
layer
semiconductor substrate
grown
substrate
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JPH11251253A (en
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徳也 小崎
裕之 清久
修二 中村
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Nichia Corp
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Nichia Corp
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Description

【0001】
【産業上の利用分野】
本発明は窒化物半導体よりなる(InXAlYGa1-X-YN、0≦X、0≦Y、X+Y≦1)基板の製造方法と、窒化物半導体基板に関する。
【0002】
【従来の技術】
一般に半導体を基板上に成長させる際、成長させる半導体と格子整合した基板を用いると半導体の結晶欠陥が少なくなって結晶性が向上することが知られている。しかし、窒化物半導体は格子整合する基板が現在世の中に存在しないことから、一般にサファイア、スピネル、炭化ケイ素のような窒化物半導体と格子整合しない異種基板の上に成長されている。
【0003】
一方、窒化物半導体と格子整合するGaNバルク結晶を作製する試みは、様々な研究機関において成されているが、未だに数ミリ程度のものしか得られたという報告しかされておらず、実用化には程遠い状態である。
【0004】
GaN基板を作製する技術として、例えば特開平7−202265号公報、特開平7−165498号に、サファイア基板の上にZnOよりなるバッファ層を形成して、そのバッファ層の上に窒化物半導体を成長させた後、バッファ層を溶解除去する技術が記載されている。しかしながらサファイア基板の上に成長されるZnOバッファ層の結晶性は悪く、そのバッファ層の上に厚膜で窒化物半導体を成長させても、結晶全体の結晶欠陥が108個/cm2以上もあり、良質の窒化物半導体結晶を得ることは難しい。さらに、薄膜のZnOよりなるバッファ層の上に、基板となるような厚膜の窒化物半導体を連続して成長させることも難しい。
【0005】
【発明が解決しようとする課題】
LED素子、LD素子、受光素子等の数々の電子デバイスに使用される窒化物半導体素子を作製する際、窒化物半導体よりなる基板を作製することができれば、その基板の上に新たな窒化物半導体を成長させて、格子欠陥が少ない窒化物半導体が成長できるので、それら素子の結晶性が飛躍的に良くなり、従来実現されていなかった素子が実現できるようになる。従って本発明の目的とするところは、結晶性の良い窒化物半導体基板の製造方法と、窒化物半導体基板を提供することにある。
【0006】
【課題を解決するための手段】
本発明の窒化物半導体基板の製造方法は、窒化物半導体と異なる材料よりなる異種基板上に、まず第1の窒化物半導体よりなる下地層を成長させ、その下地層の上に表面に窒化物半導体が成長しないか、若しくは成長しにくい性質を有する保護膜を部分的に形成する第1の工程と、第1の工程後、有機金属気相成長法(Metal Organic Vapor Phase Epitaxy:以下、MOVPEという。)により、下地層から前記保護膜上部に至るまで、第2の窒化物半導体を成長させて、前記保護膜のほぼ中央部に空洞を形成する第2の工程と、第2の工程後、ハイドライド気相成長法(Hydride Vapor Phase Epitaxy:以下、HVPEという。)により、第2の窒化物半導体層の上に、その第2の窒化物半導体層よりも厚い膜厚で第3の窒化物半導体を成長させる第3の工程とを具備することを特徴とする。
【0007】
前記第2の窒化物半導体層は、端面が保護膜の水平面に対してほぼ垂直な形状で成長させることを特徴とする。前記第2の窒化物半導体層は、窒素源のガスのモル比(窒素源/3族源)を2000以下に調整して成長させることを特徴とする。前記第2の工程、または第3の工程の少なくとも一方の工程において、窒化物半導体にn型不純物をドープすることを特徴とする。ドープするn型不純物としてはSi、Ge、Sn、S等のIV族元素を用い、好ましくはSi、Snをドープする。
【0008】
また、前記第2の工程、または前記第3の工程の内の少なくとも一方の工程において、窒化物半導体層中のn型不純物に濃度勾配を設けることを特徴とする。濃度勾配とはn型不純物濃度に傾斜があることであり、連続的に傾斜が設けられていても良いし、またステップ状に傾斜が設けられていても良い。
【0009】
さらに、前記濃度勾配は異種基板から離れるに従ってn型不純物濃度が小さくなるように調整されていることを特徴とする。これは主面に接近するに従ってn型不純物濃度が小さくなるようにしてあれば、後にn電極を設ける際に、どこの窒化物半導体基板を露出させても、高濃度にn型不純物をドープした第2、第3の窒化物半導体層側をコンタクト層とすることできるため、素子のVfを低下させ、出力を向上させる上で望ましいからである。また、窒化物半導体基板上に成長させた半導体層側からエッチングして、エッチング面に電極を設けても、n型不純物を高濃度にドープした第2の窒化物半導体層または、第3の窒化物半導体層を電極形成層とすることが同理由において望ましい。
【0010】
本発明では、前記第3の窒化物半導体成長後、少なくとも異種基板、下地層、および保護膜を除去する第4の工程を具備することを特徴とする。この工程を行うことにより、窒化物半導体基板単体、つまり半導体層を積層するためのウェーハとできる。なお、この基板を用いて半導体を基板の表面に成長させる場合、第3の窒化物半導体層面側を成長面とする方が、結晶欠陥が少ないので、結晶性の良い半導体層が積層成長できる。
【0011】
また本発明の窒化物半導体基板は、ハイドライド気相成長法により成長され、第1の主面と第2の主面とを有する窒化物半導体基板であって、前記第1の主面、若しくは第2の主面近傍の結晶欠陥が1×105個/cm2以下であり、前記窒化物半導体基板にはn型不純物が含有されており、該n型不純物は窒化物半導体基板内で濃度勾配を有することを特徴とする。主面上に次に成長させる半導体層の結晶欠陥を少なくするには、望ましくは5×104個/cm2以下、さらに望ましくは1×104個/cm2以下、最も望ましくは1×103個/cm2以下の主面近傍の結晶欠陥を有する窒化物半導体基板を選択する。なお主面近傍は主面表面から5μm以内とし、その5μm以内の結晶欠陥の数はTEM(透過型電子顕微鏡)により計測できる。結晶欠陥はTEMにより平面観察(plan-view)を行い、その欠陥密度の平均を指すものとする。
【0012】
さらに本発明の窒化物半導体基板は、n型不純物がドープされていることを特徴とする。好ましくはそのn型不純物は窒化物半導体基板内で濃度勾配を有し、さらに好ましくは窒化物半導体基板の第1の主面若しくは第2の主面のいずれか一方の面に接近するに従って、n型不純物濃度が小さくなるようにされていることが望ましい。
【0013】
【発明の実施の形態】
図1乃至図5は、本発明の製造方法の各工程を順を追って説明するための、窒化物半導体基板の構造を示す模式断面図である。なお、図において窒化物半導体層内部に示す細線は結晶欠陥の方向、および数を模式的に示している。図1に示すように第1の工程では、異種基板1上に、まず第1の窒化物半導体よりなる下地層2を成長させ、その下地層2の上に、表面に窒化物半導体が成長しないか、若しくは成長しにくい性質を有する保護膜を部分的に形成する。
【0014】
異種基板1は窒化物半導体と異なる材料よりなる基板であればどのようなものでも良く、例えば、サファイアC面の他、R面、A面を主面とするサファイア、スピネル(MgA124)のような絶縁性基板、SiC(6H、4H、3Cを含む)、ZnS、ZnO、GaAs、Si、及び窒化物半導体と格子整合する酸化物基板等、従来知られている窒化物半導体と異なる基板材料を用いることができる。さらに前記基板材料の主面をオフアングルさせた基板も用いることもできる。
【0015】
下地層2の成長方法は特に問うものではなく、MOVPE、MBE、HVPE等、窒化物半導体を成長させるのに知られている従来の方法で成長できる。この下地層2は異種基板1と材料が異なるために、結晶欠陥が非常に多く、通常108個/cm2以上あり、窒化物半導体基板とはならない。下地層にはアンドープのGaNを成長させることが最も好ましい。
【0016】
保護膜10の材料としては その保護膜表面に窒化物半導体が成長しないか、若しくは成長しにくい性質を有する材料を選択し、例えば酸化ケイ素(SiOX)、窒化ケイ素(SiXY)、酸化チタン(TiOX)、酸化ジルコニウム(ZrOX)等の酸化物、窒化物、またこれらの多層膜の他、1200℃以上の融点を有する金属等を用いることができる。これらの保護膜材料は、窒化物半導体の成長温度600℃〜1100℃の温度にも耐え、その表面に窒化物半導体が成長しないか、成長しにくい性質を有している。保護膜を部分的(=選択的)に形成するためには、例えばフォトリソグラフィー技術を用いて、所定の形状を有するフォトマスクを作製し、そのフォトマスクを介して、前記材料を気相製膜することにより、所定の形状を有する保護膜を形成できる。保護膜10の形状は特に問うものではなく、例えばドット、ストライプ、碁盤面状の形状で形成でき、好ましくはストライプ状の形状で形成することが望ましい。図1では下地層2の上に例えばストライプ状の保護膜を形成し、そのストライプに対して垂直な方向でウェーハを切断した際の部分的な断面図を示している。特に図1に示すように部分的に形成した保護膜10の露出部分(窓部)の面積を、保護膜の面積よりも小さくすると、下地層から転位する結晶欠陥の数が少なくなり、さらに結晶欠陥の少ない窒化物半導体基板が成長できるため、特に望ましい。
【0017】
保護膜10をストライプ状に形成する場合、窓部の幅は10μm以下、さらに好ましくは5μm以下、最も好ましくは3μm以下に調整する。10μmよりも広いと保護膜上部に成長させる結晶欠陥の数が多くなる傾向にある。さらに、結晶欠陥の少ない窒化物半導体基板を得るためには、窓部の幅(Ww)と保護膜の幅(Ws)の比Ws/Wwは、1より大きく〜20以下とすることが望ましく、好ましくは10以下とする。
【0018】
次に、本発明の第2の工程ではMOVPEを用い、図2に示すように下地層から前記保護膜上部に至るまで、第2の窒化物半導体3を成長させる。第2の窒化物半導体3は結晶欠陥の少ない窒化物半導体を得る上で、アンドープのGaN若しくはn型不純物をドープしたGaNを成長させることが最も好ましい。
【0019】
図2に示すように、保護膜10を形成した下地層2の上に、第2の窒化物半導体3を成長させると、保護膜10の上には窒化物半導体が成長せず、窓部の下地層の上に第2の窒化物半導体3が最初に選択成長される。さらに成長を続けると、第2の窒化物半導体が保護膜10の上で横方向に成長する。横方向に成長する窒化物半導体は、下地層のように縦方向に成長する窒化物半導体と異なり、結晶欠陥が保護膜10によって覆われているため、結晶欠陥が転位しない。結晶欠陥は保護膜の上部において、横方向に伸びてくるが途中で止まる傾向にある。さらに窓部から転位する結晶欠陥も第2の窒化物半導体層表面に現れてくるものもあるが、途中で止まりやすい傾向にある。なお、この工程をHVPEで行うと第2の窒化物半導体層の結晶欠陥が多くなる傾向にあるため好ましくなく、本発明ではMOVPEで行う。
【0020】
本発明の方法において、図2に示すように保護膜10の表面において、保護膜の平面に対してほぼ垂直に第2の窒化物半導体層を横方向に成長させる具体的手段として、例えばMOVPEによると、窒化物半導体を成長させる際に、3族源のガスに対する、窒素源のガスのモル比(窒素源/3族源)を2000以下に調整することが望ましい。好ましいモル比としては1800以下、さらに望ましくは1500以下に調整する。下限は化学量論比以上であれば特に限定しないが、望ましくは10以上、さらに好ましくは30以上、最も好ましくは50以上に調整する。このモル比の値が2000よりも大きいと、窓部から三角形状の窒化物半導体が成長し、それに従って結晶欠陥が伸びていくので、結晶欠陥が途中で止まることが少なく、結晶欠陥の数が多くなる。しかし、このようにガス流量を調整すると、保護膜水平面に対して垂直に窒化物半導体が成長して、その垂直な面が壁のようになって保護膜上で繋がるため、保護膜の上部において、結晶欠陥が成長途中で止まりやすい。また、窓部から伸びる結晶欠陥も途中で止まりやすい。従って、結晶欠陥の少ない第2の窒化物半導体層が成長できる。図3、図4で示すように、保護膜のほぼ中央部に三角形の空洞があるのは、横方向に対して垂直に第2の窒化物半導体層が伸びてきて繋がった形跡である。
【0021】
MOVPE法で成長させる際、窒素源のガスには、例えばアンモニア、ヒドラジン等の水素化物ガスを用い、3族源のガスには、TMG(トリメチルガリウム)、TEG(トリエチルガリウム)等の有機Gaガス、TMA、TMI等の有機Al、有機Inガスを用いる。
【0022】
またこの第2の窒化物半導体層成長中に前記したSi、Sn等のn型不純物をドープすることもできる。n型不純物濃度は5×1016/cm3〜5×1021/cm3の範囲でドープすることが望ましい。5×1016/cm3よりも少ないと第2の窒化物半導体層のキャリア濃度が不十分となるので、抵抗率が高くなる傾向にある。5×1021/cm3よりも多いと、不純物濃度が大きいために、結晶性が悪くなり、結晶欠陥が増大する傾向にある。好ましい範囲としては、1×1017/cm3〜1×1020/cm3である。
【0023】
さらに、第2の窒化物半導体にn型不純物をドープする場合、n型不純物に濃度勾配を設けることが望ましい。特に、濃度勾配は異種基板から離れるに従ってn型不純物濃度が小さくなるように調整されていることが望ましい。これは異種基板、下地層、保護膜を除去し、第2の窒化物半導体層にn電極を設ける際に、どのような面が露出していても、その面は他の部分と比較して、n型不純物が高濃度にドープされた層となるので、n+、nの構造となり、窒化物半導体基板上に例えば発光素子構造を積層した場合、発光素子のVfを低下させ、出力を向上させる。
【0024】
次に、図3に示すように、第2の窒化物半導体層3の成長を続けると、保護膜の上で横方向に成長する第2の窒化物半導体層が繋がり、一体となる。この第2の窒化物半導体は結晶欠陥が前述の下地層に比べて、結晶欠陥の数が1桁以上少なく窒化物半導体基板となる。しかし下地層に比べて膜厚が薄いので異種基板をつけた状態では基板となるが、異種基板を除去すると、第2の窒化物半導体がバラバラに割れてしまい基板とはなりにくい傾向にある。
【0025】
第2の窒化物半導体層の成長膜厚は、保護膜10の形成幅にもよるが、1μm以上、好ましくは5μm以上、最も好ましくは10μm以上で成長させる。これは、保護膜の上部を第2の窒化物半導体層で覆うための膜厚の範囲であり、1μmよりも少ないと、第2の窒化物半導体層が保護膜の上を横方向に成長しにくい傾向にあるので、第2の窒化物半導体層の上に成長させる第3の窒化物半導体層の結晶欠陥が多くなる傾向にある。横方向に成長しないと結晶欠陥を減らすことが難しい。なお上限については特に限定しないが、70μm以下とすることが望ましい。70μmより厚く成長させると、成長時間が長時間になって窒化物半導体層の表面が荒れ、また保護膜が分解しやすい傾向にあるため、あまり好ましいとは言えない。
【0026】
次に、第3の工程では、第2の窒化物半導体層3の上に、その第2の窒化物半導体層よりも厚い膜厚で、HVPEにより、第3の窒化物半導体4を成長させる。図4は成長後の状態を示している。MOVPEでGaNを厚膜で成長させると、GaN表面が粗くなる傾向にある。これは長時間成長していることにより、異種基板との歪みにより面が荒れてくるものと思われる。さらに長時間成長していると保護膜(例えばSiO2)が分解する傾向にあり、保護膜上部に成長する窒化物半導体にピットが現れる傾向にある。一方HVPEでは、成長速度がMOVPEに比較して数倍以上速いので、例えば300μmの成長が数時間でできる。このため異種基板による歪みの影響を受けにくく、また保護膜の分解を押さえることができるので、表面が均一な第3の窒化物半導体を成長できる。なお、本発明の第3の工程は、図3に示す第2の窒化物半導体層3を保護膜上部全てに成長させた後、その第2の窒化物半導体層の上に成長させることが望ましいが、図2に示すように、第2の窒化物半導体層で保護膜の上が一部覆われた状態でも、第3の工程を行うこともでき、本発明の請求項の範囲内である。
【0027】
HVPEでは、GaメタルにHClガスを流し、一方別のガス配管でアンモニアガスを流して、基板上でそれらのガスを混合して、
GaCl+NH3→GaN+HCl+H2
なる反応が行われる。このように結晶欠陥の少ない第2の窒化物半導体の上に、HVPEにより厚膜で第3の窒化物半導体を成長させると、縦方向に伸びる結晶欠陥がほとんどなくなり、全体に結晶欠陥が非常に少ない窒化物半導体が成長できる。その第3の窒化物半導体層の結晶欠陥は、第2の窒化物半導体よりもさらに少なくなり、例えば最終的な表面近傍が1×105/cm2以下の結晶欠陥を有する基板が得られる。
【0028】
この第3の窒化物半導体層成長中に前記したSi、Sn等のn型不純物をドープすることもできる。n型不純物濃度は第2の窒化物半導体層の場合と同様に5×1016/cm3〜5×1021/cm3の範囲、好ましくは1×1017/cm3〜1×1020/cm3とする。
【0029】
さらに好ましい態様として、第3の窒化物半導体にn型不純物をドープする場合、n型不純物に濃度勾配を設けることが望ましい。特に、濃度勾配は異種基板から離れるに従ってn型不純物濃度が小さくなるように調整されていることが望ましい。作用は第2の窒化物半導体層と同じであるので省略する。
【0030】
第3の窒化物半導体層の膜厚は10μm以上、好ましくは50μm以上、さらに好ましくは100μm以上成長させることが望ましい。10μmよりも少ないと、結晶欠陥の数が少なくなりにくい傾向にある。上限は特に限定しないが、1mm以下とすることが望ましい。1mmより厚く成長させると、窒化物半導体と異種基板との熱膨張係数差により、ウェーハ全体が反ってしまい、均一な膜厚で第3の窒化物半導体層が成長しにくい傾向にあるからである。
【0031】
次に、本発明の第4の工程では、第3の窒化物半導体3成長後、少なくとも異種基板1、下地層2、保護膜10を除去する。図5では第2の窒化物半導体層3も除去した後の構造を示しているが、例えば第2の窒化物半導体層2を20μm以上の膜厚で成長させた場合、異種基板、下地層、保護膜を除去して、第2の窒化物半導体3も残すこともできる。このように異種基板側を除去して、窒化物半導体のみよりなる基板の2つの主面を露出させた場合、元あった異種基板側には、若干の縦方向に伸びる結晶欠陥が残る場合があるが、第3の窒化物半導体層側には、縦方向に伸びる結晶欠陥はほとんどなく、全体の結晶欠陥も、例えば1×105/cm2以下と非常に少なくなっている。その第3の窒化物半導体層4の上に他の半導体層を積層しても縦方向の結晶欠陥がないため、結晶欠陥の貫通転位がなく、非常に良好な半導体を積層できる。従って窒化物半導体を基板とする場合、異種基板側を除去した面と反対側の面を成長面とすることが望ましい。異種基板等を除去するには研磨、エッチング等の手法があるが、異なる材料を積層しているため、研磨で除去することが最も好ましい。
【0032】
また本発明の窒化物半導体基板は、HVPEにより成長され、第1の主面と第2の主面とを有する窒化物半導体基板であって、第1の主面、若しくは第2の主面近傍の結晶欠陥が1×105個/cm2以下であることを特徴とするものであるが、成長方法は特に問うものではなく、前述した方法によって得られた基板であることが望ましい。このように、表面近傍の結晶欠陥が1×105個/cm2以下の窒化物半導体基板の上に他の窒化物半導体を積層して素子構造とすると、内部に結晶欠陥がない信頼性に優れた長寿命な素子ができる。特にレーザ素子を作製した場合、窒化物半導体基板は従来のサファイアに比べて熱伝導性が非常に優れているため、基板とヒートシンクとを接すると、放熱性が良くなり、長寿命なレーザが実現できる。
【0033】
好ましい態様として、前記窒化物半導体基板にn型不純物がドープされており、さらに好ましくは、そのn型不純物は窒化物半導体基板内で濃度勾配を有しており、最も好ましくはその窒化物半導体基板の第1の主面若しくは第2の主面のいずれか一方の面に接近するに従って、n型不純物濃度が小さくなるようにされていることが望ましい。
【0034】
【実施例】
[実施例1]
以下、図1〜図5を元に本発明の実施例について説明する。
(第1の工程)
2インチφ、C面を主面とするサファイアよりなる異種基板1をMOVPE反応容器内にセットし、温度を500℃にして、トリメチルガリウム(TMG)、アンモニア(NH3)を用い、GaNよりなるバッファ層(図示せず。)を200オングストロームの膜厚で成長させる。バッファ層成長後、温度を1050℃にして、同じくGaNよりなる下地層2を4μmの膜厚で成長させる。
【0035】
下地層2成長後、ウェーハを反応容器から取り出し、この下地層の表面に、ストライプ状のフォトマスクを形成し、CVD装置によりストライプ幅10μm、ストライプ間隔(窓部)2μmのSiO2よりなる保護膜10を0.5μmの膜厚で形成する。保護膜形成後のウェーハの構造を図1に示す。
【0036】
(第2の工程)
保護膜10形成後、ウェーハを再度MOVPEの反応容器内にセットし、温度を1050℃にして、アンモニアを0.27mol/min、TMGを225μmol/min(V/III比=1200)でアンドープGaNよりなる第2の窒化物半導体層3を30μmの膜厚で成長させる。このようなモル比で成長させると、図2に示すように端面が保護膜水平面に対してほぼ垂直な形状で第2の窒化物半導体3が成長でき、結晶欠陥が非常に少なくなる。成長後の第2の窒化物半導体層は図3のように均一な膜厚で成長できており、表面近傍をTEMで観察すると、窓部から伸びた結晶欠陥は第2の窒化物半導体層の途中で止まっており、表面にまで現れているものはほとんどなかった。
【0037】
(第3の工程)
第2の窒化物半導体層3成長後、ウェーハをHVPE装置に移送し、原料としてGaメタル、HClガス、アンモニアを用い、アンドープGaNよりなる第3の窒化物半導体層4を200μmの膜厚で成長させる。成長後のウェーハの構造を図4に示す。成長後その第3の窒化物半導体層の表面近傍の結晶欠陥の数をTEMにより観察すると1×104個/cm2以下と、非常に良好な基板が得られていることが判明した。さらに極わずかな結晶欠陥でも平面に対しほぼ水平な結晶欠陥しか残っていなかった。
【0038】
(第4の工程)
次に、ウェーハを研磨装置に移送し、ダイヤモンド研磨剤を用いて、異種基板1、下地層2、保護膜10、第2の窒化物半導体層3を除去し、図5に示すように第3の窒化物半導体層4の裏面を露出させ、総膜厚195μmの窒化物半導体基板とする。なお裏面側の結晶欠陥も1×105個/cm2以下と少なかった。
【0039】
[実施例2]
実施例1の第3の工程において、HVPEの原料ガスにシランガスを加え、最初にSiを1×1019/cm3ドープしながらGaNを成長させ、成長させるに従って、シランガスの流量を少なくして、最後にSiを5×1016/cm3ドープしたGaNとして、Si濃度勾配を設けたGaNを200μmの膜厚で成長させる。その他は実施例1と同様にして、窒化物半導体基板を得たところ、Si量の少ない面は実施例1とほぼ同等の結晶欠陥数を有する窒化物半導体基板が得られた。
【0040】
[実施例3]
実施例1の第2の工程において、MOVPEの原料ガスにシランガスを加え、最初にSiを1×1019/cm3ドープしながらGaNを成長させ、成長させるに従って、シランガスの流量を少なくして、最後にSiを1×1017/cm3ドープしたGaNとして、Si濃度勾配を設けたGaNを20μmの膜厚で成長させる。続いて第3の工程において、Siを1×1017/cm3ドープしたGaNを200μmの膜厚で成長させる。その後、第4の工程において、異種基板、下地層、保護膜、および第1の窒化物半導体層を15μm除去する。以上のようにして得られた窒化物半導体基板は、第3の窒化物半導体層の主面は実施例1とほぼ同等であったが、第2の窒化物半導体側の結晶欠陥は、第3の窒化物半導体に比較して1桁ぐらい多かった。
【0041】
[実施例4]
実施例1の窒化物半導体基板の異種基板を除去していない側の主面を上にし、この面に次のようにして窒化物半導体積層成長させて図6に示すレーザ素子を得る。
【0042】
実施例1で得られた窒化物半導体基板4の上に
(n側コンタクト層21)
アンモニアとTMG、不純物ガスとしてシランガスを用い、1050℃でSiを3×1018/cm3ドープしたGaNよりなるn側コンタクト層5を4μmの膜厚で成長させる。
【0043】
(クラック防止層22)
次に、TMG、TMI(トリメチルインジウム)、アンモニアを用い、温度を800℃にしてIn0.06Ga0.94Nよりなるクラック防止層22を0.15μmの膜厚で成長させる。なお、このクラック防止層は省略可能である。
【0044】
(n側クラッド層23)
続いて、1050℃でTMA、TMG、アンモニアを用い、アンドープAl0.16Ga0.84Nよりなる層を25オングストロームの膜厚で成長させ、続いてTMAを止めて、シランガスを流し、Siを1×1019/cm3ドープしたn型GaNよりなる層を25オングストロームの膜厚で成長させる。それらの層を交互に積層して超格子層を構成し、総膜厚1.2μmの超格子よりなるn側クラッド層23を成長させる。
【0045】
(n側光ガイド層24)
続いて、シランガスを止め、1050℃でアンドープGaNよりなるn側光ガイド層8を0.1μmの膜厚で成長させる。このn側光ガイド層24にはn型不純物をドープしても良い。
【0046】
(活性層25)
次に、温度を800℃にして、アンドープIn0.01Ga0.95Nよりなる障壁層を100オングストロームの膜厚で成長させ、続いて同一温度で、アンドープIn0.2Ga0.8Nよりなる井戸層を40オングストロームの膜厚で成長させる。障壁層と井戸層とを3回交互に積層し、最後に障壁層で終わり、総膜厚520オングストロームの多重量子井戸構造(MQW)の活性層を成長させる。活性層は本実施例のようにアンドープでもよいし、またn型不純物及び/又はp型不純物をドープしても良い。不純物は井戸層、障壁層両方にドープしても良く、いずれか一方にドープしてもよい。さらに積層順としては、井戸層から積層して井戸層で終わっても、井戸層から積層して障壁層で終わっても、あるいは障壁層から積層して井戸層で終わっても良い。
【0047】
(p側キャップ層26)
次に、温度を1050℃に上げ、TMG、TMA、アンモニア、Cp2Mg(シクロペンタジエニルマグネシウム)を用い、Mgを1×1020/cm3ドープしたp型Al0.3Ga0.7Nよりなるp側キャップ層26を300オングストロームの膜厚で成長させる。
【0048】
(p側光ガイド層27)
Cp2Mg、TMAを止め、Mgを5×1016/cm3ドープしたGaNよりなるp側光ガイド層27を0.1μmの膜厚で成長させる。
【0049】
(p側クラッド層28)
続いて、アンドープAl0.16Ga0.84Nよりなる層を25オングストロームの膜厚で成長させ、続いてMgを1×1019/cm3ドープしたGaNよりなる層を25オングストロームの膜厚で成長させ、それらを交互に積層し、総膜厚0.6μmの超格子層よりなるp側クラッド層28を成長させる。
【0050】
(p側コンタクト層29)
最後に、Mgを1×1020/cm3ドープしたp型GaNよりなるp側コンタクト層29を150オングストロームの膜厚で成長させる。
【0051】
以上のようにして窒化物半導体を成長させたウェーハを反応容器から取り出し、最上層のp側コンタクト層29の表面にSiO2よりなる保護膜を形成して、RIE(反応性イオンエッチング)を用いSiCl4ガスによりエッチングし、図6に示すように、n電極を形成すべきn側コンタクト層21の表面を露出させる。
【0052】
次に、最上層のp側コンタクト層29に所定の形状のマスクをかけ、p側コンタクト層29、およびp側クラッド層28をエッチングして、1μmの幅を有するリッジストライプを形成後、リッジの側面にZrO2よりなる絶縁膜30を形成し、その絶縁膜30を介して、p側コンタクト層と電気的に接続したp電極31を形成する。一方先ほど露出させたn側コンタクト層の表面はn電極32を形成する。
【0053】
以上のようにして、n電極とp電極とを形成したウェーハの窒化物半導体基板を研磨して薄くした後、窒化物半導体基板を劈開してその劈開面にレーザ素子の共振面を形成する。劈開後、チップ状にに分離して、窒化物半導体基板側をヒートシンクに設置し、レーザ素子としたところ、室温でレーザ発振を示し、閾値電流密度1.5kA/cm2において室温連続発振を示し、20mWの出力において1000時間以上の寿命を示した。
【0054】
なお、本実施例では実施例1で得られた基板を用いてレーザ素子を作製したが、同一面側からn、p両方の電極を取り出す構造とする場合でも、実施例2、および実施例3で得られたn型不純物に濃度勾配を設けた窒化物半導体基板を用いることができる。この場合、n側コンタクト層21は不要となり、エッチングにより濃度勾配を設けた第2の窒化物半導体層3、若しくは第3の窒化物半導体層を露出させ、その露出面にn電極32を形成すればよい。
【0055】
[実施例5]
実施例2で得られた窒化物半導体基板の上(異種基板除去面と反対側の面)に、実施例4と同様にして、クラック防止層22、n側クラッド層23、n側光ガイド層24、活性層25、p側キャップ層26、p側光ガイド層27、p側クラッド層28、p側コンタクト層29を積層する。
【0056】
続いて、実施例4と同様にして、p側コンタクト層29、p側クラッド層に、1μm幅のリッジストライプを作製して、絶縁膜30を形成する。絶縁膜形成後濃度勾配の設けられた窒化物半導体基板を劈開できる厚さまで研磨した後、実施例4と同様にして劈開し、レーザ素子とした。実施例5では窒化物半導体基板を研磨しても濃度勾配が設けられているため、露出する面は常に窒化物半導体基板の中で高濃度にn型不純物がドープされた層となる。そして、図7に示すように基板側にn電極、リッジ側にp電極を形成してレーザ素子としたところ、実施例4とほぼ同等の特性を有するレーザ素子が得られた。
【0057】
【発明の効果】
以上説明したように本発明の方法によると、従来では得られなかった結晶性の非常に良い窒化物半導体基板が得られる。この窒化物半導体基板に上に窒化物半導体を成長させると、完全に格子整合するので、結晶欠陥の非常に少ない素子ができる。そのため、その素子は貫通転位が活性層にまで及ばす、例えば最も過酷な条件で使用されるレーザ素子を実現しても、長寿命で信頼性の高い素子が実現できる。
【図面の簡単な説明】
【図1】 本発明の第1の工程を説明する窒化物半導体基板の構造を示す模式断面図。
【図2】 本発明の第2の工程を説明する窒化物半導体基板の構造を示す模式断面図。
【図3】 本発明の第2の工程を説明する窒化物半導体基板の構造を示す模式断面図。
【図4】 本発明の第3の工程を説明する窒化物半導体基板の構造を示す模式断面図。
【図5】 本発明の第4の工程を説明する窒化物半導体基板の構造を示す模式断面図。
【図6】 本発明の一実施例に係る基板を用いたレーザ素子の構造を示す模式断面図。
【図7】 本発明の他の実施例に係る基板を用いたレーザ素子の構造を示す模式断面図。
【符号の説明】
1・・・異種基板
2・・・下地層
3・・・第2の窒化物半導体層
4・・・第3の窒化物半導体層
10・・・保護膜
21・・・n側コンタクト層
22・・・クラック防止層
23・・・n側クラッド層
24・・・n側光ガイド層
25・・・活性層
26・・・p側キャップ層
27・・・p側光ガイド層
28・・・p側クラッド層
29・・・p側コンタクト層
30・・・絶縁膜
31・・・p電極
32・・・n電極
[0001]
[Industrial application fields]
The present invention comprises a nitride semiconductor (InXAlYGa1-XYN, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1) The present invention relates to a substrate manufacturing method and a nitride semiconductor substrate.
[0002]
[Prior art]
In general, when a semiconductor is grown on a substrate, it is known that if a substrate lattice-matched with the semiconductor to be grown is used, the crystal defects of the semiconductor are reduced and the crystallinity is improved. However, nitride semiconductors are generally grown on heterogeneous substrates that do not lattice match with nitride semiconductors such as sapphire, spinel, and silicon carbide because there is no lattice-matched substrate in the world.
[0003]
On the other hand, attempts to fabricate a GaN bulk crystal that is lattice-matched with a nitride semiconductor have been made by various research institutions, but only a few millimeters have been reported so far. Is far away.
[0004]
As a technique for producing a GaN substrate, for example, in JP-A-7-202265 and JP-A-7-165498, a buffer layer made of ZnO is formed on a sapphire substrate, and a nitride semiconductor is formed on the buffer layer. A technique for dissolving and removing the buffer layer after growth is described. However, the crystallinity of the ZnO buffer layer grown on the sapphire substrate is poor, and even if a nitride semiconductor is grown as a thick film on the buffer layer, the crystal defect of the entire crystal is 108Pieces / cm2For the above reasons, it is difficult to obtain a good quality nitride semiconductor crystal. Furthermore, it is difficult to continuously grow a nitride semiconductor having a thick film as a substrate on a buffer layer made of thin ZnO.
[0005]
[Problems to be solved by the invention]
When producing a nitride semiconductor element used for various electronic devices such as LED elements, LD elements, light receiving elements, etc., if a nitride semiconductor substrate can be produced, a new nitride semiconductor is formed on the substrate. Thus, nitride semiconductors with few lattice defects can be grown, so that the crystallinity of these elements is dramatically improved, and elements that have not been realized can be realized. Accordingly, an object of the present invention is to provide a method for manufacturing a nitride semiconductor substrate having good crystallinity and a nitride semiconductor substrate.
[0006]
[Means for Solving the Problems]
In the method for manufacturing a nitride semiconductor substrate according to the present invention, a base layer made of a first nitride semiconductor is first grown on a heterogeneous substrate made of a material different from the nitride semiconductor, and a nitride is formed on the surface of the base layer. A first step of partially forming a protective film having a property that the semiconductor does not grow or is difficult to grow, and after the first step, a metal organic vapor phase epitaxy (hereinafter referred to as MOVPE) ) To grow the second nitride semiconductor from the underlayer to the upper portion of the protective film.And forming a cavity at substantially the center of the protective film.After the second step and the second step, the second nitride semiconductor layer is formed on the second nitride semiconductor layer by hydride vapor phase epitaxy (hereinafter referred to as HVPE). And a third step of growing the third nitride semiconductor with a thicker film thickness.
[0007]
The second nitride semiconductor layer is grown in a shape in which the end face is substantially perpendicular to the horizontal plane of the protective film. The second nitride semiconductor layer is grown by adjusting the molar ratio of nitrogen source gas (nitrogen source / group 3 source) to 2000 or less.In at least one of the second step and the third step, the nitride semiconductor is doped with an n-type impurity. As an n-type impurity to be doped, a group IV element such as Si, Ge, Sn, or S is used, and preferably Si or Sn is doped.
[0008]
The n-type impurity in the nitride semiconductor layer is provided with a concentration gradient in at least one of the second step and the third step. The concentration gradient means that the n-type impurity concentration has an inclination, and the inclination may be continuously provided, or the inclination may be provided stepwise.
[0009]
Furthermore, the concentration gradient is adjusted so that the n-type impurity concentration decreases as the distance from the different substrate increases. This is because if the n-type impurity concentration is reduced as it approaches the main surface, the n-type impurity is doped at a high concentration no matter which nitride semiconductor substrate is exposed when an n-electrode is provided later. This is because the second and third nitride semiconductor layer sides can be used as contact layers, which is desirable for reducing the Vf of the device and improving the output. Further, even if etching is performed from the side of the semiconductor layer grown on the nitride semiconductor substrate and an electrode is provided on the etched surface, the second nitride semiconductor layer doped with n-type impurities at a high concentration or the third nitride For the same reason, it is desirable that the physical semiconductor layer be an electrode forming layer.
[0010]
The present invention includes a fourth step of removing at least the heterogeneous substrate, the base layer, and the protective film after the third nitride semiconductor growth. By performing this step, a nitride semiconductor substrate alone, that is, a wafer for stacking semiconductor layers can be obtained. When a semiconductor is grown on the surface of the substrate using this substrate, a semiconductor layer with good crystallinity can be stacked and grown because the third nitride semiconductor layer surface side has fewer crystal defects.
[0011]
The nitride semiconductor substrate of the present invention is a nitride semiconductor substrate having a first main surface and a second main surface grown by a hydride vapor phase growth method, wherein the first main surface or the first main surface The crystal defects near the main surface of 2 are 1 × 10FivePieces / cm2IsThe nitride semiconductor substrate contains an n-type impurity, and the n-type impurity has a concentration gradient in the nitride semiconductor substrate.It is characterized by that. In order to reduce the crystal defects of the semiconductor layer to be subsequently grown on the main surface, preferably 5 × 10FourPieces / cm2The following is more desirably 1 × 10FourPieces / cm2Below, most desirably 1 × 10ThreePieces / cm2A nitride semiconductor substrate having crystal defects in the vicinity of the following main surface is selected. The vicinity of the main surface is within 5 μm from the main surface, and the number of crystal defects within 5 μm can be measured with a TEM (transmission electron microscope). The crystal defect is observed by a plan-view with TEM and indicates the average defect density.
[0012]
Furthermore, the nitride semiconductor substrate of the present invention is doped with n-type impurities. Preferably, the n-type impurity has a concentration gradient in the nitride semiconductor substrate, and more preferably, as the n-type impurity approaches either one of the first main surface and the second main surface of the nitride semiconductor substrate, n It is desirable to make the type impurity concentration small.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 to FIG. 5 are schematic cross-sectional views showing the structure of a nitride semiconductor substrate for sequentially explaining each step of the manufacturing method of the present invention. In the figure, the thin line shown inside the nitride semiconductor layer schematically shows the direction and number of crystal defects. As shown in FIG. 1, in the first step, a base layer 2 made of a first nitride semiconductor is first grown on a heterogeneous substrate 1, and no nitride semiconductor grows on the surface of the base layer 2. Alternatively, a protective film having a property that hardly grows is partially formed.
[0014]
The heterogeneous substrate 1 may be any substrate as long as it is made of a material different from that of the nitride semiconductor.2OFour) Such as an insulating substrate, SiC (including 6H, 4H, 3C), ZnS, ZnO, GaAs, Si, and an oxide substrate lattice-matched with a nitride semiconductor, etc. Substrate material can be used. Further, a substrate in which the main surface of the substrate material is off-angled can also be used.
[0015]
The growth method of the underlayer 2 is not particularly limited, and can be grown by a conventional method known for growing a nitride semiconductor such as MOVPE, MBE, HVPE or the like. Since this underlayer 2 is made of a material different from that of the heterogeneous substrate 1, it has a large number of crystal defects.8Pieces / cm2Because of the above, it is not a nitride semiconductor substrate. Most preferably, undoped GaN is grown on the underlayer.
[0016]
As the material of the protective film 10, a material having a property that the nitride semiconductor does not grow or is difficult to grow on the surface of the protective film is selected.X), Silicon nitride (SiXNY), Titanium oxide (TiOX), Zirconium oxide (ZrO)XIn addition to oxides and nitrides such as), and multilayer films thereof, metals having a melting point of 1200 ° C. or higher can be used. These protective film materials can withstand the nitride semiconductor growth temperature of 600 ° C. to 1100 ° C., and the nitride semiconductor does not grow or hardly grow on the surface thereof. In order to form the protective film partially (= selectively), for example, a photomask having a predetermined shape is produced by using a photolithography technique, and the material is formed into a gas phase through the photomask. By doing so, a protective film having a predetermined shape can be formed. The shape of the protective film 10 is not particularly limited. For example, the protective film 10 can be formed in the shape of dots, stripes, and a grid surface, and is preferably formed in a stripe shape. FIG. 1 shows a partial cross-sectional view when a stripe-shaped protective film is formed on the underlayer 2 and the wafer is cut in a direction perpendicular to the stripe. In particular, as shown in FIG. 1, if the area of the exposed portion (window) of the protective film 10 formed partially is smaller than the area of the protective film, the number of crystal defects dislocation from the underlying layer is reduced, and the crystal This is particularly desirable because a nitride semiconductor substrate with few defects can be grown.
[0017]
When the protective film 10 is formed in a stripe shape, the width of the window is adjusted to 10 μm or less, more preferably 5 μm or less, and most preferably 3 μm or less. When the width is larger than 10 μm, the number of crystal defects grown on the protective film tends to increase. Furthermore, in order to obtain a nitride semiconductor substrate with few crystal defects, the ratio Ws / Ww of the width (Ww) of the window portion and the width (Ws) of the protective film is preferably greater than 1 and not more than 20. Preferably it is 10 or less.
[0018]
Next, in the second step of the present invention, MOVPE is used to grow the second nitride semiconductor 3 from the base layer to the top of the protective film as shown in FIG. The second nitride semiconductor 3 is most preferably grown from undoped GaN or GaN doped with n-type impurities in order to obtain a nitride semiconductor with few crystal defects.
[0019]
As shown in FIG. 2, when the second nitride semiconductor 3 is grown on the underlayer 2 on which the protective film 10 is formed, the nitride semiconductor does not grow on the protective film 10, and the window portion The second nitride semiconductor 3 is first selectively grown on the underlayer. As the growth continues, the second nitride semiconductor grows laterally on the protective film 10. A nitride semiconductor that grows in the horizontal direction is different from a nitride semiconductor that grows in the vertical direction like an underlayer, so that the crystal defects are covered with the protective film 10, so that the crystal defects do not dislocation. Crystal defects extend in the lateral direction at the top of the protective film, but tend to stop halfway. Further, although there are crystal defects that dislocation from the window portion appear on the surface of the second nitride semiconductor layer, they tend to stop on the way. If this step is performed by HVPE, the number of crystal defects in the second nitride semiconductor layer tends to increase. This is not preferable in the present invention.
[0020]
In the method of the present invention, as a specific means for growing the second nitride semiconductor layer in the lateral direction substantially perpendicular to the plane of the protective film on the surface of the protective film 10 as shown in FIG. When the nitride semiconductor is grown, it is desirable to adjust the molar ratio of the nitrogen source gas to the group 3 source gas (nitrogen source / group 3 source) to 2000 or less. The preferred molar ratio is adjusted to 1800 or less, more desirably 1500 or less. The lower limit is not particularly limited as long as it is greater than or equal to the stoichiometric ratio, but is desirably adjusted to 10 or more, more preferably 30 or more, and most preferably 50 or more. If the molar ratio is larger than 2000, a triangular nitride semiconductor grows from the window and the crystal defects grow accordingly. Therefore, the crystal defects are less likely to stop halfway, and the number of crystal defects is small. Become more. However, when the gas flow rate is adjusted in this way, a nitride semiconductor grows perpendicularly to the horizontal surface of the protective film, and the vertical surface becomes like a wall and is connected on the protective film. Crystal defects tend to stop during the growth. In addition, crystal defects extending from the window portion tend to stop on the way. Therefore, the second nitride semiconductor layer with few crystal defects can be grown. As shown in FIGS. 3 and 4, the triangular cavity at the substantially central portion of the protective film is a trace of the second nitride semiconductor layer extending and connected perpendicular to the lateral direction.
[0021]
When growing by the MOVPE method, a hydride gas such as ammonia or hydrazine is used as a nitrogen source gas, and an organic Ga gas such as TMG (trimethyl gallium) or TEG (triethyl gallium) is used as a group 3 source gas. Organic Al and organic In gas such as TMA and TMI are used.
[0022]
Further, the n-type impurities such as Si and Sn can be doped during the growth of the second nitride semiconductor layer. n-type impurity concentration is 5 × 1016/cmThree~ 5x10twenty one/cmThreeIt is desirable to dope in the range of. 5 × 1016/cmThreeIf less, the carrier concentration of the second nitride semiconductor layer becomes insufficient, and the resistivity tends to increase. 5 × 10twenty one/cmThreeIf it is more than 1, the impurity concentration is high, so that the crystallinity is deteriorated and crystal defects tend to increase. The preferred range is 1 × 1017/cmThree~ 1x1020/cmThreeIt is.
[0023]
Furthermore, when the second nitride semiconductor is doped with n-type impurities, it is desirable to provide a concentration gradient in the n-type impurities. In particular, it is desirable that the concentration gradient is adjusted so that the n-type impurity concentration decreases as the distance from the dissimilar substrate increases. This is because the heterogeneous substrate, the base layer, and the protective film are removed, and when the n-electrode is provided on the second nitride semiconductor layer, whatever surface is exposed, the surface is compared with other portions. Since the n-type impurity layer is highly doped, the structure becomes n +, n, and when, for example, a light emitting device structure is stacked on a nitride semiconductor substrate, the Vf of the light emitting device is lowered and the output is improved. .
[0024]
Next, as shown in FIG. 3, when the growth of the second nitride semiconductor layer 3 is continued, the second nitride semiconductor layers that grow laterally on the protective film are connected and integrated. The second nitride semiconductor is a nitride semiconductor substrate having crystal defects that are one digit or more smaller than the above-described underlayer. However, since the film thickness is smaller than that of the base layer, it becomes a substrate in a state where a heterogeneous substrate is attached. However, if the heterogeneous substrate is removed, the second nitride semiconductor tends to be broken apart and hardly become a substrate.
[0025]
The growth thickness of the second nitride semiconductor layer is 1 μm or more, preferably 5 μm or more, and most preferably 10 μm or more, although it depends on the formation width of the protective film 10. This is a film thickness range for covering the upper portion of the protective film with the second nitride semiconductor layer. When the thickness is less than 1 μm, the second nitride semiconductor layer grows laterally on the protective film. Since it tends to be difficult, the number of crystal defects in the third nitride semiconductor layer grown on the second nitride semiconductor layer tends to increase. It is difficult to reduce crystal defects unless it grows laterally. The upper limit is not particularly limited, but is preferably 70 μm or less. If the growth is thicker than 70 μm, the growth time becomes long, the surface of the nitride semiconductor layer becomes rough, and the protective film tends to be decomposed, which is not preferable.
[0026]
Next, in the third step, the third nitride semiconductor 4 is grown on the second nitride semiconductor layer 3 by HVPE with a thickness greater than that of the second nitride semiconductor layer. FIG. 4 shows the state after growth. When GaN is grown as a thick film by MOVPE, the GaN surface tends to become rough. This is because the surface is roughened due to distortion with a different type of substrate due to growth for a long time. If the film is grown for a long time, a protective film (for example, SiO 22) Tends to decompose, and pits tend to appear in the nitride semiconductor grown on the protective film. On the other hand, in HVPE, since the growth rate is several times faster than MOVPE, for example, 300 μm can be grown in several hours. For this reason, the third nitride semiconductor having a uniform surface can be grown because it is difficult to be affected by the distortion of the different type substrate and the decomposition of the protective film can be suppressed. In the third step of the present invention, it is desirable that the second nitride semiconductor layer 3 shown in FIG. 3 is grown on the entire upper portion of the protective film and then grown on the second nitride semiconductor layer. However, as shown in FIG. 2, the third step can be performed even when the second nitride semiconductor layer is partially covered with the protective film, and is within the scope of the claims of the present invention. .
[0027]
In HVPE, HCl gas is allowed to flow through Ga metal, while ammonia gas is allowed to flow through another gas pipe, and these gases are mixed on the substrate.
GaCl + NHThree→ GaN + HCl + H2
The following reaction takes place. When the third nitride semiconductor is grown as a thick film by HVPE on the second nitride semiconductor with few crystal defects in this way, there are almost no crystal defects extending in the vertical direction, and the entire crystal defects are very large. Less nitride semiconductor can be grown. The third nitride semiconductor layer has fewer crystal defects than the second nitride semiconductor. For example, the final surface vicinity is 1 × 10 5.Five/cm2A substrate having the following crystal defects is obtained.
[0028]
During the growth of the third nitride semiconductor layer, the aforementioned n-type impurities such as Si and Sn can be doped. The n-type impurity concentration is 5 × 10 5 as in the case of the second nitride semiconductor layer.16/cmThree~ 5x10twenty one/cmThreeRange, preferably 1 × 1017/cmThree~ 1x1020/cmThreeAnd
[0029]
As a more preferable aspect, when the third nitride semiconductor is doped with an n-type impurity, it is desirable to provide a concentration gradient in the n-type impurity. In particular, it is desirable that the concentration gradient is adjusted so that the n-type impurity concentration decreases as the distance from the dissimilar substrate increases. Since the operation is the same as that of the second nitride semiconductor layer, the description thereof is omitted.
[0030]
The thickness of the third nitride semiconductor layer is desirably 10 μm or more, preferably 50 μm or more, and more preferably 100 μm or more. When the thickness is less than 10 μm, the number of crystal defects tends to be less likely to decrease. Although an upper limit is not specifically limited, It is desirable to set it as 1 mm or less. This is because if the growth is thicker than 1 mm, the entire wafer is warped due to the difference in thermal expansion coefficient between the nitride semiconductor and the heterogeneous substrate, and the third nitride semiconductor layer tends to be difficult to grow with a uniform film thickness. .
[0031]
Next, in the fourth step of the present invention, after the growth of the third nitride semiconductor 3, at least the heterogeneous substrate 1, the underlayer 2, and the protective film 10 are removed. FIG. 5 shows the structure after the second nitride semiconductor layer 3 is also removed. For example, when the second nitride semiconductor layer 2 is grown to a thickness of 20 μm or more, a different substrate, an underlayer, The protective film can be removed to leave the second nitride semiconductor 3 as well. In this way, when the different substrate side is removed and the two main surfaces of the substrate made only of the nitride semiconductor are exposed, crystal defects extending in the longitudinal direction may remain on the original different substrate side. However, on the third nitride semiconductor layer side, there are almost no crystal defects extending in the vertical direction, and the entire crystal defects are, for example, 1 × 10 6.Five/cm2It is very less with the following. Even if another semiconductor layer is stacked on the third nitride semiconductor layer 4, there is no crystal defect in the vertical direction, and therefore there is no threading dislocation of crystal defects, and a very good semiconductor can be stacked. Therefore, when a nitride semiconductor is used as the substrate, it is desirable that the surface opposite to the surface from which the heterogeneous substrate is removed be the growth surface. There are techniques such as polishing and etching to remove the different types of substrates. However, since different materials are laminated, it is most preferable to remove them by polishing.
[0032]
The nitride semiconductor substrate of the present invention is a nitride semiconductor substrate grown by HVPE and having a first main surface and a second main surface, and the first main surface or the vicinity of the second main surface. 1 × 10 crystal defectsFivePiece / cm2The growth method is not particularly limited and is preferably a substrate obtained by the above-described method. Thus, the crystal defects near the surface are 1 × 10FivePiece / cm2When an element structure is formed by laminating another nitride semiconductor on the following nitride semiconductor substrate, a long-life element excellent in reliability with no crystal defects inside can be obtained. Especially when a laser device is fabricated, the nitride semiconductor substrate has much better thermal conductivity than conventional sapphire, so when the substrate and heat sink are in contact, the heat dissipation is improved and a long-life laser is realized. it can.
[0033]
As a preferred embodiment, the nitride semiconductor substrate is doped with an n-type impurity, more preferably, the n-type impurity has a concentration gradient in the nitride semiconductor substrate, and most preferably the nitride semiconductor substrate. It is desirable that the n-type impurity concentration decreases as one of the first main surface and the second main surface approaches.
[0034]
【Example】
[Example 1]
Hereinafter, embodiments of the present invention will be described with reference to FIGS.
(First step)
A heterogeneous substrate 1 made of sapphire with a 2-inch φ and C-plane as the main surface is set in a MOVPE reaction vessel, and the temperature is set to 500 ° C., and trimethylgallium (TMG), ammonia (NHThree) Is used to grow a buffer layer (not shown) made of GaN with a film thickness of 200 Å. After growing the buffer layer, the temperature is set to 1050 ° C., and the underlayer 2 made of GaN is grown to a thickness of 4 μm.
[0035]
After the underlayer 2 is grown, the wafer is taken out of the reaction vessel, a striped photomask is formed on the surface of this underlayer, and a SiO 2 having a stripe width of 10 μm and a stripe interval (window) of 2 μm is formed by a CVD apparatus.2A protective film 10 is formed to a thickness of 0.5 μm. The structure of the wafer after forming the protective film is shown in FIG.
[0036]
(Second step)
After forming the protective film 10, the wafer is set again in the MOVPE reaction vessel, the temperature is set to 1050 ° C., ammonia is 0.27 mol / min, and TMG is 225 μmol / min (V / III ratio = 1200) from undoped GaN. A second nitride semiconductor layer 3 is grown to a thickness of 30 μm. When grown at such a molar ratio, as shown in FIG. 2, the second nitride semiconductor 3 can be grown with the end face being substantially perpendicular to the horizontal surface of the protective film, and crystal defects are greatly reduced. The grown second nitride semiconductor layer can be grown with a uniform film thickness as shown in FIG. 3. When the vicinity of the surface is observed with a TEM, crystal defects extending from the window portion are observed in the second nitride semiconductor layer. It stopped on the way, and there was hardly anything appearing on the surface.
[0037]
(Third step)
After the growth of the second nitride semiconductor layer 3, the wafer is transferred to the HVPE apparatus, and the third nitride semiconductor layer 4 made of undoped GaN is grown to a thickness of 200 μm using Ga metal, HCl gas, and ammonia as raw materials. Let The structure of the grown wafer is shown in FIG. When the number of crystal defects near the surface of the third nitride semiconductor layer after the growth is observed by TEM, 1 × 10FourPiece / cm2It turned out that the following and the very favorable board | substrate were obtained. Furthermore, even with very few crystal defects, only crystal defects that were almost horizontal to the plane remained.
[0038]
(Fourth process)
Next, the wafer is transferred to a polishing apparatus, and the heterogeneous substrate 1, the underlayer 2, the protective film 10, and the second nitride semiconductor layer 3 are removed using a diamond polishing agent, and the third substrate as shown in FIG. The back surface of the nitride semiconductor layer 4 is exposed to form a nitride semiconductor substrate having a total film thickness of 195 μm. The crystal defects on the back side are also 1 × 10FivePiece / cm2There were few less.
[0039]
[Example 2]
In the third step of Example 1, silane gas is added to the source gas of HVPE, and Si is first added to 1 × 10.19/cmThreeAs GaN is grown while doping, the flow rate of the silane gas is decreased as the growth proceeds, and finally Si is increased to 5 × 10 5.16/cmThreeAs doped GaN, GaN having a Si concentration gradient is grown to a thickness of 200 μm. Other than that, a nitride semiconductor substrate was obtained in the same manner as in Example 1. As a result, a nitride semiconductor substrate having substantially the same number of crystal defects as that of Example 1 on the surface with a small amount of Si was obtained.
[0040]
[Example 3]
In the second step of Example 1, silane gas is added to the MOVPE source gas, and Si is first added to 1 × 10 6.19/cmThreeAs GaN is grown while doping, the flow rate of silane gas is reduced as the growth proceeds, and finally Si is added at 1 × 10.17/cmThreeAs doped GaN, GaN having a Si concentration gradient is grown to a thickness of 20 μm. Subsequently, in the third step, Si is 1 × 1017/cmThreeDoped GaN is grown to a thickness of 200 μm. Thereafter, in the fourth step, the heterogeneous substrate, the underlayer, the protective film, and the first nitride semiconductor layer are removed by 15 μm. In the nitride semiconductor substrate obtained as described above, the main surface of the third nitride semiconductor layer was almost the same as in Example 1, but the crystal defects on the second nitride semiconductor side were the third. Compared to the nitride semiconductors of this, it was about an order of magnitude more.
[0041]
[Example 4]
The main surface of the nitride semiconductor substrate of Example 1 on the side where the heterogeneous substrate is not removed is faced up, and a nitride semiconductor layer is grown on this surface as follows to obtain the laser device shown in FIG.
[0042]
On the nitride semiconductor substrate 4 obtained in Example 1
(N-side contact layer 21)
Using ammonia and TMG, silane gas as impurity gas, Si was 3 × 10 at 1050 ° C.18/cmThreeAn n-side contact layer 5 made of doped GaN is grown to a thickness of 4 μm.
[0043]
(Crack prevention layer 22)
Next, using TMG, TMI (trimethylindium), and ammonia, the temperature is set to 800 ° C. and In0.06Ga0.94A crack prevention layer 22 made of N is grown to a thickness of 0.15 μm. This crack prevention layer can be omitted.
[0044]
(N-side cladding layer 23)
Subsequently, using TMA, TMG and ammonia at 1050 ° C., undoped Al0.16Ga0.84A layer made of N is grown to a film thickness of 25 Å, then TMA is stopped, silane gas is flowed, and Si is 1 × 10 × 10.19/cmThreeA layer made of doped n-type GaN is grown to a thickness of 25 Å. These layers are alternately stacked to form a superlattice layer, and an n-side cladding layer 23 made of a superlattice having a total film thickness of 1.2 μm is grown.
[0045]
(N-side light guide layer 24)
Subsequently, the silane gas is stopped, and an n-side light guide layer 8 made of undoped GaN is grown at 1050 ° C. to a thickness of 0.1 μm. The n-side light guide layer 24 may be doped with n-type impurities.
[0046]
(Active layer 25)
Next, the temperature was set to 800 ° C. and undoped In0.01Ga0.95A barrier layer of N is grown to a thickness of 100 Å, and then at the same temperature, undoped In0.2Ga0.8A well layer made of N is grown to a thickness of 40 Å. A barrier layer and a well layer are alternately stacked three times, and finally, an active layer of a multiple quantum well structure (MQW) having a total film thickness of 520 Å is grown by ending with the barrier layer. The active layer may be undoped as in this embodiment, or may be doped with n-type impurities and / or p-type impurities. Impurities may be doped into both the well layer and the barrier layer, or one of them may be doped. Furthermore, the stacking order may be from the well layer and end with the well layer, from the well layer and end with the barrier layer, or from the barrier layer and end with the well layer.
[0047]
(P-side cap layer 26)
Next, the temperature was raised to 1050 ° C., TMG, TMA, ammonia, Cp 2 Mg (cyclopentadienyl magnesium) was used, and Mg was 1 × 1020/cmThreeDoped p-type Al0.3Ga0.7A p-side cap layer 26 made of N is grown to a thickness of 300 angstroms.
[0048]
(P-side light guide layer 27)
Stop Cp2Mg and TMA, Mg 5 × 1016/cmThreeA p-side light guide layer 27 made of doped GaN is grown to a thickness of 0.1 μm.
[0049]
(P-side cladding layer 28)
Next, undoped Al0.16Ga0.84A layer of N is grown to a thickness of 25 Å, followed by Mg of 1 × 1019/cmThreeLayers made of doped GaN are grown to a thickness of 25 angstroms and are alternately stacked to grow a p-side cladding layer 28 made of a superlattice layer with a total thickness of 0.6 μm.
[0050]
(P-side contact layer 29)
Finally, Mg is 1 × 1020/cmThreeA p-side contact layer 29 made of doped p-type GaN is grown to a thickness of 150 Å.
[0051]
The wafer on which the nitride semiconductor has been grown as described above is taken out of the reaction vessel, and SiO 2 is deposited on the surface of the uppermost p-side contact layer 29.2A protective film is formed, and SiCl is formed using RIE (reactive ion etching).FourEtching with gas exposes the surface of the n-side contact layer 21 where the n-electrode is to be formed, as shown in FIG.
[0052]
Next, a mask having a predetermined shape is applied to the uppermost p-side contact layer 29, and the p-side contact layer 29 and the p-side cladding layer 28 are etched to form a ridge stripe having a width of 1 μm. ZrO on the side2An insulating film 30 is formed, and a p-electrode 31 electrically connected to the p-side contact layer is formed through the insulating film 30. On the other hand, an n-electrode 32 is formed on the surface of the n-side contact layer exposed earlier.
[0053]
As described above, the nitride semiconductor substrate of the wafer on which the n-electrode and the p-electrode are formed is polished and thinned, and then the nitride semiconductor substrate is cleaved to form the resonance surface of the laser element on the cleaved surface. After cleavage, it was separated into chips, and the nitride semiconductor substrate side was placed on a heat sink to form a laser element, which showed laser oscillation at room temperature and had a threshold current density of 1.5 kA / cm.2At room temperature, continuous oscillation was observed, and a lifetime of 1000 hours or longer was exhibited at an output of 20 mW.
[0054]
In this example, the laser element was manufactured using the substrate obtained in Example 1. However, even in the case where both the n and p electrodes are extracted from the same surface side, Example 2 and Example 3 are used. A nitride semiconductor substrate in which a concentration gradient is provided in the n-type impurity obtained in (1) can be used. In this case, the n-side contact layer 21 is not necessary, and the second nitride semiconductor layer 3 or the third nitride semiconductor layer provided with a concentration gradient by etching is exposed, and an n-electrode 32 is formed on the exposed surface. That's fine.
[0055]
[Example 5]
On the nitride semiconductor substrate obtained in Example 2 (surface opposite to the surface from which the different substrate is removed), the crack prevention layer 22, the n-side cladding layer 23, and the n-side light guide layer are formed in the same manner as in Example 4. 24, an active layer 25, a p-side cap layer 26, a p-side light guide layer 27, a p-side cladding layer 28, and a p-side contact layer 29 are laminated.
[0056]
Subsequently, a ridge stripe having a width of 1 μm is formed in the p-side contact layer 29 and the p-side cladding layer in the same manner as in Example 4, and the insulating film 30 is formed. After the formation of the insulating film, the nitride semiconductor substrate provided with the concentration gradient was polished to a thickness capable of cleaving, and then cleaved in the same manner as in Example 4 to obtain a laser element. In Example 5, since the concentration gradient is provided even when the nitride semiconductor substrate is polished, the exposed surface is always a layer doped with n-type impurities at a high concentration in the nitride semiconductor substrate. As shown in FIG. 7, when an n-electrode was formed on the substrate side and a p-electrode was formed on the ridge side to form a laser element, a laser element having substantially the same characteristics as in Example 4 was obtained.
[0057]
【The invention's effect】
As described above, according to the method of the present invention, it is possible to obtain a nitride semiconductor substrate having a very good crystallinity which has not been obtained conventionally. When a nitride semiconductor is grown on the nitride semiconductor substrate, the lattice is perfectly matched, so that an element with very few crystal defects can be obtained. Therefore, even if a laser element used in the severest condition, for example, has a threading dislocation reaching the active layer, a long-life and highly reliable element can be realized.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing a structure of a nitride semiconductor substrate for explaining a first step of the present invention.
FIG. 2 is a schematic cross-sectional view showing the structure of a nitride semiconductor substrate for explaining a second step of the present invention.
FIG. 3 is a schematic cross-sectional view showing the structure of a nitride semiconductor substrate for explaining a second step of the present invention.
FIG. 4 is a schematic cross-sectional view showing the structure of a nitride semiconductor substrate for explaining a third step of the present invention.
FIG. 5 is a schematic cross-sectional view showing the structure of a nitride semiconductor substrate for explaining a fourth step of the present invention.
FIG. 6 is a schematic cross-sectional view showing the structure of a laser device using a substrate according to an embodiment of the present invention.
FIG. 7 is a schematic cross-sectional view showing the structure of a laser device using a substrate according to another embodiment of the present invention.
[Explanation of symbols]
1 ... Different substrates
2 ... Underlayer
3 ... Second nitride semiconductor layer
4 ... Third nitride semiconductor layer
10 ... Protective film
21 ... n-side contact layer
22 ... Crack prevention layer
23 ... n-side cladding layer
24 ... n-side light guide layer
25 ... Active layer
26 ... p-side cap layer
27 ... p-side light guide layer
28 ... p-side cladding layer
29 ... p-side contact layer
30 ... Insulating film
31 ... p electrode
32 ... n electrode

Claims (9)

窒化物半導体と異なる材料よりなる異種基板上に、まず第1の窒化物半導体よりなる下地層を成長させ、その下地層の上に表面に窒化物半導体が成長しないか、若しくは成長しにくい性質を有する保護膜を部分的に形成する第1の工程と、第1の工程後、有機金属気相成長法により、下地層から前記保護膜上部に至るまで、第2の窒化物半導体を成長させて、前記保護膜のほぼ中央部に空洞を形成する第2の工程と、第2の工程後、ハイドライド気相成長法により、第2の窒化物半導体層の上に、その第2の窒化物半導体層よりも厚い膜厚で第3の窒化物半導体を成長させる第3の工程とを具備することを特徴とする窒化物半導体基板の製造方法。A base layer made of a first nitride semiconductor is first grown on a different substrate made of a material different from that of the nitride semiconductor, and the nitride semiconductor does not grow on the surface or is difficult to grow on the base layer. a first step of the protective film partially formed with, after the first step, by metalorganic vapor phase epitaxy, the base layer up to the said protective film upper, by growing a second nitride semiconductor A second step of forming a cavity in the substantially central portion of the protective film; and after the second step, the second nitride semiconductor is formed on the second nitride semiconductor layer by hydride vapor phase epitaxy. And a third step of growing a third nitride semiconductor with a thickness greater than that of the layer. 前記第2の工程、または第3の工程の少なくとも一方の工程において、窒化物半導体にn型不純物をドープすることを特徴とする請求項1に記載の窒化物半導体基板の製造方法。2. The method of manufacturing a nitride semiconductor substrate according to claim 1, wherein the nitride semiconductor is doped with an n-type impurity in at least one of the second step and the third step. 前記第2の窒化物半導体層は、端面が保護膜の水平面に対してほぼ垂直な形状で成長させることを特徴とする請求項1に記載の窒化物半導体基板の製造方法。2. The method of manufacturing a nitride semiconductor substrate according to claim 1, wherein the second nitride semiconductor layer is grown in a shape in which an end face is substantially perpendicular to a horizontal plane of the protective film. 前記第2の窒化物半導体層は、窒素源のガスのモル比(窒素源/3族源)を2000以下に調整して成長させることを特徴とする請求項1に記載の窒化物半導体基板の製造方法。2. The nitride semiconductor substrate according to claim 1, wherein the second nitride semiconductor layer is grown by adjusting a molar ratio of a nitrogen source gas (nitrogen source / group 3 source) to 2000 or less. Production method. 前記第2の工程、または前記第3の工程の内の少なくとも一方の工程において、窒化物半導体層中のn型不純物に濃度勾配を設けることを特徴とする請求項2に記載の窒化物半導体基板の製造方法。 3. The nitride semiconductor substrate according to claim 2, wherein a concentration gradient is provided in the n-type impurity in the nitride semiconductor layer in at least one of the second step and the third step. Manufacturing method. 前記濃度勾配は異種基板から離れるに従ってn型不純物濃度が小さくなるように調整されていることを特徴とする請求項3に記載の窒化物半導体基板の製造方法。4. The method for manufacturing a nitride semiconductor substrate according to claim 3, wherein the concentration gradient is adjusted such that the n-type impurity concentration decreases as the distance from the different substrate increases. 前記第3の窒化物半導体成長後、少なくとも異種基板、下地層、および保護膜を除去する第4の工程を具備することを特徴とする請求項1乃至の内のいずれか1項に記載の窒化物半導体基板の製造方法。After the third nitride semiconductor growth, at least a heterologous substrate, underlayer, and according to any one of claims 1 to 6, characterized by comprising a fourth step of removing the protective film A method for manufacturing a nitride semiconductor substrate. ハイドライド気相成長法により成長され、第1の主面と第2の主面とを有する窒化物半導体基板であって、前記第1の主面、若しくは第2の主面近傍の結晶欠陥が1×105個/cm2以下であり、前記窒化物半導体基板にはn型不純物が含有されており、該n型不純物は窒化物半導体基板内で濃度勾配を有することを特徴とする窒化物半導体基板。A nitride semiconductor substrate grown by a hydride vapor phase growth method and having a first main surface and a second main surface, wherein crystal defects near the first main surface or the second main surface are 1 × Ri 10 5 / cm 2 or less der, wherein the nitride semiconductor substrate are contained in n-type impurity, the n-type impurity is characterized Rukoto to have a concentration gradient in the nitride semiconductor substrate Nitride semiconductor substrate. 前記窒化物半導体基板の第1の主面若しくは第2の主面のいずれか一方の面に接近するに従って、n型不純物濃度が小さくなるようにされていることを特徴とする請求項8に記載の窒化物半導体基板。9. The n-type impurity concentration is made smaller as approaching either one of the first main surface and the second main surface of the nitride semiconductor substrate. Nitride semiconductor substrate.
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