JP3438675B2 - Method for growing nitride semiconductor - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a nitride semiconductor (In
_X Al _Y Ga _1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1), particularly to a method for growing a nitride semiconductor that can be a nitride semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, in order to manufacture a nitride semiconductor substrate having a low dislocation density, a different kind of nitride semiconductor substrate such as sapphire, spinel, silicon carbide or Si has been used.
A method for forming a nitride semiconductor with few dislocations by selectively growing the nitride semiconductor laterally (ELOG (Epi (Epi
Various taxially laterally overgrown GaN) growth methods are being studied. If a nitride semiconductor substrate having a low dislocation density can be manufactured, the lifetime of the nitride semiconductor element can be extended.

As such an ELOG growth method, for example, J
pn. J. Appl. Phys. Vol. 37 (199
8) pp. For L309-L312, a mask of SiO ₂ or the like is partially (for example, stripe-shaped) formed on a nitride semiconductor grown on the c-plane of sapphire, and a nitride semiconductor is grown on the mask to form a nitride film. It is disclosed that the selective growth of the object semiconductor in the lateral direction is performed. Since the nitride semiconductor does not grow directly on SiO ₂ , the nitride semiconductor grows laterally with the exposed region of the nitride semiconductor as a nucleus. The dislocation generated at the interface serving as the growth starting point of the nitride semiconductor progresses in the lateral direction as it grows, but does not proceed in the longitudinal direction, so that gallium nitride having a low dislocation density can be grown on SiO _2. .

However, in the above method, the protective film such as SiO ₂ may be decomposed during the growth of the nitride semiconductor. When the SiO ₂ is decomposed, the nitride semiconductor is abnormally grown on the SiO ₂ or decomposed. The Si, O, etc. may enter the nitride semiconductor and contaminate GaN, which may cause deterioration of crystallinity. On the other hand, when the nitride semiconductor is grown at a relatively low temperature in consideration of the decomposition of SiO ₂ , the nitride semiconductor is unlikely to be a good single crystal and the crystallinity of the nitride semiconductor layer is deteriorated.

On the other hand, as an ELOG growth method which does not use a protective film such as SiO ₂ , for example, JP-A-11-
No. 145516, as shown in FIG. 6, an AlGaN layer 12 not epitaxially grown on the silicon substrate 10 is grown to about 1000 angstroms, and the AlG layer 12 is further grown.
After the GaN layer 13 is grown to 1000 angstroms on the aN layer 12, Ga is exposed to expose the silicon substrate.
A method is disclosed in which the N layer 13 and the AlGaN layer 12 are etched in stripes to form irregularities, and the GaN layer 14 is grown on the stripe-shaped GaN layer 13.

In this technique, the GaN layer 14 cannot be epitaxially grown on the silicon substrate 10, and the GaN layer 1
Can grow only on 3. Therefore, the silicon substrate 1
Above the exposed portion (recessed portion) of 0, the GaN layer 14 that has grown with the stripe-shaped GaN layer 13 as a nucleus is laterally epitaxially grown to expose the upper portion of the exposed portion (recessed portion) of the silicon substrate 10. Can grow and cover.

[0007]

However, according to the method described in Japanese Patent Laid-Open No. 11-145516, the method shown in FIG.
As schematically shown in FIG. 1, when the GaN layer 14 is laterally grown, the amorphous GaN 16 may be slightly deposited on the exposed silicon substrate 10. When the amorphous GaN 16 comes into contact with the GaN layer 14 which is being grown laterally, the crystal growth of the GaN layer 14 is disturbed, and the crystallinity of the GaN layer 14 that can be the GaN substrate obtained is reduced.

Therefore, the present invention solves the above problems due to the exposure of the substrate on which the nitride semiconductor cannot be epitaxially grown in the lateral growth process of the nitride semiconductor, and the nitride having good crystallinity is solved. An object of the present invention is to provide a method for growing a nitride semiconductor, which enables stable formation of a semiconductor layer.

[0009]

That is, the present invention can achieve the above object of the present invention by the following constitutions (1) to (8). (1) At least a first composition having a different composition on a substrate
First step of sequentially growing the nitride semiconductor layer and the second nitride semiconductor layer, and a step of partially etching from the surface of the second nitride semiconductor layer toward the substrate to form irregularities. With the second nitride semiconductor layer remaining on the first nitride semiconductor layer not etched in the second step and the second step as a nucleus, the second nitride semiconductor layer has substantially the same composition as that of the second nitride semiconductor layer. And a third step of growing the third nitride semiconductor layer by utilizing lateral growth. In the method of growing a nitride semiconductor, in the first step, the first nitride semiconductor layer and The composition of the second nitride semiconductor layer is the third
The growth of the third nitride semiconductor layer grown in the step of
Is adjusted so as to slow down the growth rate by using the nitride semiconductor layer as a nucleus, and the first nitride semiconductor layer and the second nitride semiconductor layer are both epitaxially grown, and in the second step, The method for growing a nitride semiconductor is characterized in that the etching is performed so that the first nitride semiconductor layer is exposed and is etched at a predetermined depth. (2) Between the substrate and the first nitride semiconductor layer, A
The method for growing a nitride semiconductor according to (1) above, which comprises epitaxially growing l _k Ga _1-k N (0 ≦ k ≦ 1). (3) The first nitride semiconductor layer is at least In
The method for growing a nitride semiconductor according to (1) above, which is a nitride semiconductor containing (4) The first nitride semiconductor layer is In _a Al _b Ga
_1-ab N [0 <a <1, 0 ≦ b <1, a + b ≦ 1], The method for growing a nitride semiconductor as described in (3) above. (5) The method for growing a nitride semiconductor as described in (4) above, wherein the first nitride semiconductor layer is In _a Al _b N or In _a Ga _1-a N. (6) The first nitride semiconductor layer is In _a Ga _{1 -a} N
The method for growing a nitride semiconductor according to (5) above. (7) In the second step, the unevenness formed on the second nitride semiconductor layer 28 has a stripe shape, and the unevenness of the stripe shape is either left or right with respect to the vertical axis from the orientation flat surface. The method for growing a nitride semiconductor as described in (1) above, wherein the nitride semiconductor is formed with a shift of about 0.1 ° to 1 °. (8) The substrate is a heterogeneous substrate different from a nitride semiconductor or a nitride semiconductor substrate.
A method for growing a nitride semiconductor according to claim 1.

That is, according to the present invention, the first and second nitride semiconductor layers are formed so that the growth rates of the third nitride semiconductor layer grown by using the first and second nitride semiconductor layers as nuclei are different. The first layer grown with a composition different from each other and with a composition slowing the growth rate of the third nitride semiconductor layer.
Exposing the nitride semiconductor layer at the bottom of the recess by etching, whereby the third nitride semiconductor layer selectively grows by using lateral growth using the second nitride semiconductor layer as a nucleus. It is possible to provide a nitride semiconductor growth method capable of stably forming a nitride semiconductor layer having good crystallinity without disturbing the crystal growth by the amorphous nitride semiconductor as in the above problem. As described above, the present invention utilizes the fact that the epitaxial growth rate for semiconductor layers having the same composition is higher than the epitaxial growth rate for semiconductor layers having different compositions, and preferentially promotes lateral growth to reduce dislocations. It is a thing.

The above-mentioned prior art, Japanese Patent Laid-Open No. 11-1455.
In 16 JP technology, as shown in FIG. 11, SiO ₂
It is possible to reduce dislocations by utilizing the lateral growth of the nitride semiconductor by forming the unevenness without using a protective film such as. However, the bottom surface of the formed recess is
Since the GaN layer 14 is the exposed surface of the Si substrate that cannot be epitaxially grown, it can be a substrate of a nitride semiconductor.
During the growth of the aN layer 14, the amorphous GaN 16 slightly formed on the Si substrate surface may come into contact with the epitaxially grown GaN layer 14 and reduce the crystallinity of the GaN layer 14.

On the other hand, according to the present invention, the surfaces to be exposed by forming the irregularities are the first nitride semiconductor layer and the second nitride semiconductor layer on which the third nitride semiconductor layer can be epitaxially grown. Therefore, even if the third nitride semiconductor layer grows vertically with the first nitride semiconductor layer exposed at the bottom of the recess as the nucleus, the amorphous nitride semiconductor as in the conventional case is used. The crystallinity is not disturbed by the growth of. Further, according to the present invention, the growth of the third nitride semiconductor layer is more important than the growth of the second nitride semiconductor layer as a nucleus.
Since the growth rate of the first nitride semiconductor layer as a nucleus is low, the third nitride semiconductor layer can selectively grow easily as a nucleus of the second nitride semiconductor layer, so that the vertical direction from the bottom of the recess is increased. Directional growth is prevented. As a result, the third nitride semiconductor layer that grows above the recess to cover the recess is formed by favorable lateral growth without disturbing the crystal growth, and thus has very few dislocations and crystal. It becomes a nitride semiconductor having good properties.

Further, in the present invention, the third nitride semiconductor layer grown on the upper portion of the convex portion has relatively more dislocations than on the upper portion of the concave portion. The reason for this is considered to be that the third nitride semiconductor layer grows in the vertical direction toward the upper portion of the recess, so that the dislocations are not reduced so much. Further, in the case of manufacturing an element using the above-mentioned third nitride semiconductor layer as a substrate, if the ridge-shaped stripe is formed in the upper part of the concave part where the central part of the concave part is removed, a device having good life characteristics and the like can be obtained. be able to. This is because the central portion of the recess is a portion where the third nitride semiconductor layers grown in the lateral direction are joined to each other, and thus a void or the like may occur. In addition, after the first to third steps,
The above steps may be repeated again. By repeating the steps in this manner, dislocations are extremely reduced over the entire growth surface of the nitride semiconductor, which is preferable. However, when the process is repeated, it is possible to perform so that the second convex portion is located above the first concave and convex portion and the second concave portion is located above the first convex portion. Is preferable in terms of reduction of crystallinity and crystallinity.

Further explaining the present invention, according to this method, the third nitride semiconductor layer grown in the third step has a region (bottom of the recess) where the first nitride semiconductor layer is exposed.
In the above, the first nitride semiconductor layer is used as a nucleus for epitaxial growth in the vertical direction, and at the same time, the second nitride semiconductor layer is used as a nucleus for lateral epitaxial growth. But,
The growth rate in the lateral direction with the second nitride semiconductor layer having the same composition as the nucleus is higher, and the first nitride semiconductor layer serving as the nucleus for the vertical growth is cut to an appropriate depth. The lateral growth using the second nitride semiconductor layer as a nucleus can proceed without being hindered by the vertical growth using the first nitride semiconductor layer as a nucleus. Therefore, the nitride semiconductor layer can be grown laterally without exposing the substrate that does not grow epitaxially, and a nitride semiconductor with few dislocations can be stably manufactured.

Further, in the present invention, the first nitride semiconductor layer is
If the nitride semiconductor contains at least In, the recessed bottom exposed by etching decomposes the In component when the third nitride semiconductor layer is grown, and the third nitride semiconductor layer becomes the recessed bottom. It becomes difficult to grow on the surface of the first nitride semiconductor layer, and the third nitride semiconductor layer growing on the upper portion of the recess is obtained by favorable lateral growth, so dislocations on the upper portion of the recess are satisfactorily reduced. It is possible and preferable. Furthermore, in the present invention, the first nitride semiconductor layer is In _a Al _b Ga.
_{When 1-ab} N [0 <a <1, 0 ≦ b <1, a + b ≦ 1], the first nitride exposed at the bottom of the recess when the third nitride semiconductor layer is grown. The decomposition of the surface of the semiconductor layer is preferable to make the growth rates of the third nitride semiconductor layer on the first and second nitride semiconductor layers different from each other.
Furthermore, the present invention provides that the first nitride semiconductor layer is In _a A
If it is l _b N or In _a Ga _1-a N, preferably adjustable in the growth rate of the third nitride semiconductor layer is better. Furthermore, according to the present invention, the first nitride semiconductor layer is In _a Ga _{1 -a.}
N is preferable because the growth rate of the third nitride semiconductor layer can be better adjusted.

Furthermore, according to the present invention, in the second step, the unevenness formed on the second nitride semiconductor layer has a stripe shape, and the unevenness of the stripe shape is relative to the vertical axis from the orientation flat surface. 0.1 ° to 1 on either side
If they are formed with a shift of about °, the growth surface becomes flatter, and the surface condition of the surface is good, which is preferable. The value of the shift amount is a value of θ in FIG. 4 described later. Furthermore, according to the present invention, when the etching is performed in a stripe shape or an island shape, the lateral growth of the third nitride semiconductor layer is improved, and the upper portion of the recess is easily covered, which is preferable. Furthermore, in the present invention, a heterogeneous substrate different from a nitride semiconductor or a nitride semiconductor substrate can be used as the substrate.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view schematically showing a nitride semiconductor grown on a substrate, which is obtained by the growth method of the present invention. The first nitride semiconductor layer 26 is formed on the substrate 20 by epitaxial growth, and the second nitride that can be epitaxially grown on the first nitride semiconductor layer 26 but has a different composition from that of the first nitride semiconductor layer 26 is used. The object semiconductor layer 28 is formed. Second nitride semiconductor layer 2
8 is etched in stripes or islands so that the first nitride semiconductor layer 26 is exposed from the surface to the bottom of the recess and is cut to a predetermined depth. On top of that, the second
Of the third nitride semiconductor layer 28 having substantially the same composition as the nitride semiconductor layer 28 of FIG.
It has grown to cover the entire surface of the substrate. Here, the third nitride semiconductor layer 30 can grow on both the first nitride semiconductor layer 26 exposed on the bottom surface of the concave portion and the second nitride semiconductor layer 28 on the upper portion of the convex portion. Since the composition is adjusted so that the growth rate using the first nitride semiconductor layer 26 as a nucleus is slower than that using the second nitride semiconductor layer 28 as a nucleus, the third nitride is used. The semiconductor layer 30 is selectively grown on the second nitride semiconductor layer 28 where the growth is easy.
A buffer layer 21 is preferably grown between the substrate 20 and the first nitride semiconductor layer 26. When the buffer layer 21 is grown, when the substrate 20 is a heterogeneous substrate, it is preferable in terms of alleviating lattice constant irregularities and reducing dislocations. Further, the substrate having a modified surface morphology can be improved in life characteristics. It is preferable in terms of obtaining a semiconductor.

According to the present invention, the lateral growth of the nitride semiconductor layer is preferentially caused to grow a nitride semiconductor with few dislocations, without exposing the substrate surface which cannot be epitaxially grown, according to the following principle. .

Since the third nitride semiconductor layer 30 has substantially the same composition as the second nitride semiconductor layer 28, the third nitride semiconductor layer 30 can be formed on both the first nitride semiconductor layer 26 and the second nitride semiconductor layer 28. Epitaxial growth is possible. Therefore, in the region where the first nitride semiconductor layer 26 is exposed (bottom of the recess), lateral epitaxial growth using the second nitride semiconductor layer 28 as a nucleus at the top of the recess and the first epitaxial growth at the bottom of the recess. The vertical epitaxial growth with the nitride semiconductor layer 26 as a core competes with each other. However, since the growth rate on the second nitride semiconductor layer 28 having the same composition is higher, the lateral growth with the second nitride semiconductor layer 28 as a nucleus progresses preferentially. In addition, since the first nitride semiconductor layer 26, which serves as a nucleus for the vertical growth, is etched to an appropriate depth, interference of the nitride semiconductor that grows in the vertical direction with the first nitride semiconductor layer 26 as a nucleus is prevented. Before being received, the third nitride semiconductor layers 30 laterally grown with the second nitride semiconductor layer 28 as a nucleus can be bonded to each other.

Further, according to this method, in the process of laterally growing the third nitride semiconductor layer 30, the substrate surface that cannot be epitaxially grown is not exposed, so that an amorphous nitride semiconductor is deposited. Therefore, the crystallinity of the third nitride semiconductor layer 30 is not adversely affected. Therefore, it is possible to stably grow a nitride semiconductor having good crystallinity.

2A to 2F are process sectional views showing a method for growing the nitride semiconductor shown in FIG. Board 20
Can use a different substrate or a nitride semiconductor different from the nitride semiconductor. Below, the substrate 20 is a heterogeneous substrate 201.
The case will be described.

[First Step] First, as shown in FIG. 2A, a buffer layer 21 is formed on a heterogeneous substrate 201 with a buffer layer 21 in between.
The first nitride semiconductor layer 26 is formed by metalorganic vapor phase epitaxy (MO
It is formed by an appropriate growth method such as a CVD method. As the heterogeneous substrate 201, for example, sapphire having any one of the C-plane, R-plane, and A-plane as the main surface, and spinel (MgA
Insulating substrate such as 1 ₂ O ₄ ), SiC (6H, 4H, 3
Substrate materials different from conventionally known nitride semiconductors can be used, such as C-containing), ZnS, ZnO, GaAs, Si, and oxide substrates that lattice match with nitride semiconductors. Examples of preferable different substrates include sapphire and spinel. When sapphire is used as the heterogeneous substrate 201, depending on which surface is the main surface of the sapphire,
The surface orientation of the nitride semiconductor on the upper surface of the convex portion and the side surface of the concave portion when the irregularities are formed tends to be specified, and since the growth rate of the nitride semiconductor is slightly different depending on the surface orientation, it easily grows on the side surface of the concave portion. The main surface may be selected so that the plane orientation comes.

The buffer layer 21 may be formed on the heterogeneous substrate 201 before growing the first nitride semiconductor layer 26 on the heterogeneous substrate 201. As the buffer layer 21, a known buffer layer grown at a temperature lower than that of the first nitride semiconductor layer 26 is formed. For example, the buffer layer 21
As the material, AlN, GaN, AlGaN, InGaN or the like is used. The buffer layer 21 has a temperature of 900 ° C. or lower 300
It is grown to a film thickness of 0.5 μm to 10 Å at a temperature of ≧ ° C. When the buffer layer 21 is formed on the heterogeneous substrate 201 at a temperature of 900 ° C. or lower in this manner, the irregular lattice constant between the heterogeneous substrate 201 and the first nitride semiconductor 26 is relaxed, and the dislocation of the first nitride semiconductor 26 is dissipated. Is preferred, which is preferable.

Further, before growing the first nitride semiconductor layer 26 on the buffer layer, Al _k Ga _1-k N (0 ≦ k ≦
It is preferred to grow the layer 32 consisting of 1). The growth of the Al _k Ga _{1 -k} N layer 32 is preferable for growing the first nitride semiconductor layer 26 with good crystallinity. Furthermore, when the Al _k Ga _1-k N layer 32 is grown, the first nitride semiconductor layer 26 is etched in the second step to grow to a film thickness that can be well exposed at the bottom of the recess. Is preferred. The growth temperature of the Al _k Ga _1-k N layer 32 depends on the growth temperature of this layer 32.
Is preferably at a temperature at which epitaxial growth is possible. When the Al _k Ga _1-k N layer 32 is epitaxially grown, if the Al _k Ga _1-k N layer 32 having good crystallinity is formed on the buffer layer grown on the heterogeneous substrate 201 at a low temperature, the In composition It is preferable that the first nitride semiconductor layer 26 that is grown at a relatively low temperature has good crystallinity because it contains.

The first nitride semiconductor layer 26 is formed by the third nitride semiconductor layer 26.
And a third nitride semiconductor when the semiconductor layer 30 is grown.
The growth rate of the layer is based on the second nitride semiconductor layer 28 as a nucleus.
Rather than growing, using the first nitride semiconductor layer 26 as a nucleus
It is a nitride semiconductor whose composition slows down the growth rate.
If not, there is no particular limitation. Preferred first nitride semiconductor layer
26 is a nitride semiconductor containing at least In
Body layers can be used and more preferably, for example, one
General formula In_aAl_bGa_1-abN (0 <a <1, 0 ≦ b <
1, a + b ≦ 1) nitride semiconductor of arbitrary composition
Can be mentioned. More preferred first nitride semiconductor
As the body layer 26, In_aAl_bN or In _aGa_1-aN is
In particular, In is preferable._aGa_1-aN is mentioned
It Of the first nitride semiconductor layer 26 represented by the above general formula
The In composition ratio and the Al composition ratio are the same as those of the third nitride semiconductor layer 3
Growth of third nitride semiconductor layer 30 when growing 0
The speed is higher than that of the first nitride semiconductor layer 28.
The growth rate for the nitride semiconductor layer 26 is slowed down.
Any composition that causes a difference in growth rate will suffice.
A composition that gives relatively good crystallinity is preferable.

As described above, the first nitride semiconductor layer 26
Is made of a nitride semiconductor containing at least In, when I grows the third nitride semiconductor layer 30,
n is decomposed by heat and the surface is roughened, and it becomes difficult for the third nitride semiconductor layer 30 to grow into the first nitride semiconductor layer 26 exposed at the bottom of the recess, so that the second nitride semiconductor is more favorably formed. It is preferable because the third nitride semiconductor layer 30 is easily grown selectively on the layer 28.

Although the film thickness of the first nitride semiconductor layer 26 is not particularly limited, it may be a film thickness which is exposed to the bottom of the recess by etching in the second step, and the crystallinity is further deteriorated. It is preferable that the film thickness is not so large. Although the preferable range of the film thickness of the first nitride semiconductor layer 26 is slightly different depending on the composition of the first nitride semiconductor layer 26, it is preferable that the film thickness of the first nitride semiconductor layer 26 be appropriately adjusted depending on the composition of the first nitride semiconductor layer 26.

The buffer layer 21 may be omitted depending on the composition of the heterogeneous substrate 201 and the first nitride semiconductor layer 26, and a plurality of layers other than the buffer layer 21 may be provided in the first nitride semiconductor layer 26. It may be sandwiched between the different types of substrates 201. In a preferred embodiment, before growing the first nitride semiconductor layer 26, a nitride semiconductor having substantially the same composition as that of the third nitride semiconductor layer 30 is previously grown on the heterogeneous substrate 201, and the nitride thereof is grown. First nitride semiconductor layer 2 on the semiconductor
The growth of 6 can grow the third nitride semiconductor layer 30 having better crystallinity.

Next, as shown in FIG. 2B, a second nitride semiconductor layer 28 is formed on the first nitride semiconductor layer 26.
For example, it is formed by the MOCVD method or the like. As the second nitride semiconductor layer 28, when the third nitride semiconductor layer 30 is grown, rather than the growth of the third nitride semiconductor layer 30 with the first nitride semiconductor layer 26 as a nucleus. A nitride semiconductor having a composition different from that of the first nitride semiconductor layer 26 may be used so that the second nitride semiconductor layer 28 can be grown easily as a nucleus. For example, the preferred second nitride semiconductor layer 2
Examples of 8 include a nitride semiconductor having substantially the same composition as that of the third nitride semiconductor layer 30. Specifically, the general formula In
_{d Al e Ga 1-de N} (0 ≦ d, 0 ≦ e, d + e ≦ 1) may be any composition represented by, in the first nitride semiconductor layer 28 an epitaxial possible growth, The composition should be different from that of the first nitride semiconductor layer 28. For example, the first nitride semiconductor layer 26 may be formed of In _a A
It is preferable that the second nitride semiconductor layer 28 be a GaN layer, with 1 _b N or In _a Ga _1-a N. It is preferable that the growth is performed by the combination of such compositions because the difference in the growth rate of the third nitride semiconductor layer 30 as described above becomes good.

The film thickness of the second nitride semiconductor layer 28 is not particularly limited, but is a film thickness such that the first nitride semiconductor layer 26 can be satisfactorily exposed by etching in the second step. It is more preferable that the crystallinity of the second nitride semiconductor layer 28 is good. Since the crystallinity of the second nitride semiconductor layer 28 may be slightly affected by the composition of the first nitride semiconductor layer,
It is preferable to appropriately adjust the film thickness of the second nitride semiconductor layer 28 in consideration of the composition of the first nitride semiconductor layer 26 and the like.

[Second Step] Next, as shown in FIG. 2E, the second nitride semiconductor layer 28 is ground at a predetermined depth so that the first nitride semiconductor layer 26 is exposed. As described above, the etching is performed so as to have unevenness such as stripes or islands. Means for etching is not particularly limited, but dry etching or wet etching can be mentioned, and dry etching is preferable. As a specific method of dry etching, for example, Japanese Patent Laid-Open No. 8-178
The etching means described in Japanese Patent Publication No. 03 can be used. Top views of the substrate after etching are shown in FIGS. 3 (a) and 3 (b). FIG. 3A shows the second nitride semiconductor layer 2
8 shows a case where 8 is etched in a stripe shape, and FIG.
(B) shows a case where the second nitride semiconductor layer 28 is etched into an island shape. The stripe-shaped or island-shaped etching may be performed so that the first nitride semiconductor layer 26 appears periodically, and is not limited to the shape shown in FIG.

The etching performed in the second step is performed, for example, through (c) and (d) of FIG. First, the first
As shown in FIG. 2C, a mask pattern of various shapes in the photolithography technique is used to form a photomask in a stripe shape, for example, on the second nitride semiconductor layer 28 formed in the step of Then, a resist pattern such as SiO ₂ is formed. Next, as shown in FIG. 2D, after forming a resist pattern, etching is performed to form irregularities. By removing the photomask after forming the unevenness, the unevenness having the shape as shown in FIG. 2E is obtained.

The shape of the unevenness is not particularly limited in terms of the length of the side surface of the concave portion, the width of the upper portion of the convex portion, the width of the bottom portion of the concave portion, and the like. It is preferable that the third nitride semiconductor layer 30 growing on the film is adjusted so as to grow laterally from the side surface of the recess.

When the unevenness formed in the second step is a stripe, the shape of the stripe will be described below. When the shape of the unevenness is a stripe shape, the shape of the stripe is not particularly limited, but for example, the stripe width (width of the upper part of the convex portion) is 1 to 20 μm, preferably 1 to 10
μm, and the stripe interval (width of the bottom of the recess) is 5 to 4
Those having a thickness of 0 μm, preferably 10 to 35 μm can be formed. It is preferable to have such a stripe shape in terms of reducing dislocations and improving the surface state.
Further, when the width of the recess is within the above range, when forming a ridge-shaped stripe on the upper portion of the recess with few dislocations, the ridge-shaped stripe is formed so as to avoid the central portion of the recess and be located in the portion with few dislocations. Is preferred. In order to increase the portion of the third nitride semiconductor layer 30 that grows from the opening of the recess, it is possible to widen the width of the bottom of the recess and narrow the width of the upper part of the recess, which reduces dislocations. It is possible to increase the number of parts that have been deleted. If the width of the bottom of the recess is increased,
Increasing the depth of the recess is preferable to prevent vertical growth that may grow from the bottom of the recess.

The depth at which the first nitride semiconductor layer 26 is cut is such that the second nitride semiconductor layer 28 serves as a nucleus to laterally grow in the next step of growing the third nitride semiconductor layer 30. 3 nitride semiconductors are the first nitride semiconductor layer 2
The depth is not particularly limited as long as it is a depth at which it can be joined before the interference of the growth in the vertical direction with 6 as the nucleus. For example, the etching may be performed to the extent that the first nitride semiconductor layer 26 is exposed or to any position in the layer of the first nitride semiconductor layer 26. For example, specifically, the depth of cutting the first nitride semiconductor layer 26 is 0.05.
About 0.3 μm. However, the film thickness of the first nitride semiconductor layer 26 may differ depending on the composition of the first nitride semiconductor layer 26.
It is preferable that the cutting depth be appropriately adjusted.

Further, in the second step, when the uneven shape is formed into a stripe shape, as shown in FIG. 4, the stripe has an orientation flat surface, for example, the A surface of sapphire, and the vertical axis of this orientation flat surface. On either side, θ =
It is preferable to form them by shifting them by 0.1 ° to 1 °, preferably θ = 0.1 ° to 0.5 °, because a good crystal having a flat growth surface can be obtained. By the way, when θ in FIG. 4 is 0 °, the surface may not be flat, and when the device structure is formed on the growth surface in such a state, deterioration of device characteristics tends to occur. A flat surface is also preferable from the viewpoint of improving the yield.

[Third Step] Next, a third nitride semiconductor layer 30 having substantially the same composition as that of the second nitride semiconductor layer 28 is formed.
It is formed by an appropriate growth method such as MOCVD. The third nitride semiconductor layer 30 laterally epitaxially grows in the region where the first nitride semiconductor layer 26 is exposed (inside the recess) with the second nitride semiconductor layer 28 as a nucleus, and at the same time, the first nitride semiconductor layer 30 is formed. Vertical epitaxial growth is performed using the semiconductor layer 26 as a nucleus. However, since the growth rate is higher on the second nitride semiconductor layer 28 having the same composition, and the first nitride semiconductor layer 26, which is a nucleus of the vertical growth, is etched to an appropriate depth. , The third nitride semiconductors 30 grown laterally with the second nitride semiconductor layer 28 as a nucleus before being interfered with by the nitride semiconductor grown vertically with the first nitride semiconductor layer 26 as a nucleus. Are bonded to each other and cover the entire surface of the heterogeneous substrate 201.

In the present invention, the lateral growth is preferentially promoted by utilizing the fact that the epitaxial growth rate for semiconductor layers having the same composition is higher than the epitaxial growth rate for semiconductor layers having different compositions. Furthermore, the first nitride semiconductor layer 26 is the above-described nitride semiconductor containing at least In [most preferably In _a Ga _1-a N layer (0 <a ≦ 1)], and the second nitride When the semiconductor layer 28 and the third nitride semiconductor layer 30 are GaN layers, the lateral growth preferentially proceeds for the following reason.

The growth temperature of the GaN layer, which is the third nitride semiconductor layer 30, is generally 900 ° C. or higher, while the growth temperature of the first nitride semiconductor layer 26, such as the In _a Ga _{1 -a} N layer, is 900 ° C.
The In composition is easily decomposed at a temperature of ℃ or more. Therefore, during the growth process of the third nitride semiconductor layer 30, the exposed first nitride semiconductor layer 26 is gradually decomposed, and
The growth rate of the vertical growth using the nitride semiconductor layer 26 as a nucleus is reduced. For this reason, the lateral growth with the second nitride semiconductor layer 28 as a nucleus progresses more preferentially. As a result, the third nitride semiconductor layer 30 that covers the recess and grows above the recess is a nitride semiconductor that has grown laterally with the second nitride semiconductor layer 28 as a nucleus and has few dislocations and good crystallinity. Becomes

Further, when the third nitride semiconductor layer 30 is grown, impurities (eg Si, Ge, Sn, Be, Z) are used.
n, Mn, Cr, Mg, etc.) to grow, or to grow by adjusting the molar ratio of the group III and V components (III / V molar ratio) that are raw materials of the nitride semiconductor. As described above, it is preferable in that the growth in the lateral direction is promoted as compared with the growth in the vertical direction to reduce dislocations, and further, the surface state of the surface of the third nitride semiconductor layer 30 is improved. In addition, when the third nitride semiconductor layer 30 is grown, the pressure is intentionally applied by adjusting the device or the like from the atmospheric pressure or more [atmospheric pressure (pressure in a state where no pressure is intentionally applied) The reaction may be carried out under the conditions. The specific pressure is not particularly limited as long as it is equal to or higher than normal pressure, but is preferably normal pressure (approximately 1 atm) to 2.5 atm, and the preferred pressure is normal pressure to 1.5 atm. is there.
It is preferable to grow the third nitride semiconductor layer 30 under such a pressure condition in order to improve the surface state of the surface of the third nitride semiconductor layer 30.

Further, the preferable form of the material for the heterogeneous substrate 201 will be further described below. It is preferable to use a substrate in which the main surface of the material to be the different type substrate in the first step is off-angled, and a substrate in which the main surface is off-angled stepwise. When an off-angled substrate is used, three-dimensional growth is not observed on the surface, step growth appears, and the surface tends to be flat. Further, if the direction (step direction) along the step of the sapphire substrate which is off-angled stepwise is formed perpendicular to the A-plane of sapphire, the step surface of the nitride semiconductor is aligned with the laser cavity direction. It is preferable that the laser beams are coincident with each other and the laser light is less likely to be irregularly reflected due to the surface roughness.

An embodiment of a heterogeneous substrate having a principal surface off-angled from the principal surface of the heterogeneous substrate will be described with reference to FIG. FIG. 5 is a schematic view showing an enlarged cross section of this sapphire substrate. The step-shaped off-angled substrate shown in FIG. 5 has a substantially horizontal terrace portion A and a step portion B.
And have. The surface irregularities of the terrace portion A are adjusted to an average of about 0.5 angstroms and a maximum of about 2 angstroms, and are formed almost regularly. On the other hand, the height of the step portion is adjusted to about 15 Å. The off-angle θ is exaggerated, but is 0.1 ° to 0.5 with respect to the horizontal plane of the growth surface.
It is only inclined about ゜. The stepped portion having such an off angle is preferably formed continuously over the entire substrate, but may be formed partially in particular. As shown in FIG. 5, the off-angle θ indicates the angle between the straight line connecting the bottoms of the steps and the horizontal plane of the uppermost step. The step difference is 30 angstroms or less, more preferably 25 angstroms or less, and most preferably 20 angstroms or less.
The lower limit is preferably 2 Å or more.

Further, as a preferable heterogeneous substrate 201,
Sapphire whose main surface is the (0001) plane [C plane], (11
2-0) Sapphire whose main surface is the [A surface], or (11
1) A spinel whose main surface is a surface. Different board 2
When 01 is sapphire whose main surface is the (0001) plane [C plane], the uneven stripe shape formed on the second nitride semiconductor layer 28 or the like is (11)
2-0) plane [A plane] perpendicular stripe shape [a stripe is formed in parallel to the (101-0) [M plane] of the nitride semiconductor] is preferable, and , The off angle θ of the off angle (θ shown in FIG. 5) is 0.1.
It is preferably in the range of 0 ° to 0.5 °, preferably 0.1 ° to 0.2 °, from the viewpoint of modifying the surface morphology so that the life characteristics of the device are improved. Also, the (112-0) plane [A
Surface] as the main surface of the sapphire, the uneven shape of the stripes has a (11-02) plane [R
It is preferable to have a stripe shape perpendicular to the [plane], and in the case of a spinel having a (111) plane as a main surface, the uneven stripe shape is perpendicular to the (110) plane of the spinel. It is preferable to have a striped shape. Here, the case where the unevenness has a stripe shape has been described, but in the present invention, since the nitride semiconductor easily grows laterally on the A and R surfaces of sapphire and the (110) surface of spinel, the second surface is formed on these surfaces. It is preferable to consider formation of a protective film in order to form a step in the second nitride semiconductor layer 28 or the like so that the end surface of the nitride semiconductor layer 28 or the like is formed.

The heterogeneous substrate 201 used in the present invention will be described in more detail with reference to the drawings. FIG. 6 is a unit cell diagram showing the crystal structure of sapphire. First, in the method of the present invention, a case will be described in which sapphire having the C-plane as the main surface is used and the concavities and convexities have a stripe shape perpendicular to the sapphire A-plane. For example, FIG. 7 is a plan view of the sapphire substrate on the main surface side. In this figure, the sapphire C surface is the main surface and the orientation flat (orientation flat) surface is the A surface. As shown in this figure, the uneven stripes are formed in parallel with each other in the direction perpendicular to the plane A. As shown in FIG. 7, when a nitride semiconductor is selectively grown on the C plane of sapphire, the nitride semiconductor tends to grow in a direction parallel to the A plane within the plane and is hard to grow in a vertical direction. It is in. Therefore, when the stripes are provided in the direction perpendicular to the A-plane, the nitride semiconductors between the stripes are connected to each other, which facilitates growth.
It is considered that the crystal growth as shown in FIG. 2 can be easily performed, but the details are not clear. Further, as described above, it is preferable in terms of surface morphology to form the stripes with a slight offset as shown in FIG.

Next, when a sapphire substrate whose main surface is the A surface is used, similarly to the case where the main surface is the C surface, for example, when the orientation flat surface is the R surface, a direction perpendicular to the R surface ( (Preferably slightly displaced as shown in FIG. 4)
In addition, by forming the stripes parallel to each other, the nitride semiconductor tends to grow in the stripe width direction, so that the nitride semiconductor layer with few crystal defects can be grown.

Next, with respect to spinel (MgAl ₂ O ₄ ), the growth of the nitride semiconductor has anisotropy, and the growth surface of the nitride semiconductor is the (111) plane and the orientation flat surface is the (11) plane.
With the (0) plane, the nitride semiconductor tends to grow in a direction parallel to the (110) plane. Therefore, (11
When the stripes are formed in the direction perpendicular to the (0) plane, the nitride semiconductor layers and the adjacent nitride semiconductors are connected to each other at the upper portion of the protective film, and a crystal with few crystal defects can be grown. Since the spinel is a tetragonal crystal, it is not shown in the drawing.

In the following, the direction along the step of the off-angled sapphire substrate is A of the sapphire substrate.
A case of being formed perpendicularly to the surface will be described with reference to FIG. The heterogeneous substrate such as sapphire which is off-angled stepwise has a substantially horizontal terrace portion A and a step portion B as shown in FIG. Terrace part A
There are few surface irregularities, and they are formed almost regularly.
The stepped portion having the off angle θ shown in FIG. 5 is preferably formed continuously over the entire substrate, but may be formed partially in particular. The off-angle θ is an angle between a straight line connecting the bottoms of a plurality of steps and the horizontal plane of the uppermost step, as shown in FIG. In addition, the off-angle of the heterogeneous substrate is 0.1 ° to
It is 0.5 °, preferably 0.1 ° to 0.2 °. When the off angle is in the above range, the surface morphology becomes good, and the nitride semiconductor device having the device structure formed thereon is smooth and has good device characteristics, and the yield is also good.

A method of growing a nitride semiconductor when the substrate 20 of the present invention is the nitride semiconductor substrate 301 will be described below with reference to FIG. As shown in FIG. 8, at least a first nitride semiconductor layer 26 and a second nitride semiconductor layer 28 are grown on a nitride semiconductor substrate 301, and are etched to form irregularities, so that the bottom portion of the concave portions is exposed. The first nitride semiconductor layer 26 is exposed, and then the third nitride semiconductor layer 30 is exposed.
Grow. More preferably, the nitride semiconductor substrate 30
The growth of the buffer layer 304 grown at a low temperature and / or a high temperature between the first and the first nitride semiconductor layers 26 causes the growth of the third nitride semiconductor layer 30 having a good surface morphology. Is preferred. When the nitride semiconductor substrate 301 is used as described above, the first nitride semiconductor layer 26, the second nitride semiconductor layer 28, and the third nitride semiconductor layer 30 are formed by using the heterogeneous substrate 201 described above. The same thing as the case of performing can be used. Further, the etching depth, the etching shape, the film thickness of each layer, and the like are the same.

Differences between the case where the nitride semiconductor substrate 301 is used and the case where the heterogeneous substrate 201 is used for growth will be described below. The nitride semiconductor substrate 301 may be formed by any growth method, and is preferably one having few dislocations and good crystallinity. For example, it is preferable to use a nitride semiconductor substrate obtained by the growth method described in Japanese Patent Application No. 11-80288 and grown into a thick film by the HVPE method. Also,
After growing the third nitride semiconductor layer 30 on the heterogeneous substrate 201 by the method described above, the third step to the fourth step or the third step described in Japanese Patent Application No. 11-80288.
The nitride semiconductor substrate obtained in the fifth step may be used.

Further, as shown in FIG. 8, a low temperature and / or high temperature buffer layer 304 is grown on the nitride semiconductor substrate 301 before growing the first nitride semiconductor layer 26 on the nitride semiconductor substrate 301. Then, the nitride semiconductor substrate 30
The crystal disorder on the first surface can be relaxed, and the third nitride semiconductor layer 30 can be grown better, which is preferable.

Next, a description will be given of a nitride semiconductor device having a device structure formed on the substrate of the present invention obtained by the method of growing a nitride semiconductor of the present invention. As the nitride semiconductor device formed on the substrate of the present invention, the nitride semiconductor substrate obtained by the above-described method of the present invention (the third nitride semiconductor 3 grown on the nitride semiconductor substrate 20) is used.
0), an element formed by forming a device structure having at least an n-type nitride semiconductor, an active layer containing InGaN, and a p-type nitride semiconductor. The n-type nitride semiconductor or the like constituting the device is not particularly limited,
A conventionally known device structure can be appropriately used. As one embodiment of the device structure, there are those shown in Examples described later. However, the present invention is not limited to this. In addition, the shapes of electrodes and elements are not particularly limited, and various known ones can be used. That is,
Since the substrate obtained by the method for growing a nitride semiconductor of the present invention is a good substrate in which dislocations are reduced, the life characteristics can be improved although there are differences depending on the type of device structure. Further, since the substrate is made of a nitride semiconductor, it can be satisfactorily cleaved on the surface perpendicular to the M-axis direction of the nitride semiconductor.

In the present invention, a preferable nitride semiconductor device is, for example, a laser device having a ridge-shaped light emitting region in terms of device characteristics such as life characteristics. As a more preferable element, when the unevenness formed in the second step is a stripe shape, the ridge-shaped stripes are formed in parallel to the stripe direction of the stripe-shaped unevenness, and more preferably, the recesses of the stripe-shaped unevenness are formed. It is preferable to be formed in the upper part from the viewpoint of improving the life characteristics. Depending on the type of substrate used in the first step, the third nitride semiconductor layer 30
Although there is a slight difference in the average dislocation density on the surface, dislocations are hardly seen in the upper part of the concave and convex portions. Therefore, when a light emitting region, for example, a ridge-shaped stripe as described above, is formed in this part, the laser element It is possible to prevent the dislocation from propagating during the operation of the device, suppress the deterioration of the device, and improve the life characteristics.

[0054]

EXAMPLES Examples of the present invention will be shown below, but the present invention is not limited thereto. [Example 1] Example 1 will be described with reference to FIG. 9 which is an embodiment showing a step of growth. In addition, Example 1 is MO
It was performed using the CVD method.

As the heterogeneous substrate 201, a sapphire substrate 5 having a diameter of 2 inches, a C surface as a main surface, and an orientation flat surface as an A surface.
1 was set in a reaction vessel, the temperature was set to 510 ° C., hydrogen was used as a carrier gas, ammonia and TMG (trimethylgallium) were used as source gases, and a buffer layer 52 made of GaN having a thickness of 200 angstroms was formed on a sapphire substrate 51. Grow with film thickness.

Next, the temperature is set to 1050 ° C. and a layer 53 of undoped GaN is grown to a film thickness of 2 μm.

Next, the temperature is set to 800 ° C., and TMI (trimethylindium), TMG, and ammonia are used as source gases, and a first undoped In _0.2 Ga _0.8 N layer is used.
The nitride semiconductor layer 54 is grown to a thickness of 0.2 μm.

Next, the temperature is set to 1050 ° C., and TMG and ammonia are used as source gases, and a second nitride semiconductor layer 56 made of undoped GaN is grown to a thickness of 0.3 μm.

Next, the wafer is removed from the MOVPE reactor.
Using the photolithography technology,
A strut is formed on the second nitride semiconductor layer 56 made of GaN.
Form a photomask in the shape of an arrow, and use a sputtering device to
Tripe width (upper part of convex part) 5 μm, stripe
Spaced (the part that will be the bottom of the recess) patterned to 10 μm
SiO₂A film is formed, and then S by an RIE device
iO₂Second nitride semiconductor in the part where the film is not formed
Layer 56 is etched and_0.2Ga_0.8From N
To expose the first nitride semiconductor layer 54, which is
The stripe width is 5μ
m, and stripe intervals of 10 μm are formed.
After forming the stripes, the convex second nitride semiconductor layer 56 is formed.
SiO formed on top ₂Remove the membrane.

Next, the wafer is set in a reaction vessel, the temperature is set to 1050 ° C., TMG and ammonia are used as source gases, and a third nitride semiconductor layer 58 made of undoped GaN is formed with a film thickness of 15 μm. Grow.

When the surface of the obtained third nitride semiconductor layer 58 (nitride semiconductor substrate of the present invention) was observed by the CL (cathode luminescence) method, the dislocation density was slightly higher in the upper part of the projection. However, dislocations are hardly seen in the upper part of the opening of the recess, and the crystallinity is good.

Example 2 Example 2 will be described with reference to FIG. 10, which is an embodiment showing the steps of growth. In addition, Example 2 was performed using the MOVPE method.

As the heterogeneous substrate 201, a sapphire substrate 5 having a 2-inch φ, C plane as a main surface and an orientation flat surface as an A plane.
1 was set in a reaction vessel, the temperature was set to 510 ° C., hydrogen was used as a carrier gas, ammonia and TMG (trimethylgallium) were used as a source gas, and a buffer layer 60 made of GaN having a thickness of 200 angstroms was formed on a sapphire substrate 201. Grow with film thickness.

Next, the temperature is set to 1050 ° C. and the GaN layer 62 is grown to a thickness of 3 μm on the buffer layer 60.

Then, on the GaN layer 62, a source gas of T
MA (trimethylaluminum), undoped A
A first nitride semiconductor layer 64 of _0.1 In _0.05 Ga _0.85 N is grown to a thickness of 0.2 μm. Then TM
The A gas is stopped and the second nitride semiconductor layer 56 made of undoped GaN is grown to a film thickness of 0.3 μm.

Next, the wafer is removed from the MOVPE reactor.
Using the photolithography technology,
A strut is formed on the second nitride semiconductor layer 56 made of GaN.
Form a photomask in the shape of an arrow, and use a sputtering device to
Tripe width (upper part of convex part) 5 μm, stripe
Spaced (the part that will be the bottom of the recess) patterned to 10 μm
SiO₂A film is formed, and then S by an RIE device
iO₂Second nitride semiconductor in the part where the film is not formed
Etch layer 56 and add Al_0.1In_0.05Ga
_0.85The first nitride semiconductor layer 64 made of N is slightly removed.
By etching to the extent that it is exposed
Stripes with a rib width of 5 μm and stripe spacing of 10 μm
To form. After forming the stripe, the second nitride of the convex portion
SiO formed on the semiconductor layer 56 ₂Remove the membrane.

Next, the wafer is set in a reaction vessel, the temperature is set to 1050 ° C., TMG and ammonia are used as source gases, and a third nitride semiconductor layer 58 made of undoped GaN is formed with a film thickness of 15 μm. Grow.

When the surface of the obtained third nitride semiconductor layer 58 (nitride semiconductor substrate of the present invention) is observed by the CL (cathode luminescence) method, the upper part of the convex portion is almost the same as in Example 1. Although the dislocation density was a little high, dislocations were hardly seen in the upper part of the recess opening, and the crystallinity was good.

[Third Embodiment] In the first embodiment, the substrate is
Instead of the sapphire substrate 51 used as the different type substrate, the nitride semiconductor substrate obtained in Example 1 of Japanese Patent Application No. 11-80288 was used, and the undoped GaN in Example 1 was used on the nitride semiconductor substrate. Layer 53
In place of the above, a third nitride semiconductor layer 58 is grown in the same manner except that an undoped AlGaN layer is grown to a thickness of 2 μm. As a result, since the nitride semiconductor substrate with few dislocations is used, almost no dislocations are observed on the surface of the third nitride semiconductor layer 58 grown on the upper part of the recess, and the third nitride semiconductor layer 58 grown on the upper part of the recess is grown. The number of dislocations on the surface of the nitride semiconductor layer 58 of No. 3 is smaller than that of the first embodiment.

[Fourth Embodiment] In the third embodiment, Japanese Patent Application No.
A third nitride semiconductor layer is grown in the same manner except that the nitride semiconductor substrate obtained in Example 2 of 1-80288 is used. As a result, good results are obtained almost as in the third embodiment.

[Embodiment 5] The following device structure is formed on the third nitride semiconductor layer 30 on the sapphire substrate obtained in Embodiment 1 to manufacture a nitride semiconductor element.

(Undoped n-type contact layer) [FIG.
Not shown in the figure] TM is used as a source gas at 1050 ° C. on a nitride semiconductor substrate.
An n-type contact layer made of undoped Al _0.05 Ga _0.95 N is grown to a thickness of 1 μm using A (trimethylaluminum), TMG, and ammonia gas. (N-type contact layer 72) Next, at the same temperature, TMA, TMG, and ammonia gas are used as source gases, silane gas (SiH ₄ ) is used as impurity gas, and Si is 3 × 10.
^An n-type contact layer 72 made of Al _0.05 Ga _0.95 N doped with ¹⁸ / cm ³ is grown to a film thickness of 3 μm.

(Crack prevention layer 73) Next, the temperature is set to 80.
Set the temperature to 0 ° C and use TMG and TMI (trimethyl
Silane) and ammonia as the impurity gas
5x10 Si using gas ¹⁸/ Cm³Doped In
_0.08Ga_0.92The crack prevention layer 73 made of N is 0.15
Grow with a film thickness of μm.

(N-type clad layer 74) Next, the temperature is raised to 10
A made of undoped Al _0.14 Ga _0.86 N at 50 ° C. using TMA, TMG and ammonia as source gases.
The layer was grown to a thickness of 25 Å, followed by
Stop TMA, use silane gas as impurity gas,
A B layer made of GaN doped with i of 5 × 10 ¹⁸ / cm ³ is grown to a film thickness of 25 Å. And
This operation is repeated 160 times to stack the A layer and the B layer to grow the n-type cladding layer 74 made of a multilayer film (superlattice structure) having a total film thickness of 8000 angstroms.

(N-type guide layer 75) Next, at the same temperature, TMG and ammonia are used as source gases, and the n-type guide layer 75 made of undoped GaN is set to 0.075 μm.
To grow.

(Active layer 76) Next, the temperature is set to 800 ° C., and TMI, TMG, and ammonia are used as source gases,
Si was used as an impurity gas, and Si was added to 5 × 10 ¹⁸
/ Cm ³ Doped In _0.01 Ga _0.99 N barrier layer is grown to a thickness of 100 Å. Subsequently, the silane gas was stopped, and undoped In _0.11 Ga _0.89
A well layer made of N is grown to a film thickness of 50 Å. This operation is repeated three times, and finally, the active layer 76 of the multiple quantum well structure (MQW) having a total film thickness of 550 angstroms in which the barrier layers are laminated is grown.

(P-type electron confinement layer 77) Next, at the same temperature, TMA, TMG and ammonia are used as source gases, Cp ₂ Mg (cyclopentadienyl magnesium) is used as an impurity gas, and Mg is 1 ×. A p-type electron confinement layer 77 made of Al _0.4 Ga _0.6 N doped with 10 ¹⁹ / cm ³ is grown to a film thickness of 100 Å.

(P-type guide layer 78) Next, the temperature is set to 105.
The temperature is set to 0 ° C., TMG and ammonia are used as the source gas,
The p-type guide layer 78 made of undoped GaN is 0.0
Grow with a film thickness of 75 μm. This p-type guide layer 78
Grows undoped, but the Mg concentration is 5 × 10 ¹⁶ due to the diffusion of Mg from the p-type electron confinement layer 77.
/ Cm ³ and shows p-type.

(P-type clad layer 79) Next, at the same temperature, TMA, TMG and ammonia were used as source gases,
An A layer made of undoped Al _0.1 Ga _0.9 N is grown to have a film thickness of 25 Å, then TMA is stopped, Cp ₂ Mg is used as an impurity gas, and Mg is 5 × 1.
A B layer made of GaN doped with 0 ¹⁸ / cm ³ is grown to a film thickness of 25 Å. Then, this operation is repeated 100 times to stack the A layer and the B layer to grow the p-type cladding layer 79 formed of a multilayer film (superlattice structure) having a total film thickness of 5000 angstroms.

(P-type contact layer 80) Next, at the same temperature, TMG and ammonia were used as source gases, Cp ₂ Mg was used as an impurity gas, and Mg was 1 × 10 ²⁰ / cm ^3.
The p-type contact layer 80 made of doped GaN 15
It is grown to a film thickness of 0 angstrom.

After completion of the reaction, the wafer is annealed in a reaction vessel at 700 ° C. in a nitrogen atmosphere to further reduce the resistance of the p-type layer. After annealing, the wafer is taken out of the reaction container, a protective film made of SiO ₂ is formed on the surface of the uppermost p-side contact layer, and etched by SiCl ₄ gas using RIE (reactive ion etching). As shown, the surface of the n-side contact layer 2 on which the n-electrode is to be formed is exposed. Next, as shown in FIG. 13A, a Si oxide (mainly SiO 2) is formed on almost the entire surface of the uppermost p-side contact layer 80 by a PVD apparatus.
After forming a first protective film 91 made of ₂ ) with a film thickness of 0.5 μm, a mask having a predetermined shape is applied on the first protective film 91 to form a third protective film 93 made of photoresist. ,
The stripe width is 1.8 μm and the thickness is 1 μm. Next, as shown in FIG. 13B, after forming the third protective film 93, C is removed by an RIE (reactive ion etching) device.
With F ₄ gas, the third protective film 93 as a mask, the first protective film 91 is etched to a stripe shape. After that, by treating with an etching solution to remove only the photoresist, as shown in FIG.
A first protective film 91 having a stripe width of 1.8 μm can be formed on the side contact layer 80.

Further, as shown in FIG. 13D, after forming the stripe-shaped first protective film 91, the p-side contact layer 10 and the p-side clad layer 89 are formed again by RIE using SiCl ₄ gas. Etching is performed to form a ridge-shaped stripe having a stripe width of 1.8 μm. However, the ridge-shaped stripes are as shown in FIG.
It is formed above the recess formed when the ELOG growth is performed and avoiding the central portion of the recess. After forming the ridge stripe, the wafer is transferred to a PVD apparatus,
As shown in (e), Zr oxide (mainly ZrO ₂ )
A second protective film 92 made of is continuously formed with a thickness of 0.5 μm on the first protective film 91 and on the p-side cladding layer 79 exposed by etching. When the Zr oxide is formed in this manner, it is preferable because the pn plane is insulated and the transverse mode is stabilized. next,
The wafer is immersed in hydrofluoric acid, and the first protective film 91 is removed by the lift-off method as shown in FIG.

Next, as shown in FIG. 13G, the surface of the p-side contact layer 80 exposed by removing the first protective film 91 on the p-side contact layer 80 is made of Ni / Au. The electrode 82 is formed. However, the p electrode 82 is 100 μ
A stripe width of m is formed over the second protective film 92 as shown in this figure. After forming the second protective film 92, an n electrode 84 made of Ti / Al is formed in a direction parallel to the stripe on the exposed surface of the n-side contact layer 72 as shown in FIG.

As described above, the n electrode and the p electrode are formed.
The formed wafer is oriented in the direction perpendicular to the striped electrodes.
Then, the substrate is cleaved in a bar shape from the substrate side, and the cleavage plane (11-00
Resonates with the plane, the plane corresponding to the side of the hexagonal column crystal = M plane)
Make a container. SiO on the resonator surface ₂And TiO₂An invitation to
After forming an electric multilayer film, finally, in the direction parallel to the p-electrode,
The laser element is cut into a laser element as shown in FIG. Profit
Place the laser element on the heat sink,
Wire-bond the electrodes for laser oscillation at room temperature.
I tried. As a result, at room temperature, oscillation with an output of 5 mW
A continuous oscillation of wavelength 400nm was confirmed, and 1000 hours or more
Show the above life.

[0085]

According to the method for manufacturing a nitride semiconductor substrate of the present invention, the lateral growth of the nitride semiconductor layer is preferentially promoted by utilizing the difference in the growth rate due to the difference in composition, and at the same time the vertical growth is performed. Since an appropriate space is provided between the growth point of the above and the growth point of the lateral growth, the lateral growth of the nitride semiconductor layer can be stably advanced, and a nitride semiconductor substrate with few dislocations can be manufactured.

[Brief description of drawings]

FIG. 1 is a cross-sectional view schematically showing a nitride semiconductor serving as a substrate for forming a device structure according to a manufacturing method of the present invention.

2 (a) to 2 (f) are process cross-sectional views schematically showing the manufacturing method of the present invention.

3 (a) and 3 (b) are top views showing the substrate in the step shown in FIG. 2 (e).

FIG. 4 is a plan view on the main surface side of the substrate for explaining that the stripe direction is slightly deviated from the orientation flat surface when the unevenness has a stripe shape.

FIG. 5 is a schematic cross-sectional view showing a partial shape of a heterogeneous substrate according to one embodiment showing an off-angle θ and the like of the heterogeneous substrate whose main surface is off-angled.

FIG. 6 is a unit cell diagram showing a plane orientation of sapphire.

FIG. 7 is a plan view of a main surface side of a substrate for explaining a stripe direction of unevenness.

FIG. 8 is a cross-sectional view schematically showing a nitride semiconductor serving as a substrate for forming an element structure according to the manufacturing method of the present invention.

FIG. 9 is a sectional view schematically showing a nitride semiconductor for forming an element structure according to Example 1 of the present invention.

FIG. 10 is a cross-sectional view schematically showing a nitride semiconductor for forming an element structure according to Example 2 of the present invention.

FIG. 11 is a cross-sectional view schematically showing a nitride semiconductor for forming a device structure according to a conventional manufacturing method.

FIG. 12 is a schematic cross-sectional view of a nitride semiconductor device formed by forming a device structure using a nitride semiconductor obtained by the growth method of the present invention according to Example 5 as a substrate.

FIG. 13 is a schematic cross-sectional view showing a partial structure of a wafer in each step of the method which is an embodiment of forming a ridge-shaped stripe.

[Explanation of symbols]

20 ··· Different substrates 21 ··· Buffer layer 26 ... First nitride semiconductor layer 28 ... Second nitride semiconductor layer 30 ... Third nitride semiconductor layer 31 ... Sapphire substrate 32, 40 ... Buffer layer 34 ... InGaN layer 36, 38, 42 ... GaN layer 44 ... AlGaN layer 301 ... Nitride semiconductor substrate 304 ... Buffer layer grown at low temperature and / or high temperature

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/205 C30B 29/40 502 H01S 5/323 610

Claims (8)

(57) [Claims] 1. A first step of sequentially growing at least a first nitride semiconductor layer and a second nitride semiconductor layer having different compositions on a substrate, and from the surface of the second nitride semiconductor layer. A second step of partially etching in the substrate direction to form irregularities and a second nitride semiconductor layer remaining on the first nitride semiconductor layer without being etched in the second step are formed. In the method for growing a nitride semiconductor, at least a third step of growing a third nitride semiconductor layer having substantially the same composition as the second nitride semiconductor layer by utilizing lateral growth is used as a nucleus. , The composition of the first nitride semiconductor layer and the second nitride semiconductor layer in the first step, the growth of the third nitride semiconductor layer grown in the third step, the second nitride Based on the growth rate of the semiconductor layer as a nucleus, The growth rate is adjusted to be slow with the body layer as a nucleus, and the first nitride semiconductor layer and the second nitride semiconductor layer are both epitaxially grown. Further, in the second step, etching is performed. A method for growing a nitride semiconductor, wherein the first nitride semiconductor layer is exposed and is cut to a predetermined depth. 2. The method according to claim 1, wherein Al _k Ga _1-k N (0 ≦ k ≦ 1) is epitaxially grown between the substrate and the first nitride semiconductor layer. Nitride semiconductor growth method. 3. The method for growing a nitride semiconductor according to claim 1, wherein the first nitride semiconductor layer is a nitride semiconductor containing at least In. 4. The first nitride semiconductor layer is In _a A
_{l b Ga 1-ab N [} 0 <a <1,0 ≦ b <1, a + b ≦
1] The method for growing a nitride semiconductor according to claim 3, wherein 5. The first nitride semiconductor layer is In _a A
l _b N or nitride semiconductor method of growing according to claim 4, characterized in that the In _a Ga _{1 -a} N. 6. The first nitride semiconductor layer is In _a G
The method for growing a nitride semiconductor according to claim 5, wherein the method is a _1-a N. 7. In the second step, the unevenness formed on the second nitride semiconductor layer 28 has a stripe shape, and the unevenness of the stripe shape is left and right with respect to a vertical axis from the orientation flat surface. The method for growing a nitride semiconductor according to claim 1, wherein the nitride semiconductor is grown with a shift of about 0.1 ° to 1 °. 8. The method for growing a nitride semiconductor according to claim 1, wherein the substrate is a heterogeneous substrate different from a nitride semiconductor or a nitride semiconductor substrate.