JP3708972B2 - バイポーラ高周波トランジスタ - Google Patents

バイポーラ高周波トランジスタ Download PDF

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JP3708972B2
JP3708972B2 JP34132793A JP34132793A JP3708972B2 JP 3708972 B2 JP3708972 B2 JP 3708972B2 JP 34132793 A JP34132793 A JP 34132793A JP 34132793 A JP34132793 A JP 34132793A JP 3708972 B2 JP3708972 B2 JP 3708972B2
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case
emitter
terminal
collector
semiconductor chip
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JPH06224320A (ja
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ブレンデルフアー クヌート
フーバー ヤーコプ
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Siemens AG
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Siemens AG
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Description

【0001】
【産業上の利用分野】
本発明は、適当にドープされかつパターンを施され、ベース、コレクタおよびエミッタ接触部を有する、ドープされたシリコン基板から成る半導体チップを有し、ケースにより包み込まれ、またこれらの接触部がケースのベース、コレクタおよびエミッタ端子とそれぞれ接続されているバイポーラ高周波トランジスタに関する。
【0002】
【従来の技術】
個別半導体デバイスは特殊な回路用に個々の性能の最適化を可能にする。それに対して集積回路ではプロセス技術的な理由から一般に制約を有する妥協が必要である。特に1GHz以上の周波数範囲を開拓している最近の通信および家庭電器エレクトロニクスに対しては、特殊化された個別トランジスタが集積回路を補足するものとして不可欠である。
【0003】
能動的な個別デバイスとしては約4GHzまでの回路に対してはSi‐npnトランジスタが利用される。より一層高い周波数に対しては特に単極トランジスタまたは電界効果トランジスタの形態のGaAs基板上のトランジスタが利用される。しかし、個別シリコントランジスタ、特にガリウム砒素円板よりもはるかに安価に処理され得るシリコン円板の用途を拡大することは大きな経済的関心事である。
【0004】
極めて多種類の個別Si高周波トランジスタが市場に提供されているが、これらはすべて共通の構成を有する。即ち能動チップのシリコン基板がコレクタ端子としての役割をする。その際にたとえばチップの下面にそのコレクタ接触部(メタライジング)を有するn+ ドープされたシリコン基板がケースのコレクタ端子と接続され、またはこの上に配置されかつ取付けられる。半導体へのエミッタおよびベース端子は非常に微細な(≦1μm)形でチップの表面上に形成される。その際にエミッタおよびベース端子はたとえばドープされたエミッタおよびベース領域の上の交叉指状のメタライジングパターンの形態で半導体チップの表面に施される。これらのエミッタおよびベース接触部は次いでそれぞれボンディングワイヤを介してケースのエミッタまたはベース端子と接続されている。このようなSiチップはたとえばSMD(表面取付デバイス)ケースのなかに組み入れられ、その際にSiチップが取付けられるケース端子がケースのコレクタ端子を画成する。エミッタおよびベースは金線を介してケースの残りの端子にボンディングされる。チップもボンディングワイヤもケースにより保護されている。
【0005】
このようなデバイスの用途は、商業的に入手可能なSi高周波トランジスタでは10GHzまでに達する限界周波数fT により特徴付けられる。限界周波数をそれ以上に高めるためには、たとえばより微細なパターンまたはより平坦なドーピングプロフィルによるチップ技術の改善を必要とする。
【0006】
しかし販売品として完成した高周波デバイスに対してはシリコンチップの性能だけが重要ではない。むしろ1GHzを越える周波数ではケースが重要な役割を果たす。ケース、外部でケースに印加されているインピ−ダンスをチップに印加されているインピ−ダンスに変換する高周波回路網とみなすべきである。特に長いボンディングワイヤおよびケース経路長さにより必然的に生ずるエミッタ分岐内のインダクタンスが外部で得られる増幅を制限する。
【0007】
ケースの最適化、多重エミッタボンディングなどの試みは付随的な改善しかもたらさない。前記のいわゆるコレクタ接地方式での40GHzまたは8GHzを有する2つのチップの比較は、40GHzチップのはるかに良好な特性がケースにより吸収されることを明らかに示す。前記の性能データが適当な“オン‐ウェーハ”測定方法により証明されているとしても、従来のコレクタ接地方式では、ケースに入れられた完成トランジスタにおいて所望の高周波特性を達成することは可能でない。
【0008】
【発明が解決しようとする課題】
本発明の課題は、1GHz以上の周波数における高い増幅を可能にするケース付きバイポーラ高周波トランジスタを提供することにある。
【0009】
【課題を解決するための手段】
この課題は、冒頭に記載した種類のバイポーラ高周波トランジスタにおいて、本発明によれば、ベース、コレクタおよびエミッタ接触部が半導体チップの表面に設けられ、半導体チップがその下面でケースの高周波接地として構成されているエミッタ端子の上に配置され、エミッタ接触部が短い間隔でケースのエミッタ端子と接続され、またベース接触部がベース端子と、またコレクタ接触部がコレクタ端子とそれぞれ少なくとも1つのボンディングワイヤを介して互いに接続されることにより解決される。
【0010】
半導体チップの上面の上のエミッタ接触部はその際に、チップがその下面で取付けられているケースのエミッタ端子と少なくとも1つのボンディングワイヤを介して接続される。エミッタ接触部とチップのエミッタ端子との間の最短可能な接続を実現するため、エミッタ接触部を半導体チップを貫いてケースのエミッタ端子と接続することも有利である。そのために適する方法は、基板を貫通する孔がエッチングされ、この孔が次いで接続媒体としての適当な金属により満たされるいわゆる基板経由技術である。
【0011】
半導体チップのシリコン基板が、エミッタ端子と接続すべき下面の範囲内でpドープされていると有利である。
【0012】
能動半導体チップが、好ましくはプラスチックから成る表面組立可能なケース、いわゆるSMDケースのなかに組み入れられていると有利である。ケースのエミッタ端子をケースから多重に導き出すことも有利である。
【0013】
【発明の効果】
本発明により得られる利点は特に、従来のコレクタ接地方式の代わりにエミッタ接地方式が導入されることにある。なぜならば、外部の高周波接地を可能なかぎり直接的にトランジスタの能動的部分に近付け、またそれによってエミッタを接地することが決定的に有意義であるからである。この新しい方式によりシリコンブロックがエミッタ電位、すなわち高周波接地と接続され、また半導体チップがケースのエミッタ端子の上に取付けられる。従ってトランジスタチップのコレクタ端子は追加的にチップの上面に導き出され、また相応のケース端子にボンディングされる。ケース端子へのエミッタの電気的接続は好ましくは可能なかぎり短いボンディングワイヤを介してチップ上面から下方へまたは基板を介してエッチングされ金属で満たされた孔を貫いて行われる。ベース端子は従来の仕方で構成される。チップ上面のエミッタ接触部は基板と等しい電位にあるので、エミッタメタライジングの面積は追加的な寄生的キャパシタンスなしに増大され得る。従って低いインダクタンスを有するエミッタの多重ボンディングが可能となる。
【0014】
【実施例】
以下、図面に示されている実施例により本発明を一層詳細に説明する。
【0015】
図面に示されているバイポーラ高周波トランジスタは好ましくはpドープされたシリコン基板から成る半導体チップ1から成っている。所望の、この実施例ではフィンガー状のベース接触部2およびエミッタ接触部4、さらにコレクタ接触部3をその表面の上に実現するため、その表面に半導体チップ1はそれ自体は公知の仕方で適当にドープされかつパターンを施されている。その下面、この例ではpドープされたシリコン基板で半導体チップ1はケース8のエミッタ端子5の上にたとえば接着により取付けられている。エミッタ端子5は高周波接地として構成され、すなわち可能なかぎり低いインピ−ダンスを有する。これは、エミッタ端子5が可能なかぎり広いまた外方に可能なかぎり短い寸法にされることにより達成される。さらにケース8のエミッタ端子5は可能なかぎり導電性を有するべきであろう。たとえばエミッタ端子5は好ましくは銀メッキまたは金メッキされている銅から成っている。半導体チップ1のエミッタ接触部4はケース8のエミッタ端子5と可能なかぎり短い間隔で接続されている。図示の実施例ではこの短い接続はたとえば金から成る2つのボンディングワイヤ9を介して行われる。半導体チップ1の他の2つのメタライジング部、すなわちコレクタ接触部3およびベース接触部2もそれぞれボンディングワイヤ9を介してトランジスタのそのつどのケース端子、すなわちコレクタ端子7またはベース端子6と接続されている。半導体チップ1およびボンディングワイヤ9並びにトランジスタのベース端子6、コレクタ端子7およびエミッタ端子5を形成するいわゆるリードフレームの内側部分を気密に囲むケース8がプラスチックから成っていることは好ましい。ケース8がいわゆるSMDケースであると特に有利である。このため高周波トランジスタの電気端子5、6および7の外方に突出する部分は図示されていない適当な仕方で曲げられている。
【図面の簡単な説明】
【図1】本発明の1つの実施例を示す概略斜視図。
【符号の説明】
1 半導体チップ
2 ベース接触部
3 コレクタ接触部
4 エミッタ接触部
5 エミッタ端子
6 ベース端子
7 コレクタ端子
8 ケース
9 ボンディングワイヤ

Claims (4)

  1. 適当にドープされかつパターンを施され、ベース、コレクタおよびエミッタ接触部を有する、ドープされたシリコン基板から成る半導体チップを有し、SMDケースにより包み込まれ、またこれらの接触部がケースのベース、コレクタおよびエミッタ端子とそれぞれ接続されている、1GHz以上の動作周波数を持つバイポーラ高周波トランジスタにおいて、ベース、コレクタおよびエミッタ接触部(2、3、4)が半導体チップ(1)の表面に設けられ、半導体チップ(1)がその下面でケース(8)の高周波接地として構成されているエミッタ端子(5)の上に配置され、エミッタ接触部(4)が少なくとも1つのボンディングワイヤ(9)を介してケース(8)のエミッタ端子(5)と接続され、またベース接触部()がベース端子(6)と、コレクタ接触部(3)がコレクタ端子(7)とそれぞれ少なくとも1つのボンディングワイヤ(9)を介して互いに接続されていることを特徴とするバイポーラ高周波トランジスタ。
  2. エミッタ接触部(4)が半導体チップ(1)を貫いてケース(8)のエミッタ端子(5)と接続されていることを特徴とする請求項1記載のバイポーラ高周波トランジスタ。
  3. 半導体チップ(1)のシリコン基板がpドープされていることを特徴とする請求項1又は2記載のバイポーラ高周波トランジスタ。
  4. ケース(8)のエミッタ端子(5)がケース(8)から多重に導かれていることを特徴とする請求項1ないしの1つに記載のバイポーラ高周波トランジスタ。
JP34132793A 1992-12-18 1993-12-10 バイポーラ高周波トランジスタ Expired - Lifetime JP3708972B2 (ja)

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AT92121628.9 1992-12-18

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US5877555A (en) * 1996-12-20 1999-03-02 Ericsson, Inc. Direct contact die attach
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US6414371B1 (en) * 2000-05-30 2002-07-02 International Business Machines Corporation Process and structure for 50+ gigahertz transistor
DE10204403A1 (de) * 2002-02-04 2003-08-21 Infineon Technologies Ag Vorrichtung zur Verbindung eines IC-Anschlusses mit einem Bezugspotential
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CA1056513A (en) * 1975-06-19 1979-06-12 Benjamin J. Sloan (Jr.) Integrated logic circuit and method of fabrication
JPS58152650A (ja) * 1982-03-05 1983-09-10 株式会社日立製作所 ディーゼル電気機関車の通風冷却装置
JPS59152650A (ja) * 1983-02-21 1984-08-31 Mitsubishi Electric Corp 半導体装置
EP0439652A1 (de) * 1990-01-31 1991-08-07 Siemens Aktiengesellschaft Hochfrequenz-SMD-Transistor mit zwei Emitteranschlüssen
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DE59209229D1 (de) 1998-04-16
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US5406114A (en) 1995-04-11
ES2113400T3 (es) 1998-05-01
DK0602278T3 (da) 1998-09-28
EP0602278B1 (de) 1998-03-11

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