JP3702929B2 - ワイヤボンディング方法 - Google Patents

ワイヤボンディング方法 Download PDF

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Publication number
JP3702929B2
JP3702929B2 JP27560497A JP27560497A JP3702929B2 JP 3702929 B2 JP3702929 B2 JP 3702929B2 JP 27560497 A JP27560497 A JP 27560497A JP 27560497 A JP27560497 A JP 27560497A JP 3702929 B2 JP3702929 B2 JP 3702929B2
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Prior art keywords
bonding
wire
semiconductor chip
pad
ball
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JP27560497A
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JPH11111752A (ja
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秀彦 吉良
俊二 馬場
直樹 石川
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Fujitsu Ltd
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Fujitsu Ltd
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    • H01L2924/01201—1N purity grades, i.e. 90%
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Description

【０００１】
【発明の属する技術分野】
本発明はワイヤボンディング方法に関するものである。
【０００２】
【従来の技術】
ボンディングワイヤは半導体チップのパッドとパッケージのリードとを電気的に接続する場合、あるいは半導体チップ部品の裏面に実装基板への接合用バンプを形成する際に多用されており、従来、高純度の金製細線、あるいはアルミニウム製細線が使用される。
【０００３】
上記ボンディングワイヤを使用して例えば半導体チップの裏面に接合用バンプを形成する場合には、先ず、ボンディングワイヤの先端を溶融させて球状のボールを形成した後、該ボールを加熱しながら所定の圧力で半導体チップのパッドに擦り付けてパッドとボンディングワイヤの接触界面を合金化させ、この後、ワイヤ部分を切断する。
【０００４】
【発明が解決しようとする課題】
しかし、上述した従来例において、半導体チップのパッド表面に酸化膜等が形成されている場合には、球状体を所定圧力で擦り付けても界面の酸化膜により合金化が阻止されて接合強度が脆弱になる上に、電気的接続の信頼性も低いという欠点を有する。
【０００５】
本発明は以上の欠点を解消すべくなされたもので、接合パッド間の接合信頼性の高いワイヤボンディング方法の提供を目的とする。
【０００７】
【課題を解決するための手段】
本発明によれば上記目的は、
非金属で硬質のフィラー１、１・・が多数混入されたボンディングワイヤ２の端部を接続対象のパッド４１に加圧条件下で摺接させながら接合パッド４１間をボンディングワイヤ２にて接続し、ボンディングワイヤ２接合時にパッド４１表面の酸化膜をフィラー１によって掻き落とすワイヤボンディング方法を提供することにより達成される。
【０００８】
本発明におけるボンディングワイヤ２は導体細線であり、導体の線母材２０中に多数の微細なフィラー１、１・・を混入させて形成される。このボンディングワイヤ２は半導体チップ部品の接合用バンプ４２を形成したり、あるいは半導体チップのパッド４１とパッケージのリード６０とを接続する際に特に有用であり、後述するように、フィラー１はボンディングワイヤ２の接合対象表面に形成された酸化膜を剥離させる。線母材２０には金、あるいはアルミニウムが使用できる。
【００１０】
ボンディングワイヤ２の先端を溶融することにより形成されるボール３の表面にはフィラー１が露出しており、このボール３を半導体チップ本体４０のパッド４１に擦り付けると、フィラー１によりパッド４１表面の酸化膜が掻き落とされて清浄面となるために、線母材２０とパッド４１形成金属との間の合金化が確実となる上に、電気的接続の信頼性も高まる。
【００１３】
【発明の実施の形態】
図１に本発明に係るボンディングワイヤ２を示す。ボンディングワイヤ２は約９８％程度の純度の金を線母材２０とし、その中に多数の微小なフィラー１、１・・を混入させた直径２０μｍ程度の細線であり、例えば溶融した金の中にフィラー１を混合させて固化した後、線引きダイス等を使用して所定径に線引きして形成される。
【００１４】
フィラー１は１μｍ程度の細粒であり、球状化処理されたものよりも、図１に示すように、鋭利な角部を有するものが望ましい。また、フィラー１は後述する半導体チップ本体４０のバンプ接合用パッド４１、あるいはリード接続用パッド４３、さらにはリード６０形成材料に擦り付けた際に、これらの表層に形成される酸化膜を掻き落とす程度の硬度を有することが望ましく、さらに、線母材２０から脱落した際に移動して短絡の原因とならないように、絶縁性を有するのが望ましい。加えて、フィラー１は、線引き材を形成する際、あるいは後述するようにボール３を形成する工程において線母材２０との間に合金を形成しないことが望ましく、金を線母材２０とするこの実施の形態において、フィラー１にはシリカ（シリコンオキサイド）等が使用される。
【００１５】
上記ボンディングワイヤ２を使用して半導体チップ本体４０に接合用バンプ４２を接合する方法を図２に示す。半導体チップ本体４０は裏面にＡｌ等の導体薄膜からなるバンプ接合用パッド４１を有する。バンプ接合用パッド４１に実装基板５への接合用バンプ４２を接合するに際して、先ず、ボンディングワイヤ２の先端を溶融する。溶融先端には表面張力の作用により図２（ａ）に示すように、球状のボール３が形成される。ワイヤの状態で表層近傍に位置していたフィラー１はボール３の表面に露出するために、ボール３の表面はフィラー１による多数の凹凸が形成される。この後、ボンディングツールを使用してボール３をバンプ接合用パッド４１に押し付け、ボール３に超音波振動を与える（図２（ｂ）参照）。加熱条件下での超音波振動の付与により、ボール３はバンプ接合用パッド４１の表面に擦り付けられ、バンプ接合用パッド４１の表層に形成された酸化膜を剥離し、露出したバンプ接合用パッド４１の清浄面は線母材２０との間で合金を形成して接合が完了する。この後、接合部から上方のワイヤをひきちぎることにより、図２（ｃ）に示す半導体チップ部品４が得られる。
【００１６】
以上のように形成された半導体チップ部品４は、図３（ａ）に示すように、接合用バンプ４２の表面を平板７に押し付けて各接合用バンプ４２の高さを均一とした後、接合用バンプ４２の先端に導電性ペースト８を塗布し（図３（ｂ）、（ｃ）参照）、実装基板５のランド５０に固定して行われる（図３（ｄ）、（ｅ）参照）。なお、図３（ｄ）において９は半導体チップ部品４を実装基板５上に固定するための熱硬化性の接着剤、図３（ｅ）において９０は加熱状態で半導体チップ部品４を押し付け、接着剤９を硬化させるための加圧ヘッドを示す。
【００１７】
なお、以上においては、ボンディングワイヤ２を使用して接合用バンプ４２を形成する方法を示したが、本発明に係るボンディングワイヤ２は、半導体チップ部品４のパッド４１とパッケージのリード６０とを電気的に接続する接続線として使用可能である。
【００１８】
図４は熱圧着ボンディングによりリードフレーム６のリード６０とリードフレーム６上に固定された半導体チップ部品４とを本発明によるボンディングワイヤ２で接続した状態を示す。半導体チップ部品４のリード接続用パッド４３に接合されるネイルヘッド型のボンディング部は先端を溶融させてボール３を形成した後、リード接続用パッド４３上に加圧しながら擦り付けることにより接合されており、リード６０側はボール３を形成することなく、キャピラリ９１によりボンディングワイヤ２を加圧しながら擦り付けて接合される。
【００１９】
以上の説明から明らかなように、本発明によるワイヤボンディング方法によれば、パッド、あるいはリードとの接合信頼性を向上させることができる。
【図面の簡単な説明】
【図１】 本発明に係るボンディングワイヤを示す図で、（ａ）は縦断面図、（ｂ）は横断面図である。
【図２】 接合用バンプの接合方法を示す図で、（ａ）はボールを形成した状態を示す図、（ｂ）はパッドにボールを擦り付けた状態を示す図、（ｃ）は接合用バンプの接合状態を示す図である。
【図３】 半導体チップ部品の実装工程を示す図で、（ａ）は接合用バンプを平板に押し付けた状態を示す図、（ｂ）は導電性ペーストの塗布作業を示す図、（ｃ）は導電性ペーストを塗布した状態を示す図、（ｄ）は実装基板への積層工程を示す図、（ｅ）は接着剤の硬化工程を示す図である。
【図４】 ワイヤボンディング方法を示す図である。
【符号の説明】
１ フィラー
２ ボンディングワイヤ
３ ボール
４ 半導体チップ部品
４０ 半導体チップ本体
４１ パッド
４２ 接合用バンプ
５ 実装基板

Claims (1)

  1. 非金属で硬質のフィラーが多数混入されたボンディングワイヤの端部を接続対象のパッドに加圧条件下で摺接させながら接合パッド間をボンディングワイヤにて接続し、ボンディングワイヤ接合時にパッド表面の酸化膜をフィラーによって掻き落とすワイヤボンディング方法。
JP27560497A 1997-10-08 1997-10-08 ワイヤボンディング方法 Expired - Fee Related JP3702929B2 (ja)

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TWI396268B (zh) * 2006-05-25 2013-05-11 Taiwan Semiconductor Mfg 複合連結線與其製造方法
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