JP3638528B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements Download PDF

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Publication number
JP3638528B2
JP3638528B2 JP2001019613A JP2001019613A JP3638528B2 JP 3638528 B2 JP3638528 B2 JP 3638528B2 JP 2001019613 A JP2001019613 A JP 2001019613A JP 2001019613 A JP2001019613 A JP 2001019613A JP 3638528 B2 JP3638528 B2 JP 3638528B2
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input
flat plate
plate portion
line conductor
output terminal
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JP2002222885A (en
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耕治 久保田
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Kyocera Corp
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Kyocera Corp
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Description

【0001】
【発明の属する技術分野】
本発明は、光通信やマイクロ波通信、ミリ波通信等の分野に用いられる高い周波数で作動する各種半導体素子を収納する半導体素子収納用パッケージに関する。
【0002】
【従来の技術】
従来の光通信やマイクロ波通信、ミリ波通信等の高い周波数で作動する各種半導体素子を気密封止して収容する半導体素子収納用パッケージ(以下、半導体パッケージという)として、例えば光通信分野に用いられる光半導体パッケージを図6に示す。
【0003】
同図に示すように、光半導体パッケージは、鉄(Fe)−ニッケル(Ni)−コバルト(Co)合金や銅(Cu)−タングステン(W)合金等の金属材料から成り、上側主面の略中央部に光半導体素子21が載置される載置部22を設けた略長方形の板状である基体23を有する。また、この載置部22を囲繞するようにして基体23の上面に銀ロウ等のロウ材を介して接合されると共に、基体23の長辺側の両側面には貫通孔又は切欠部からなる取付部24を、基体23の短辺側の一側面に光ファイバ25の固定用の固定部材26が嵌着接合される貫通孔27を有し、鉄(Fe)−ニッケル(Ni)−コバルト(Co)合金等の金属材料から成る枠体28を有する。さらに、取付部24に嵌着された、半導体素子としての光半導体素子21と外部電気回路(図示せず)とを電気的に接続する高周波信号入出力用の入出力端子29と、枠体28の上面に取着された、光半導体素子21を気密に封止する蓋体30とを具備する。
【0004】
入出力端子29は、例えば図7に示すように、酸化アルミニウム(Al23)質焼結体等のセラミックスから成る絶縁体の上面に、その1辺から対向する他辺にかけて形成された線路導体31および線路導体31の両側に形成された同一面接地導体32を有する平板部33と、平板部33の上面に線路導体31および同一面接地導体32を間に挟んで接合された立壁部34とから構成されている。
【0005】
この入出力端子29の同一面接地導体32は、線路導体31を伝送する高周波信号の特性インピーダンスを整合させて反射損失、挿入損失を低減させ高周波信号の伝送特性を向上させるために、線路導体31の両側に等間隔をもって設けられている。即ち、高周波信号の伝送形態として、線路導体31と同一面接地導体32とでコプレーナ構造が採用されている。
【0006】
なお、線路導体31で伝送される高周波信号の伝送特性をさらに向上させるために、同一面接地導体32のみでなく、同一面接地導体32から平板部33下面にかけてビアホール(図示せず)を形成することにより、接地電位を強化し安定化することも行われている。
【0007】
この従来の光半導体パッケージは、基体23の載置部22に光半導体素子21を載置固定させると共に、光半導体素子21の電極をボンディングワイヤ(図示せず)を介して入出力端子29の線路導体31、同一面接地導体32に電気的に接続した後、枠体28の上面に蓋体30を接合させ、基体23と枠体28と蓋体30とから成る容器内部に光半導体素子21を気密に収容し、固定部材26に光ファイバ25を取り付けることにより、製品としての光半導体装置となる。
【0008】
このような光半導体装置は、光半導体素子21に外部電気回路から供給される高周波信号によって光励起させ、励起したレーザ光等の光を透光性部材35を通じて光ファイバ25に授受させ光ファイバ25内を伝送させることにより、大容量の情報を高速に伝送できる光電変換装置として機能し、光通信分野等に多用されている。
【0009】
近年、これら光半導体装置をより高密度化、高集積化する傾向にあり、光半導体パッケージの中に種々の半導体素子や半導体回路を搭載する必要が出てきている。複数の半導体素子や半導体回路を作動させるためには、それぞれを作動させるために複数の高周波信号線路が必要となる。そこで1個の入出力端子29に高周波信号線路として複数の線路導体31と同一面接地導体32を形成している。例えば、図8に複数の線路導体31と同一面接地導体32を有する入出力端子29を示す。図8の入出力端子29を図6の半導体パッケージの端子部分に取り付けて高集積化した光半導体装置としている。図8では高周波信号の信号線路となる線路導体31の両脇に等間隔をもって同一面接地導体32を設け、これらを複数組配列し、線路導体31と同一面接地導体32とでコプレーナ構造を形成している。
【0010】
【発明が解決しようとする課題】
しかしながら、この従来の光半導体パッケージにおいては、高周波信号の伝送特性を良好なものとするために、線路導体31と同一面接地導体32とビアホールとでコプレーナ構造が採用されているが、より高い周波数の高周波信号を伝送させる場合、以下のような問題が発生していた。
【0011】
高周波信号を良好に伝送させるにはセラミックス等の誘電体から成る入出力端子29の幅を極力狭くする必要がある。従来の光半導体パッケージにおいては、30GHzを超える高周波信号を伝送させるには、入出力端子29の幅が広すぎており、この幅に起因する共振が高周波信号の伝送特性に影響を及ぼし、高周波信号の伝送損失が増大するため、高周波信号の伝送特性が低下して光半導体素子21の作動性が損なわれるという問題点を有していた。
【0012】
また、入出力端子29の中に複数の高周波信号線路を形成する場合、信号線路1本の場合に比べ、必然的に入出力端子29の幅が広くなってしまい、幅に起因する共振の周波数が下がり、さらに高周波信号の伝送損失が増大することとなり、光半導体素子21が作動できなくなる可能性があった。
【0013】
また、入出力端子29の幅が広くなると枠体28との接合面積が大きくなるため、光半導体パッケージの変形が入出力端子29に伝わり易くなっており、その上、光半導体素子21の高周波化が進む昨今では、上記のような入出力端子29の幅等の大きさに起因する伝送損失を抑えるために、入出力端子29の平板部33の厚さが薄型化されてきているため、入出力端子29の機械的強度が低くなっている。このような入出力端子29を用いた光半導体パッケージにおいては、光半導体パッケージを外部電気回路基板等にネジ止めした際、光半導体パッケージ自体が変形し、この変形による応力が直接入出力端子29に加わり、その結果平板部33にクラックが発生し、高周波信号の伝送特性や光半導体パッケージ内部の気密性が損なわれるという問題点を有していた。
【0014】
したがって、本発明は上記問題点に鑑み完成されたもので、その目的は、誘電体から成る入出力端子を具備した半導体パッケージにおいて複数の線路導体を配置した際にそれぞれの線路導体において良好な高周波信号の伝送特性を得るとともに、入出力端子の平板部の幅に起因する高周波信号の周波数付近での共振を抑制し、また半導体パッケージをネジ止めした際に入出力端子に直接応力が加わらないようにすることにより、高周波信号の伝送特性や半導体パッケージ内部の気密性を良好なものとし、その結果、半導体素子を長期にわたり正常かつ安定に作動させ得る半導体パッケージを提供することにある。
【0015】
【課題を解決するための手段】
本発明の半導体パッケージは、上側主面に半導体素子が載置される載置部を有する基体と、前記上側主面に前記載置部を囲繞するように取着されると共に側部に切欠部または貫通孔から成る入出力端子の取付部が形成された金属枠体と、前記取付部に嵌着されて前記半導体素子と外部電気回路とを電気的に接続する複数の前記入出力端子とを具備した半導体素子収納用パッケージにおいて、前記複数の入出力端子は、略四角形の誘電体板から成り、上面に1辺から対向する他辺にかけて形成された線路導体を有する平板部と、該平板部の上面に前記線路導体を間に挟んで接合された誘電体から成る立壁部とからそれぞれ構成されており、前記平板部の前記線路導体に平行な両側面および下面が嵌入される溝が前記線路導体の伝送方向に略平行にして上面に複数形成された金属基台上に前記各入出力端子がそれぞれ嵌入載置されて、前記金属基台と共に前記取付部に嵌着されていることを特徴とするものである。
【0016】
本発明の半導体パッケージによれば、上記の構成により、外部電気回路基板等にネジ止めした際、この半導体パッケージ自体が変形しても、金属基台が緩衝機能を有するため入出力端子に過大な応力が加わらず、従来複数の線路導体を有しており幅の広かった1個の入出力端子が複数に分割され、線路導体1本につき1個の平板部の幅の狭い入出力端子を形成できるため、枠体との接合面積が小さくなり、半導体パッケージの変形が入出力端子に伝わりにくくなる。そのため、平板部にクラック等を生じることが大幅に抑制され、その結果、高周波信号の伝送特性や半導体パッケージ内部の気密性が損なわれることはない。
【0017】
さらに、金属基台の上面が平板部上面の線路導体と面一となることから、金属基台の上面が線路導体の両側に等間隔をもって配置した同一面接地導体層として機能し、線路導体と金属基台とでコプレーナ構造とすることができるため、入出力端子の平板部の幅を狭くすることが可能となる。したがって、入出力端子の平板部の幅に起因する高周波信号の周波数付近での共振を抑制することができ、高周波信号の伝送特性を良好なものとすることができる。
【0018】
また、このように入出力端子の幅を狭くして複数嵌入載置した際、それぞれの入出力端子間には金属基台部が挟まれているため線路導体は各々、その周囲を強固に金属で接地されている。従来のように1個の入出力端子の中に複数の線路導体を配したときにくらべ線路導体周囲の接地性が高められているため、隣り合う線路導体を伝送する信号の相互干渉もなく、アイソレーション特性も向上する。したがって、複数配置した線路導体を伝送する信号の高周波信号の伝送特性は、それぞれ良好なものとなる。
【0019】
本発明において、好ましくは、前記入出力端子の幅が0.6〜2mmであることを特徴とする。
【0020】
本発明は、上記の構成により、複数の線路導体を有する構造においてもそれぞれの線路導体を伝送する高周波信号は共振や雑音の影響を受けることなく、効率良く伝送できる。また、個々の入出力端子と金属基台との接合面積を従来より小さくでき、半導体パッケージの変形を個々の入出力端子に伝わりにくくできる。したがって、入出力端子にクラックが生じることを有効に抑制することができる。
【0021】
【発明の実施の形態】
本発明の半導体パッケージについて光半導体パッケージを一例として詳細に説明する。図1は、本発明の半導体パッケージの要部を示す斜視図、図2は本発明の半導体パッケージを構成する入出力端子を示す斜視図である。図1において、1は基体、2は金属枠体、3は入出力端子、4は金属基台であり、これらから成る光半導体パッケージ5の要部を示す。
【0022】
本発明の光半導体パッケージ5において、3つの入出力端子3は、図1及び図2に示すように、略四角形の誘電体板から成り、上面にその1辺から対向する他辺にかけて形成された線路導体7を有する平板部6と、平板部6の上面に線路導体7の中央部を挟んで他の2辺間にわたり接合された誘電体から成る立壁部8とからそれぞれ構成され、平板部6の線路導体7に平行な両側面および下面が嵌入される溝4aが上面に複数形成された金属基台4上にそれぞれ嵌入載置されて、金属基台4とともに取付部9に嵌着されている。
【0023】
この入出力端子3は、金属基台4とともに、金属枠体2の側部に形成された取付部9に銀ロウ等のロウ材により嵌着接合されており、金属枠体2の一部となって内外を気密に仕切ると共に金属枠体2の内外を導通させる導電路を構成している。入出力端子3はそれぞれに線路導体7を有しており、その線路導体7は高周波信号の伝送損失を抑えるために最適な線路幅に設計されている。この高周波信号線路を有する入出力端子3が複数載置され、入出力端子3はそれぞれ金属基台4により周囲を取り囲まれているため、その接地電位の安定性は極めて高い。したがって、複数の線路導体7はそれぞれ強固に接地され、雑音の影響や隣り合う信号による干渉が軽減されることとなり、それぞれの線路導体7において良好な高周波信号の伝送特性を得ることができる。
【0024】
また、平板部6の上面に形成された線路導体7は、金属基台4の上面と線路導体7が形成された平板部6の上面とが面一となることから、線路導体7の両側に等間隔で配置した同一面接地導体層として金属基台4の上面を利用することができ、線路導体7および金属基台4の上面によりコプレーナ構造を形成することができる。
【0025】
したがって、平板部6の上面に1本だけの線路導体7を形成して、平板部6の幅を最も狭くすることができる。好ましくは、平板部6の幅を0.6〜2mmとすれば30GHzを超える高周波信号においても良好な伝送特性を得ることができる。高周波信号の周波数を高くするに従い平板部6の幅は狭くするのが良い。しかし、平板部6の幅が0.6mm以下となった場合、線路導体7と平板部6側面の金属基台4との絶縁ギャップの確保が困難となり、線路導体7と金属基台4とが電気的短絡を起こしてしまい、高周波信号を伝送できなくなるという問題がある。また平板部6の幅が2mmを超えた場合、金属基台4の歪みの影響を受け易くなり平板部6にクラックが生じ易くなる上、平板部6の幅に起因する共振が信号周波数に近い周波数帯において発生するため、30GHzを超える高周波信号においては共振による損失により良好な伝送特性を得ることはできない。
【0026】
例えば、平板部6の幅を1.6mm、1.8mmに設定したシミュレーションによれば、1.8mmでは60GHz付近で共振が発生するのに対して、1.6mmでは60GHz付近での共振は発生せずより高い周波数帯域で共振が発生していると考えられる。したがって、平板部6の幅に起因する共振点を高周波信号の伝送特性に影響しない帯域にまで押し上げて、使用可能帯域を広げることが可能となるため、所望の高周波信号の伝送特性が確保でき、光半導体素子を正常かつ安定に作動させることができる。
【0027】
また、光半導体パッケージ5を外部回路基板等にネジ止めした際に発生する光半導体パッケージ5の変形による応力は以下のようにして吸収緩和される。
【0028】
先ず、基体1と金属枠体2とを接合している、基体1や金属枠体2の金属材料よりヤング率が小さく延性に優れた、銀(Ag)−銅(Cu)ロウ等の接合材で吸収され、次いでFe−Ni系合金やCu−W合金等から成る金属基台4が変形して吸収緩和する。さらに、入出力端子3と金属基台4とを接合している、Ag−Cuロウ等の接合材にて変形がさらに吸収される。このように、複数の部材の応力緩衝機能により、入出力端子3に直接過大な応力が加わらず、入出力端子3の平板部6や立壁部8にクラック等を生じることが大幅に抑制され、高周波信号の伝送特性が向上し、光半導体パッケージ5内部の良好な気密性が確保できる。
【0029】
ここで金属基台4の応力緩衝機能にとって金属基台4の上面に形成された溝4aに嵌入載置された入出力端子3の平板部6の厚さ,幅との関係が重要である。
【0030】
即ち、光半導体パッケージ5を外部回路基板等にネジ止めした際の光半導体パッケージ5自体の変形による応力が直接入出力端子3に加わるのを抑制し、平板部6にクラックが発生するのを防止するためには、金属基台4の厚さt2を平板部6の厚さt1の5倍から20倍の範囲内とするのが好ましい。また、入出力端子3を金属基台4の略中央部に寄せて載置し、金属基台4の幅をWとし、左端の入出力端子3の平板部6の左側面から右端の入出力端子3の平板部6の右側面までの長さをW1とした場合、0.5W≦W1≦0.8Wとすることが好ましい。
【0031】
これは金属基台4の厚さt2が平板部6の厚さt1の5倍未満では、金属基台4の応力吸収緩和が不十分となる傾向があり、一方、金属基台4の厚さt2が平板部6の厚さt1の20倍を超える場合には、金属基台4の容積が大となり、現在の小型軽量化の要求に合致せず、また金属基台4と入出力端子3との熱膨張差による影響が大きくなり入出力端子3にクラックが生じ易くなるからである。
【0032】
したがって、応力緩衝機能と小型軽量化の両方の要求を満足するためには、例えば平板部6の厚さt1を0.2mmとした場合、金属基台4の厚さt2を3mm程度とすることが金属基台4の応力緩衝機能にとっても最適であり、このことから金属基台4の厚さt2は平板部6の厚さt1の15倍程度、即ち13〜17倍程度が最も望ましい。
【0033】
また、入出力端子3を金属基台4の略中央部に寄せて載置するのが良く、金属基台4の両端部にて応力吸収させ、略中央部に載置された入出力端子3に加わる応力を低減でき、平板部6にクラックが発生するのを有効に防止できる。ただし、W1<0.5Wでは金属基台4の容積が大となり、現在の小型軽量化の要求に合致しない上、光半導体パッケージ5の変形を受けやすく平板部6に応力が生じ易くなるという問題があり、W1>0.8Wでは金属基台4の両端部での応力吸収が不十分となり平板部6にクラックが発生する可能性がある。
【0034】
さらに、図3のように、金属基台4は板状の載置部材4bとその下部に設けられた角柱状の基材4cとから構成され、基材4cが枠体2の内面に接して内側に収容される構造であっても良い。載置部材4bは、平板部6の線路導体7に平行な両側面および下面が嵌入される溝4aが線路導体7の伝送方向に略平行にして上面に複数形成され、溝4aにそれぞれ入出力端子3が嵌入載置される。入出力端子3の平板部6の上面に形成された線路導体7は、線路導体7および載置部材4bの上面によりコプレーナ構造を形成することができるとともに、載置部材4bが板状であることから、平板部6と金属基台4との熱膨張係数差により平板部6に加わる応力を低減できる。
【0035】
基材4cは枠体2の内側に収容されるため、光半導体パッケージ5の小型軽量化の要求に合致する上、基体1との接合面積を小さくでき、金属基台4は光半導体パッケージ5の変形を受けにくく平板部6に加わる応力を低減できる。
【0036】
載置部材4bと基材4cは、銀ロウ等のロウ材によって接合させて金属基台4と成したり、あるいは金属のインゴット(塊)に切削加工法等の従来周知の金属加工法を施すことにより載置部材4bと基材4cが一体となった金属基台4を成しても良い。載置部材4bと基材4cは、同一の材料から成っても良く、あるいは、載置部材4bが平板部6と熱膨張係数の近似した材料から成り、基材4cが載置部材4bに比べヤング率の小さい材料から成っても良い。
【0037】
金属基台4は、Fe−Ni−Co合金(ヤング率は13.7×104N/mm2),Fe−Ni合金(42Ni)(ヤング率は14.7×104N/mm2),Fe−Ni合金(50Ni)(ヤング率は16.2×104N/mm2),Cu−W合金(10Cu)(31×104N/mm2),Cu−W合金(15Cu)(29×104N/mm2),Cu−W合金(20Cu)(26×104N/mm2)等から成り、このうち金属枠体2よりもヤング率が小さいものが好ましい。その場合、金属基台4が応力に対して変形し歪み易くなり、応力を有効に吸収し緩和する。金属枠体2は、Fe−Ni−Co合金(ヤング率は13.7×104N/mm2),Fe−Ni合金(42Ni)(ヤング率は14.7×104N/mm2),Fe−Ni合金(50Ni)(ヤング率は16.2×104N/mm2)等から成るものであるから、金属基台4のヤング率が金属枠体2よりも小さくなるように選択すれば良い。
【0038】
したがって、本発明においては、金属基台4はヤング率が金属枠体2よりも小さく厚さが平板部6の5〜20倍であることが好適であり、その場合応力緩衝機能に優れたものとなる。
【0039】
尚、入出力端子3の金属枠体2の内側に位置する線路導体7には、光半導体素子(図示せず)の電極がボンディングワイヤ等を介して電気的に接続され、金属枠体2の外側に位置する線路導体7には、外部の駆動回路に接続するための外部リード端子(図示せず)が銀ロウ等のロウ材により接合される。
【0040】
また、入出力端子3を構成する平板部6及び立壁部8は以下のようにして作製される。例えば、酸化アルミニウム(Al23)質焼結体から成る場合、まず酸化アルミニウム、酸化珪素(SiO2)、酸化マグネシウム(MgO)および酸化カルシウム(CaO)等の原料粉末に適当な有機バインダー、可塑剤、溶剤等を添加混合して泥しょう状と成す。これを従来周知のドクターブレード法やカレンダーロール法等のテープ成形技術を採用して複数のセラミックグリーンシートを得る。次いで、このセラミックグリーンシートに、タングステン(W)やモリブデン(Mo)等の高融点金属粉末に適当な有機バインダー、可塑剤、溶剤等を添加混合して得た金属ペーストを、スクリーン印刷法等の厚膜形成技術を採用して、線路導体7となるメタライズ配線層を所定のパターンに印刷塗布する。その後、そのセラミックグリーンシートを複数枚積層すると共に、還元雰囲気中、約1600℃の温度で焼成することにより製作される。
【0041】
一方、基体1と金属枠体2と蓋体(図示せず)とで内部に光半導体素子を収容するための容器が構成される。
【0042】
基体1は、光半導体素子を支持するための支持部材として作用し、その上面の略中央部に光半導体素子を載置するための載置部を有し、載置部には光半導体素子が間に金(Au)−シリコン(Si)ロウ材等の接着剤により接着固定される。
【0043】
また、基体1は、Fe−Ni−Co合金やCu−W合金等の金属材料から成り、例えばFe−Ni−Co合金から成る場合、Fe−Ni−Co合金のインゴットに圧延加工法や打ち抜き加工法等の従来周知の金属加工法を施すことにより製作される。
【0044】
尚、基体1は、その外表面に耐食性に優れかつロウ材に対して濡れ性の良い金属、具体的には厚さ0.5〜9μmのニッケル層と厚さ0.5〜5μmの金層を順次メッキ法により被着させておくと、基体1が酸化腐食するのを有効に防止することができ、また基体1上面に光半導体素子を強固に接着固定させることができる。
【0045】
また、基体1の上面には、光半導体素子が載置される載置部を囲繞するように金属枠体2が接合されており、この金属枠体2の内側に光半導体素子を収容するための空所が形成される。
【0046】
この金属枠体2は、Fe−Ni−Co合金やFe−Ni合金等の金属材料から成り、例えば、Fe−Ni−Co合金のインゴットをプレス加工により枠状とすることにより形成され、基体1への取着は基体1の上面と金属枠体2の下面とを銀ロウ材を介して銀ロウ付けすることにより行われる。
【0047】
また、入出力端子3の平板部6の上面に形成された線路導体7や金属基台4の露出する表面には、NiやAu等の耐食性に優れかつロウ材との濡れ性に優れる金属を、それぞれ厚さ0.5〜9μmと厚さ0.5〜5μmとなるように順次メッキ法により被着させておくのが良い。これにより、線路導体7や金属基台4の酸化腐食を有効に防止することができると共に、線路導体7へのボンディングワイヤや外部接続端子の接続、あるいは入出力端子3の取付部9及び基体1への取着が確実強固なものとなる。
【0048】
尚、本発明は上記実施の形態に限定されず、本発明の要旨を逸脱しない範囲内において種々の変更を行うことは何等支障ない。例えば、図4及び図5に示すように、線路導体7と平行な平板部6及び立壁部8の側面を、金属基台4で囲むように接合し、平板部6の上面に形成した線路導体7と面一である金属基台4の上面を線路導体7の両側に等間隔で配置したコプレーナ構造としても良い。
【0049】
この場合、光半導体パッケージ5を外部電気回路基板にネジ止めした際の変形による応力を緩和する効果がより向上する。その結果、接合材及び金属基台4等の複数の部材による緩衝機能により、平板部6のクラック発生を皆無にするという効果を奏する。
【0050】
また、上記と同様に、平板部6の幅に起因する共振周波数を高周波信号の周波数付近から押し上げて、高周波信号に影響の無いようにし、使用可能帯域が広がるという効果も有する。
【0051】
【発明の効果】
本発明は、複数の入出力端子は、略四角形の誘電体板から成り、上面に1辺から対向する他辺にかけて形成された線路導体を有する平板部と、平板部の上面に線路導体を間に挟んで接合された誘電体から成る立壁部とからそれぞれ構成されており、平板部の線路導体に平行な両側面および下面が嵌入される溝が線路導体の伝送方向に略平行にして上面に複数形成された金属基台上に各入出力端子がそれぞれ嵌入載置されて、金属基台と共に取付部に嵌着されていることにより、半導体パッケージを外部電気回路基板等にネジ止めした際、この半導体パッケージ自体が変形しても、入出力端子の幅を狭くできるため個々の入出力端子に半導体パッケージの変形が伝わりにくくなり、その上、金属基台の応力緩衝作用と、金属基台と基体及び金属枠体との接合材および金属基台と平板部との接合材による複数の部材の応力緩衝作用により、入出力端子に過大な応力が加わらず、その結果、平板部にクラック等を生じることが大幅に抑制されて高周波信号の伝送特性や半導体パッケージ内部の気密性が損なわれることはない。同時に、高周波信号が互いに干渉することなく良好な伝送特性を得ることができる。
【0052】
さらに、金属基台の上面が平板部上面の線路導体と面一となることから、金属基台の上面が線路導体の両側に等間隔をもって配置した同一面接地導体層として機能し、線路導体と金属基台とでコプレーナ構造とすることができるため、入出力端子の平板部の幅を狭くすることが可能となる。したがって、入出力端子の平板部の幅に起因する高周波信号の周波数付近での共振を抑制することができ、線路導体を伝送する高周波信号の伝送特性を良好なものとできる。即ち、共振周波数を高周波信号に影響のない高い周波数帯域にまで押し上げることが可能となり、所望の高周波信号の伝送特性が確保でき、半導体素子を長期にわたり正常かつ安定に作動させることができる。
【0053】
本発明は、好ましくは入出力端子の幅を0.6〜2mmとすることにより高周波における共振の影響を低減でき、良好な伝送特性を得ることができる。
【図面の簡単な説明】
【図1】本発明の半導体パッケージの要部を示す斜視図である。
【図2】本発明の半導体パッケージを構成する入出力端子について実施の形態の一例を示す斜視図である。
【図3】本発明の半導体パッケージを構成する入出力端子について実施の形態の他の例を示す斜視図である。
【図4】本発明の半導体パッケージについて実施の形態の他の例を示す要部の斜視図である。
【図5】本発明の半導体パッケージを構成する入出力端子について実施の形態の他の例を示す斜視図である。
【図6】従来の半導体パッケージを示す断面図である。
【図7】従来の半導体パッケージの入出力端子を示す斜視図である。
【図8】従来の半導体パッケージの複数の信号線路を有する入出力端子を示す斜視図である。
【符号の説明】
1:基体
2:金属枠体
3:入出力端子
4:金属基台
4a:溝
5:光半導体パッケージ
6:平板部
7:線路導体
8:立壁部
9:取付部
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a package for housing a semiconductor element that houses various semiconductor elements that operate at a high frequency used in fields such as optical communication, microwave communication, and millimeter wave communication.
[0002]
[Prior art]
As a semiconductor element housing package (hereinafter referred to as a semiconductor package) for hermetically sealing and housing various semiconductor elements operating at a high frequency such as conventional optical communication, microwave communication, and millimeter wave communication, it is used in the optical communication field, for example. The obtained optical semiconductor package is shown in FIG.
[0003]
As shown in the figure, the optical semiconductor package is made of a metal material such as an iron (Fe) -nickel (Ni) -cobalt (Co) alloy or a copper (Cu) -tungsten (W) alloy, and is an abbreviation of the upper main surface. It has the base | substrate 23 which is the substantially rectangular plate shape which provided the mounting part 22 in which the optical semiconductor element 21 is mounted in the center part. Further, it is joined to the upper surface of the base 23 via a brazing material such as silver brazing so as to surround the mounting portion 22, and both side surfaces on the long side of the base 23 are formed with through holes or notches. The mounting portion 24 has a through hole 27 into which a fixing member 26 for fixing the optical fiber 25 is fitted and joined to one side surface of the base 23, and iron (Fe) -nickel (Ni) -cobalt ( It has a frame 28 made of a metal material such as a Co) alloy. Further, an optical semiconductor element 21 as a semiconductor element and an input / output terminal 29 for inputting / outputting a high frequency signal electrically connected to an external electric circuit (not shown) fitted to the attachment portion 24, and a frame body 28. And a lid 30 that hermetically seals the optical semiconductor element 21.
[0004]
For example, as shown in FIG. 7, the input / output terminal 29 is a line formed on the upper surface of an insulator made of ceramics such as an aluminum oxide (Al 2 O 3 ) -based sintered body from one side thereof to the opposite side. The flat plate portion 33 having the same surface ground conductor 32 formed on both sides of the conductor 31 and the line conductor 31, and the standing wall portion 34 joined to the upper surface of the flat plate portion 33 with the line conductor 31 and the same surface ground conductor 32 interposed therebetween. It consists of and.
[0005]
The ground conductor 32 on the same plane of the input / output terminal 29 matches the characteristic impedance of the high-frequency signal transmitted through the line conductor 31 to reduce reflection loss and insertion loss and improve the transmission characteristic of the high-frequency signal. Are provided at equal intervals on both sides. That is, a coplanar structure is adopted with the line conductor 31 and the same surface ground conductor 32 as a transmission form of the high frequency signal.
[0006]
In order to further improve the transmission characteristics of the high-frequency signal transmitted through the line conductor 31, not only the same-surface ground conductor 32 but also a via hole (not shown) is formed from the same-surface ground conductor 32 to the lower surface of the flat plate portion 33. As a result, the ground potential is strengthened and stabilized.
[0007]
In this conventional optical semiconductor package, the optical semiconductor element 21 is mounted and fixed on the mounting portion 22 of the base 23, and the electrode of the optical semiconductor element 21 is connected to the input / output terminal 29 via bonding wires (not shown). After electrically connecting to the conductor 31 and the ground conductor 32 on the same plane, the lid 30 is joined to the upper surface of the frame 28, and the optical semiconductor element 21 is placed inside the container composed of the base 23, the frame 28, and the lid 30. An optical semiconductor device as a product is obtained by housing in an airtight manner and attaching the optical fiber 25 to the fixing member 26.
[0008]
In such an optical semiconductor device, the optical semiconductor element 21 is optically excited by a high-frequency signal supplied from an external electric circuit, and the excited light such as laser light is transferred to the optical fiber 25 through the translucent member 35. By transmitting this, it functions as a photoelectric conversion device capable of transmitting a large amount of information at high speed, and is widely used in the field of optical communication.
[0009]
In recent years, these optical semiconductor devices tend to have higher density and higher integration, and it has become necessary to mount various semiconductor elements and semiconductor circuits in an optical semiconductor package. In order to operate a plurality of semiconductor elements and semiconductor circuits, a plurality of high-frequency signal lines are required to operate each of the semiconductor elements and semiconductor circuits. Therefore, a plurality of line conductors 31 and the same surface ground conductor 32 are formed on one input / output terminal 29 as a high-frequency signal line. For example, FIG. 8 shows an input / output terminal 29 having a plurality of line conductors 31 and the same surface ground conductor 32. The input / output terminal 29 of FIG. 8 is attached to the terminal portion of the semiconductor package of FIG. 6 to provide a highly integrated optical semiconductor device. In FIG. 8, the same-surface ground conductors 32 are provided at equal intervals on both sides of the line conductor 31 that becomes a signal line for high-frequency signals, and a plurality of these are arranged to form a coplanar structure with the line conductor 31 and the same-surface ground conductor 32. doing.
[0010]
[Problems to be solved by the invention]
However, in this conventional optical semiconductor package, a coplanar structure is adopted with the line conductor 31 and the same grounded conductor 32 and the via hole in order to improve the transmission characteristic of the high frequency signal. When transmitting a high-frequency signal, the following problems have occurred.
[0011]
In order to transmit a high-frequency signal satisfactorily, it is necessary to reduce the width of the input / output terminal 29 made of a dielectric material such as ceramics as much as possible. In the conventional optical semiconductor package, in order to transmit a high frequency signal exceeding 30 GHz, the width of the input / output terminal 29 is too wide, and the resonance caused by this width affects the transmission characteristics of the high frequency signal. Therefore, there is a problem that the operability of the optical semiconductor element 21 is impaired due to a decrease in transmission characteristics of the high frequency signal.
[0012]
Further, when a plurality of high-frequency signal lines are formed in the input / output terminal 29, the width of the input / output terminal 29 is inevitably wider than in the case of a single signal line, and the resonance frequency due to the width is increased. As a result, the transmission loss of the high-frequency signal increases and the optical semiconductor element 21 may not be able to operate.
[0013]
Further, when the width of the input / output terminal 29 is increased, the bonding area with the frame body 28 is increased, so that the deformation of the optical semiconductor package is easily transmitted to the input / output terminal 29, and the frequency of the optical semiconductor element 21 is increased. In recent years, the thickness of the flat plate portion 33 of the input / output terminal 29 has been reduced in order to suppress the transmission loss due to the width and the like of the input / output terminal 29 as described above. The mechanical strength of the output terminal 29 is low. In an optical semiconductor package using such an input / output terminal 29, when the optical semiconductor package is screwed to an external electric circuit board or the like, the optical semiconductor package itself is deformed, and the stress due to this deformation is directly applied to the input / output terminal 29. In addition, as a result, a crack occurs in the flat plate portion 33, and there is a problem that transmission characteristics of the high frequency signal and airtightness inside the optical semiconductor package are impaired.
[0014]
Accordingly, the present invention has been completed in view of the above-described problems, and its object is to achieve good high frequency in each line conductor when a plurality of line conductors are arranged in a semiconductor package having an input / output terminal made of a dielectric. Obtains signal transmission characteristics, suppresses resonance near the frequency of high-frequency signals due to the width of the flat part of the input / output terminals, and prevents direct stress from being applied to the input / output terminals when the semiconductor package is screwed. Accordingly, it is an object of the present invention to provide a semiconductor package in which high-frequency signal transmission characteristics and airtightness inside a semiconductor package are improved, and as a result, a semiconductor device can operate normally and stably over a long period of time.
[0015]
[Means for Solving the Problems]
The semiconductor package of the present invention includes a base body having a mounting portion on which the semiconductor element is mounted on the upper main surface, and a cutout portion on the side portion that is attached to the upper main surface so as to surround the mounting portion. Alternatively, a metal frame having an input / output terminal mounting portion formed of a through hole and a plurality of the input / output terminals that are fitted to the mounting portion and electrically connect the semiconductor element and an external electric circuit. In the package for housing a semiconductor element, the plurality of input / output terminals are formed of a substantially rectangular dielectric plate, and a flat plate portion having a line conductor formed on the upper surface from one side to the opposite side, and the flat plate portion And a vertical wall portion made of a dielectric material that is joined to the upper surface of the line conductor with the line conductor interposed therebetween, and grooves in which both side surfaces and a lower surface of the flat plate portion are parallel to the line conductor are inserted. Nearly parallel to the conductor transmission direction Are respectively fitted placed each input-output terminal is a plurality formed metal base on the upper surface and is characterized in that it is fitted to the mounting portion together with the metal base.
[0016]
According to the semiconductor package of the present invention, when the screw is fixed to the external electric circuit board or the like, the metal base has a buffering function even when the semiconductor package itself is deformed. No stress is applied, and a single wide input / output terminal having a plurality of line conductors in the past is divided into a plurality of lines to form one narrow flat input / output terminal per line conductor. Therefore, the bonding area with the frame is reduced, and the deformation of the semiconductor package is hardly transmitted to the input / output terminals. Therefore, the occurrence of cracks and the like in the flat plate portion is greatly suppressed, and as a result, the transmission characteristics of high-frequency signals and the airtightness inside the semiconductor package are not impaired.
[0017]
Furthermore, since the upper surface of the metal base is flush with the line conductor on the upper surface of the flat plate portion, the upper surface of the metal base functions as a coplanar ground conductor layer arranged at equal intervals on both sides of the line conductor, Since the coplanar structure can be formed with the metal base, the width of the flat plate portion of the input / output terminal can be reduced. Therefore, resonance in the vicinity of the frequency of the high-frequency signal due to the width of the flat plate portion of the input / output terminal can be suppressed, and the transmission characteristics of the high-frequency signal can be improved.
[0018]
In addition, when a plurality of input / output terminals are inserted and mounted in such a manner, a metal base portion is sandwiched between the input / output terminals, so that each line conductor has a strong metal surrounding. Is grounded. Since the grounding property around the line conductor is improved compared to the case where a plurality of line conductors are arranged in one input / output terminal as in the past, there is no mutual interference of signals transmitted through adjacent line conductors. Isolation characteristics are also improved. Accordingly, the transmission characteristics of the high-frequency signal of the signal transmitted through the plurality of line conductors are good.
[0019]
In the present invention, preferably, the width of the input / output terminal is 0.6 to 2 mm.
[0020]
With the above configuration, the present invention can efficiently transmit a high-frequency signal transmitted through each line conductor without being affected by resonance or noise even in a structure having a plurality of line conductors. Further, the bonding area between the individual input / output terminals and the metal base can be made smaller than before, and the deformation of the semiconductor package can be hardly transmitted to the individual input / output terminals. Therefore, it is possible to effectively suppress the occurrence of cracks in the input / output terminals.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
The semiconductor package of the present invention will be described in detail using an optical semiconductor package as an example. FIG. 1 is a perspective view showing a main part of a semiconductor package of the present invention, and FIG. 2 is a perspective view showing input / output terminals constituting the semiconductor package of the present invention. In FIG. 1, 1 is a base, 2 is a metal frame, 3 is an input / output terminal, 4 is a metal base, and shows the main part of the optical semiconductor package 5 made of these.
[0022]
In the optical semiconductor package 5 of the present invention, as shown in FIGS. 1 and 2, the three input / output terminals 3 are made of a substantially rectangular dielectric plate, and are formed on the upper surface from one side thereof to the other side facing each other. The flat plate portion 6 having the line conductor 7 and the upright wall portion 8 made of a dielectric material joined to the upper surface of the flat plate portion 6 across the other two sides with the central portion of the line conductor 7 interposed therebetween are respectively formed. The groove 4 a into which both side surfaces and the lower surface parallel to the line conductor 7 are inserted is respectively mounted on the metal base 4 formed on the upper surface, and is fitted to the mounting portion 9 together with the metal base 4. Yes.
[0023]
The input / output terminal 3 is fitted and joined to a mounting portion 9 formed on the side of the metal frame 2 together with the metal base 4 with a brazing material such as silver brazing. Thus, the inside and outside are hermetically partitioned, and a conductive path is formed for conducting the inside and outside of the metal frame 2. Each input / output terminal 3 has a line conductor 7, and the line conductor 7 is designed to have an optimum line width in order to suppress transmission loss of high-frequency signals. Since a plurality of input / output terminals 3 having the high-frequency signal line are mounted and the input / output terminals 3 are surrounded by the metal base 4, the stability of the ground potential is extremely high. Therefore, each of the plurality of line conductors 7 is firmly grounded, so that the influence of noise and interference due to adjacent signals are reduced, and good transmission characteristics of high frequency signals can be obtained in each line conductor 7.
[0024]
Further, the line conductor 7 formed on the upper surface of the flat plate portion 6 is flush with the upper surface of the metal base 4 and the upper surface of the flat plate portion 6 on which the line conductor 7 is formed. The upper surface of the metal base 4 can be used as the same-surface ground conductor layers arranged at equal intervals, and a coplanar structure can be formed by the upper surfaces of the line conductor 7 and the metal base 4.
[0025]
Therefore, only one line conductor 7 is formed on the upper surface of the flat plate portion 6, and the width of the flat plate portion 6 can be made the smallest. Preferably, if the width of the flat plate portion 6 is 0.6 to 2 mm, good transmission characteristics can be obtained even for high-frequency signals exceeding 30 GHz. As the frequency of the high frequency signal is increased, the width of the flat plate portion 6 is preferably narrowed. However, when the width of the flat plate portion 6 is 0.6 mm or less, it is difficult to secure an insulation gap between the line conductor 7 and the metal base 4 on the side surface of the flat plate portion 6, and the line conductor 7 and the metal base 4 are There is a problem that an electrical short circuit is caused and a high-frequency signal cannot be transmitted. Further, when the width of the flat plate portion 6 exceeds 2 mm, the flat plate portion 6 is easily affected by the distortion of the metal base 4 and cracks are easily generated, and resonance due to the width of the flat plate portion 6 is close to the signal frequency. Since it occurs in the frequency band, good transmission characteristics cannot be obtained due to loss due to resonance in a high-frequency signal exceeding 30 GHz.
[0026]
For example, according to a simulation in which the width of the flat plate portion 6 is set to 1.6 mm and 1.8 mm, resonance occurs near 60 GHz at 1.8 mm, whereas resonance occurs near 60 GHz at 1.6 mm. It is considered that resonance occurs in a higher frequency band. Therefore, the resonance point due to the width of the flat plate portion 6 can be pushed up to a band that does not affect the transmission characteristics of the high-frequency signal, and the usable band can be widened, so that the desired high-frequency signal transmission characteristics can be secured, The optical semiconductor element can be operated normally and stably.
[0027]
Further, the stress due to the deformation of the optical semiconductor package 5 generated when the optical semiconductor package 5 is screwed to the external circuit board or the like is absorbed and relaxed as follows.
[0028]
First, a bonding material, such as silver (Ag) -copper (Cu) brazing, having a lower Young's modulus and excellent ductility than the metal material of the substrate 1 or the metal frame 2, which bonds the substrate 1 and the metal frame 2. Then, the metal base 4 made of Fe—Ni alloy, Cu—W alloy or the like is deformed and relaxed. Further, the deformation is further absorbed by a bonding material such as Ag—Cu brazing that joins the input / output terminal 3 and the metal base 4. As described above, the stress buffering function of the plurality of members does not apply excessive stress directly to the input / output terminal 3, and it is greatly suppressed that the flat plate portion 6 and the standing wall portion 8 of the input / output terminal 3 are cracked, High-frequency signal transmission characteristics are improved, and good airtightness inside the optical semiconductor package 5 can be secured.
[0029]
Here, for the stress buffering function of the metal base 4, the relationship between the thickness and width of the flat plate portion 6 of the input / output terminal 3 fitted and placed in the groove 4 a formed on the upper surface of the metal base 4 is important.
[0030]
That is, the stress due to deformation of the optical semiconductor package 5 itself when the optical semiconductor package 5 is screwed to an external circuit board or the like is suppressed from being directly applied to the input / output terminal 3, and cracks are prevented from occurring in the flat plate portion 6. In order to achieve this, it is preferable that the thickness t2 of the metal base 4 be in the range of 5 to 20 times the thickness t1 of the flat plate portion 6. Further, the input / output terminal 3 is placed close to the center of the metal base 4, the width of the metal base 4 is W, and the left / right input / output from the left side of the flat plate portion 6 of the left / right input / output terminal 3. When the length to the right side surface of the flat plate portion 6 of the terminal 3 is W1, it is preferable that 0.5W ≦ W1 ≦ 0.8W.
[0031]
This is because when the thickness t2 of the metal base 4 is less than 5 times the thickness t1 of the flat plate portion 6, the stress absorption relaxation of the metal base 4 tends to be insufficient, whereas the thickness of the metal base 4 If t2 exceeds 20 times the thickness t1 of the flat plate portion 6, the volume of the metal base 4 becomes large, which does not meet the current requirements for reduction in size and weight, and the metal base 4 and the input / output terminal 3 This is because the influence of the difference in thermal expansion between the input and output terminals 3 increases and cracks are likely to occur in the input / output terminals 3.
[0032]
Therefore, in order to satisfy the requirements for both the stress buffering function and the reduction in size and weight, for example, when the thickness t1 of the flat plate portion 6 is 0.2 mm, the thickness t2 of the metal base 4 is about 3 mm. However, the thickness t2 of the metal base 4 is most preferably about 15 times the thickness t1 of the flat plate portion 6, that is, about 13 to 17 times.
[0033]
Further, the input / output terminal 3 is preferably placed close to the central portion of the metal base 4, and stress is absorbed at both ends of the metal base 4, and the input / output terminal 3 placed at the substantially central portion. Stress can be reduced, and cracks can be effectively prevented from occurring in the flat plate portion 6. However, when W1 <0.5W, the volume of the metal base 4 becomes large, which does not meet the current requirements for reduction in size and weight, and that the optical semiconductor package 5 is easily deformed and stress is easily generated in the flat plate portion 6. If W1> 0.8 W, stress absorption at both ends of the metal base 4 is insufficient, and cracks may occur in the flat plate portion 6.
[0034]
Further, as shown in FIG. 3, the metal base 4 is composed of a plate-like mounting member 4 b and a prismatic base material 4 c provided under the plate-like mounting member 4 b, and the base material 4 c is in contact with the inner surface of the frame body 2. The structure accommodated inside may be sufficient. The mounting member 4b is formed with a plurality of grooves 4a in which both side surfaces parallel to the line conductor 7 and the lower surface of the flat plate portion 6 are fitted substantially parallel to the transmission direction of the line conductor 7, and is input / output to the grooves 4a. The terminal 3 is inserted and mounted. The line conductor 7 formed on the upper surface of the flat plate portion 6 of the input / output terminal 3 can form a coplanar structure by the upper surface of the line conductor 7 and the mounting member 4b, and the mounting member 4b is plate-shaped. Therefore, the stress applied to the flat plate portion 6 due to the difference in thermal expansion coefficient between the flat plate portion 6 and the metal base 4 can be reduced.
[0035]
Since the base material 4c is housed inside the frame body 2, the optical semiconductor package 5 meets the requirements for reduction in size and weight, and the bonding area with the base body 1 can be reduced. The stress applied to the flat plate portion 6 is less likely to be deformed and can be reduced.
[0036]
The mounting member 4b and the base material 4c are joined by a brazing material such as silver brazing to form the metal base 4, or a metal ingot (lumb) is subjected to a conventionally known metal processing method such as a cutting method. Thus, the metal base 4 in which the mounting member 4b and the base material 4c are integrated may be formed. The mounting member 4b and the base material 4c may be made of the same material, or the mounting member 4b is made of a material having a thermal expansion coefficient approximate to that of the flat plate portion 6, and the base material 4c is compared with the mounting member 4b. It may be made of a material having a low Young's modulus.
[0037]
The metal base 4 includes an Fe—Ni—Co alloy (Young's modulus is 13.7 × 10 4 N / mm 2 ), Fe—Ni alloy (42Ni) (Young's modulus is 14.7 × 10 4 N / mm 2 ). , Fe—Ni alloy (50Ni) (Young's modulus is 16.2 × 10 4 N / mm 2 ), Cu—W alloy (10Cu) (31 × 10 4 N / mm 2 ), Cu—W alloy (15Cu) ( 29 × 10 4 N / mm 2 ), Cu—W alloy (20Cu) (26 × 10 4 N / mm 2 ), etc., among which the Young's modulus is smaller than that of the metal frame 2. In that case, the metal base 4 is deformed and easily distorted with respect to stress, and effectively absorbs and relaxes the stress. The metal frame 2 includes an Fe—Ni—Co alloy (Young's modulus is 13.7 × 10 4 N / mm 2 ), an Fe—Ni alloy (42Ni) (Young's modulus is 14.7 × 10 4 N / mm 2 ). , Fe—Ni alloy (50Ni) (Young's modulus is 16.2 × 10 4 N / mm 2 ), etc., so that the Young's modulus of the metal base 4 is selected to be smaller than that of the metal frame 2 Just do it.
[0038]
Therefore, in the present invention, it is preferable that the metal base 4 has a Young's modulus smaller than that of the metal frame 2 and a thickness of 5 to 20 times that of the flat plate portion 6. It becomes.
[0039]
Note that an electrode of an optical semiconductor element (not shown) is electrically connected to the line conductor 7 located inside the metal frame 2 of the input / output terminal 3 via a bonding wire or the like. An external lead terminal (not shown) for connecting to an external drive circuit is joined to the line conductor 7 located outside by a brazing material such as silver brazing.
[0040]
Moreover, the flat plate part 6 and the standing wall part 8 which comprise the input / output terminal 3 are produced as follows. For example, when an aluminum oxide (Al 2 O 3 ) sintered body is used, first, an organic binder suitable for raw material powders such as aluminum oxide, silicon oxide (SiO 2 ), magnesium oxide (MgO), and calcium oxide (CaO), A plasticizer, solvent, etc. are added and mixed to form a mud. A plurality of ceramic green sheets are obtained by adopting a tape forming technique such as a doctor blade method or a calendar roll method, which is conventionally known. Next, a metal paste obtained by adding and mixing an appropriate organic binder, plasticizer, solvent, etc. to a high melting point metal powder such as tungsten (W) or molybdenum (Mo) is mixed with this ceramic green sheet by a screen printing method or the like. A thick film forming technique is employed to print and apply a metallized wiring layer to be the line conductor 7 in a predetermined pattern. Thereafter, a plurality of ceramic green sheets are laminated and fired at a temperature of about 1600 ° C. in a reducing atmosphere.
[0041]
On the other hand, the base 1, the metal frame 2, and the lid (not shown) constitute a container for housing the optical semiconductor element therein.
[0042]
The base body 1 functions as a support member for supporting the optical semiconductor element, and has a mounting portion for mounting the optical semiconductor element at a substantially central portion of the upper surface thereof. It is bonded and fixed with an adhesive such as gold (Au) -silicon (Si) brazing material.
[0043]
The substrate 1 is made of a metal material such as an Fe—Ni—Co alloy or a Cu—W alloy. For example, when the substrate 1 is made of an Fe—Ni—Co alloy, the ingot of the Fe—Ni—Co alloy is rolled or punched. It is manufactured by applying a conventionally known metal processing method such as a method.
[0044]
The substrate 1 has a metal having excellent corrosion resistance and good wettability to the brazing material on its outer surface, specifically, a nickel layer having a thickness of 0.5 to 9 μm and a gold layer having a thickness of 0.5 to 5 μm. Are sequentially deposited by a plating method, it is possible to effectively prevent the base 1 from being oxidatively corroded, and the optical semiconductor element can be firmly bonded and fixed to the upper surface of the base 1.
[0045]
Further, a metal frame 2 is joined to the upper surface of the base 1 so as to surround a placement portion on which the optical semiconductor element is placed, and the optical semiconductor element is accommodated inside the metal frame 2. A void is formed.
[0046]
The metal frame 2 is made of a metal material such as an Fe—Ni—Co alloy or an Fe—Ni alloy. For example, the metal frame 2 is formed by pressing an ingot of an Fe—Ni—Co alloy into a frame shape by press working. The attachment is performed by brazing the upper surface of the substrate 1 and the lower surface of the metal frame 2 with a silver brazing material.
[0047]
Further, the exposed surface of the line conductor 7 and the metal base 4 formed on the upper surface of the flat plate portion 6 of the input / output terminal 3 is made of a metal having excellent corrosion resistance such as Ni and Au and excellent wettability with the brazing material. It is preferable that the layers are sequentially deposited by plating so that the thickness is 0.5 to 9 μm and the thickness is 0.5 to 5 μm. Thereby, the oxidative corrosion of the line conductor 7 and the metal base 4 can be effectively prevented, and the connection of the bonding wire and the external connection terminal to the line conductor 7 or the mounting portion 9 of the input / output terminal 3 and the base body 1 are possible. The attachment to will be surely solid.
[0048]
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, as shown in FIGS. 4 and 5, the line conductor formed by joining the side surfaces of the flat plate portion 6 and the standing wall portion 8 parallel to the line conductor 7 so as to surround the metal base 4 and forming the upper surface of the flat plate portion 6. A coplanar structure in which the upper surface of the metal base 4 that is flush with the line 7 is arranged on both sides of the line conductor 7 at equal intervals may be employed.
[0049]
In this case, the effect of relieving stress due to deformation when the optical semiconductor package 5 is screwed to the external electric circuit board is further improved. As a result, there is an effect that the generation of cracks in the flat plate portion 6 is eliminated by the buffering function of the bonding material and the plurality of members such as the metal base 4.
[0050]
Further, similarly to the above, the resonance frequency caused by the width of the flat plate portion 6 is pushed up from the vicinity of the frequency of the high frequency signal so that the high frequency signal is not affected, and the usable band is widened.
[0051]
【The invention's effect】
In the present invention, the plurality of input / output terminals are formed of a substantially rectangular dielectric plate, and a flat plate portion having a line conductor formed from one side to the opposite side on the upper surface and a line conductor interposed between the upper surface of the flat plate portion. And both sides of the flat plate portion parallel to the line conductor and the groove into which the lower surface is inserted are substantially parallel to the transmission direction of the line conductor and formed on the upper surface. When each of the input / output terminals is fitted and mounted on a plurality of formed metal bases, and is fitted to the mounting portion together with the metal base, when the semiconductor package is screwed to an external electric circuit board or the like, Even if the semiconductor package itself is deformed, the width of the input / output terminals can be narrowed so that the deformation of the semiconductor package is not easily transmitted to the individual input / output terminals. In addition, the stress buffering action of the metal base and the metal base Base and metal Excessive stress is not applied to the input / output terminals due to the stress buffering action of multiple members due to the bonding material to the body and the bonding material between the metal base and the flat plate portion, resulting in significant cracks in the flat plate portion. Therefore, the transmission characteristics of the high frequency signal and the airtightness inside the semiconductor package are not impaired. At the same time, good transmission characteristics can be obtained without high-frequency signals interfering with each other.
[0052]
Furthermore, since the upper surface of the metal base is flush with the line conductor on the upper surface of the flat plate portion, the upper surface of the metal base functions as a coplanar ground conductor layer arranged at equal intervals on both sides of the line conductor, Since the coplanar structure can be formed with the metal base, the width of the flat plate portion of the input / output terminal can be reduced. Therefore, resonance near the frequency of the high-frequency signal due to the width of the flat plate portion of the input / output terminal can be suppressed, and the transmission characteristics of the high-frequency signal transmitted through the line conductor can be improved. That is, the resonance frequency can be pushed up to a high frequency band that does not affect the high frequency signal, the desired high frequency signal transmission characteristics can be secured, and the semiconductor element can be operated normally and stably over a long period of time.
[0053]
In the present invention, it is possible to reduce the influence of resonance at high frequencies by preferably setting the width of the input / output terminals to 0.6 to 2 mm, and to obtain good transmission characteristics.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a main part of a semiconductor package of the present invention.
FIG. 2 is a perspective view showing an example of an embodiment of input / output terminals constituting a semiconductor package of the present invention.
FIG. 3 is a perspective view showing another example of the embodiment of the input / output terminals constituting the semiconductor package of the present invention.
FIG. 4 is a perspective view of an essential part showing another example of the embodiment of the semiconductor package of the present invention.
FIG. 5 is a perspective view showing another example of the embodiment of the input / output terminals constituting the semiconductor package of the present invention.
FIG. 6 is a cross-sectional view showing a conventional semiconductor package.
FIG. 7 is a perspective view showing input / output terminals of a conventional semiconductor package.
FIG. 8 is a perspective view showing an input / output terminal having a plurality of signal lines of a conventional semiconductor package.
[Explanation of symbols]
1: Base 2: Metal frame 3: Input / output terminal 4: Metal base 4a: Groove 5: Optical semiconductor package 6: Flat plate portion 7: Line conductor 8: Standing wall portion 9: Mounting portion

Claims (2)

上側主面に半導体素子が載置される載置部を有する基体と、前記上側主面に前記載置部を囲繞するように取着されると共に側部に切欠部または貫通孔から成る入出力端子の取付部が形成された金属枠体と、前記取付部に嵌着されて前記半導体素子と外部電気回路とを電気的に接続する複数の前記入出力端子とを具備した半導体素子収納用パッケージにおいて、前記複数の入出力端子は、略四角形の誘電体板から成り、上面に1辺から対向する他辺にかけて形成された線路導体を有する平板部と、該平板部の上面に前記線路導体を間に挟んで接合された誘電体から成る立壁部とからそれぞれ構成されており、前記平板部の前記線路導体に平行な両側面および下面が嵌入される溝が前記線路導体の伝送方向に略平行にして上面に複数形成された金属基台上に前記各入出力端子がそれぞれ嵌入載置されて、前記金属基台と共に前記取付部に嵌着されていることを特徴とする半導体素子収納用パッケージ。A base body having a mounting portion on which a semiconductor element is mounted on the upper main surface, and an input / output composed of a cutout portion or a through-hole in the side portion, which is attached to the upper main surface so as to surround the mounting portion. A package for housing a semiconductor element, comprising: a metal frame in which a terminal mounting portion is formed; and a plurality of the input / output terminals that are fitted to the mounting portion to electrically connect the semiconductor element and an external electric circuit. The plurality of input / output terminals are formed of a substantially rectangular dielectric plate, and a flat plate portion having a line conductor formed on one surface from one side to the opposite side, and the line conductor on the upper surface of the flat plate portion. And a groove in which both side surfaces and the lower surface parallel to the line conductor of the flat plate portion are fitted are substantially parallel to the transmission direction of the line conductor. A plurality of gold formed on the top surface And wherein each input and output terminals on the base is fitted placed respectively, the semiconductor device package for housing, characterized in that it is fitted to the mounting portion together with the metal base. 前記入出力端子の幅が0.6〜2mmであることを特徴とする請求項1記載の半導体素子収納用パッケージ。2. The package for housing a semiconductor device according to claim 1, wherein the input / output terminal has a width of 0.6 to 2 mm.
JP2001019613A 2001-01-29 2001-01-29 Package for storing semiconductor elements Expired - Fee Related JP3638528B2 (en)

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