JP3623639B2 - Manufacturing method of multilayer wiring board - Google Patents

Description

【００５３】
【表２】

【００５４】
表１から明らかなように、バイアホール導体と導体配線層との接続部において、導体配線層の線幅Ｌ_１ がバイアホール導体のホール径より大きい試料Ｎｏ．１では、密着強度が２ｋｇ／ｍｍ^２ 、接続抵抗が１３０×１０^−６Ω−ｃｍ程度であり、また、導体配線層を全く埋設しなかった試料Ｎｏ．１２では、接続抵抗が２６０×１０^−６Ω−ｃｍ、密着強度が０．７ｋｇ／ｍｍ^２ であるのに対して、導体配線層の線幅Ｌ_１ がバイアホール導体のホール径と同一またはそれより小さくするとともに、導体配線層をバイアホール導体表面に埋設した構造とした試料Ｎｏ．２〜６の本発明品では、いずれも密着強度が２ｋｇ／ｍｍ^２ 以上、接続抵抗が１００×１０^−６Ω−ｃｍ以下の優れた接続性と密着性を示した。また、配線回路層の断面の形成角θが４５°〜８０°の場合には、さらに密着強度が２．２ｋｇ／ｍｍ^２ 以上まで改善された。
【００５５】
また、表２に示すように、導体配線層とバイアホール導体間にパルス電流を印加した試料Ｎｏ．１４〜２５では、さらに密着強度を３．０ｋｇ／ｍｍ^２ 以上、接続抵抗が１×１０^−５Ω−ｃｍ以下まで改善することができた。
【００５６】
【発明の効果】
以上詳述した通り、本発明の多層配線基板の製造方法によれば、導体配線層とバイアホール導体との接続部において、導体配線層の線幅をバイアホール導体のホール径よりも小さくし、且つバイアホール導体表面に埋設し、さらには導体配線層とバイアホール導体中の金属粉末との接触部にネック部を形成することにより、導体配線層のバイアホール導体との密着性を高めるとともに、両者の接触抵抗を低減することができる結果、高信頼性の多層配線基板を提供できる。
【図面の簡単な説明】
【図１】本発明の多層配線基板の概略断面図である。
【図２】本発明の多層配線基板における導体配線層とバイアホール導体との接続部の構造を説明するための要部拡大断面図である。
【図３】本発明の多層配線基板における導体配線層とバイアホール導体との接続部における導体配線層と金属粉末との接触状態を説明するための要部拡大断面図である。
【図４】本発明の多層配線基板の製造方法を説明するための工程図である。
【符号の説明】
１ 多層配線基板
２ 絶縁層
３ 導体配線層
４ バイアホール導体
５ 金属粉末
６ ネック部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a high-density multilayer wiring board on which fine wiring is formed, which is suitable for, for example, a semiconductor element storage package, and is particularly excellent in connection reliability between a low-resistance conductor wiring and a via-hole conductor. The present invention relates to a method for manufacturing a multilayer wiring board.
[0002]
[Prior art]
Conventionally, a multilayer ceramic wiring board capable of relatively high-density wiring has been widely used as a wiring board, for example, a wiring board used for a package containing a semiconductor element. This multilayer ceramic wiring board is composed of an insulating substrate such as alumina and a wiring conductor made of a refractory metal such as W or Mo formed on its surface, and a recess is formed in a part of this insulating substrate. The semiconductor element is housed in the recess, and the recess is hermetically sealed by the lid.
[0003]
However, since the ceramics constituting such a multilayer ceramic wiring board are hard and brittle, ceramics are likely to be chipped or cracked in the manufacturing process or the conveying process, and the hermetic sealing performance of the semiconductor element is improved. There was a problem such as a low yield because it might be damaged.
[0004]
In addition, a multilayer ceramic wiring board is manufactured by printing metallized ink on a green sheet before sintering, and laminating and sintering the printed sheets. Due to firing shrinkage, there is a problem that the resulting substrate is likely to be deformed such as warping and variation in dimensions, etc., and the demand for flatness of the substrate such as ultra high density circuit board and flip chip etc. However, there was a problem that it was not able to respond sufficiently.
[0005]
In addition, wiring boards used for multilayer wiring boards, semiconductor element storage packages, etc. will become more and more dense in the future as the performance of various electronic devices increases, and the wiring width and wiring pitch will be reduced to 50 μm or less. Therefore, it is necessary to use a via-hole conductor as an interstitial via hole (IVH), and the mounting method of the IC chip is changed from the wire bonding to the flip chip. Therefore, it is necessary to reduce the flatness of the substrate itself.
[0006]
As a wiring board other than a ceramic wiring board, a wiring board in which a conductive wiring layer made of a low resistance metal such as copper is formed on the surface of an insulating substrate containing an organic resin is known. This resin wiring board does not have the defects such as chipping and cracking unlike the ceramic wiring board, and has the advantage that heat treatment at a high temperature such as firing is not required for multilayering.
[0007]
However, a resin wiring board is generally manufactured by forming a conductive wiring layer by attaching a metal foil such as a copper foil on an insulating substrate and then removing unnecessary portions of the metal foil by an etching method. Therefore, there are various problems. For example, the characteristics of the insulating substrate are changed by a chemical solution such as etching, or the conductive wiring layer formed of metal foil is only placed on the surface of the insulating substrate. There is a problem in that, for example, when the IVH is formed, it is necessary to perform sequential lamination, and batch lamination cannot be performed. Further, since the convex portions are formed on the insulating substrate by the conductor wiring layer, the flatness is low, and the flatness required for flip chip mounting is not satisfied. In order to solve these problems, a method of transferring a conductor wiring layer to a prepreg using a transfer sheet has been proposed in Japanese Patent Laid-Open No. 9-64514. Recently, a method of filling a via hole with a conductive paste containing metal powder to form IVH has also been proposed.
[0008]
[Problems to be solved by the invention]
When a IVH is formed in a multilayer wiring board made of a resin insulating substrate, the connectivity between the IVH and the conductor wiring layer is a big problem. Therefore, as a method for increasing the adhesion between the conductor wiring layer and the via-hole conductor, needle-like crystals are grown on the surface of the conductor wiring layer by roughening the lower surface of the conductor wiring layer, etc., and then roughened. , A method of adding a thermosetting resin to the conductor paste filled in the via hole, and a method of forming a land portion larger than the hole diameter of the via hole conductor at the contact portion between the conductor wiring layer and the via hole conductor Etc. have been proposed.
[0009]
However, the method of roughening the surface of the conductor wiring layer to improve the adhesion of the insulating layer is that an oxide film is formed on the surface of the conductor wiring layer to oxidize the conductor wiring layer itself, and the contact resistance with the via-hole conductor is reduced. There is a problem that it tends to increase.
[0010]
Also, in the method of forming a via-hole conductor by filling a conductor paste containing a thermosetting resin, a thermosetting resin is interposed between the conductor wiring layer and the via-hole conductor, and the contact resistance tends to increase similarly. It is in.
[0011]
Furthermore, in the method of forming a land portion larger than the via-hole conductor diameter, the land portion hinders the high density of the conductor wiring layer, and is not suitable for high density wiring.
[0012]
Accordingly, an object of the present invention is to provide a multilayer wiring board capable of high-density wiring, which has high adhesion strength between the conductor wiring layer and the via-hole conductor and low contact resistance, and a simple manufacturing method thereof. Is.
[0013]
[Means for Solving the Problems]
As a result of intensive studies on the above-described problems, the present inventors made the line width of the conductor wiring layer smaller than the hole diameter of the via-hole conductor at the connection portion between the via-hole conductor and the conductor wiring layer. The line width on the side of the conductor wiring layer embedded in the via hole conductor is made smaller than the line width on the via hole conductor surface side. By burying the conductor wiring layer in the via-hole conductor, the via-hole conductor can firmly hold the conductor wiring layer, reduce the contact resistance, and reduce resistance and high reliability without forming a land as in the past. It has been found that a high-density multilayer wiring board can be obtained. Further, in the above structure, the contact resistance between the conductor wiring layer and the metal powder in the via hole conductor is formed to further reduce the contact resistance and improve the adhesion strength of the wiring. It has been found that it is possible to achieve the present invention.
[0014]
That is, the multilayer wiring board of the present invention includes a via hole conductor in which a metal powder is filled in an insulating substrate formed by laminating a plurality of insulating layers containing at least an organic resin, and a conductor connected to the via hole conductor. A wiring layer is formed, and at the connection portion between the conductor wiring layer and the via-hole conductor, The line width on the side embedded in the via hole conductor of the conductor wiring layer is smaller than the line width on the via hole conductor surface side, and The conductor wiring layer is embedded in the via hole conductor with a line width equal to or smaller than the hole diameter of the via hole conductor. Further, the conductor wiring layer is made of a metal foil, and a neck portion is formed at a contact portion between the conductor wiring layer and the metal powder in the via-hole conductor in the connection portion.
[0015]
Also, the method for manufacturing a multilayer wiring board according to the present invention includes forming a via hole in a soft insulating layer containing at least a thermosetting resin and filling a conductor paste containing a metal powder in the via hole. And the line width of the portion connected to the via hole conductor is the same as or smaller than the hole diameter of the via hole conductor on the surface of the transfer sheet. And the conductor wiring layer on the surface of the transfer sheet is made of metal foil, and the conductor wiring layer on the surface of the transfer sheet has a line width on the upper surface side smaller than the line width on the transfer sheet side. A step of forming a conductor wiring layer; and at the same time as burying the conductor wiring layer on the surface of the insulating layer by press-contacting the transfer sheet to the insulating layer on which the via-hole conductor is formed, A step of embedding the conductor wiring layer in a surface of the via hole conductor at a connection portion with a hole conductor, and then peeling the transfer sheet to transfer the conductor wiring layer to the insulating layer. Furthermore, after forming the conductor wiring layer having such a structure by etching a metal foil, and transferring the conductor wiring layer from the transfer sheet to the insulating layer, the via-hole conductor and the conductor wiring layer Applying a pulse current to the contact wiring layer and welding the contact portion between the metal powder in the via-hole conductor. Current density is 1~2000A / cm of ² The pulse width is 0.01 to 1000 msec. It is characterized by being.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
A schematic diagram of the multilayer wiring board of the present invention is shown in FIG. A multilayer wiring board 1 of the present invention is a via hole for electrically connecting a plurality of insulating layers 2 containing an organic resin such as a thermosetting resin, a conductor wiring layer 3 and a conductor wiring layer 3 between different layers. A conductor 4 is provided.
[0017]
According to the present invention, the insulating layer 2 constituting the multilayer wiring board is made of a composite material containing at least one kind selected from an organic resin, an inorganic filler, an inorganic fiber, and an organic fiber, and the inorganic filler and the fiber are contained in the organic resin. Are uniformly dispersed at a ratio of 20 to 80% by volume in total. The organic resin constituting this composite material is made of resin such as PPE (polyphenylene ether resin), BT resin (bismaleidotriazine), epoxy resin, polyimide resin, fluororesin, phenol resin, polyamino bismaleimide, especially as raw material A thermosetting resin that is liquid at room temperature is desirable.
[0018]
On the other hand, as an inorganic filler, SiO ₂ , Al ₂ O ₃ , ZrO ₂ TiO ₂ , AlN, SiC, BaTiO ₃ , SrTiO ₃ , MgTiO ₃ , Zeolite, CaTiO ₃ Well-known materials such as aluminum borate can be used. Even if the shape is spherical or acicular, it can be used well. On the other hand, as the fiber, there are aramid fiber, cellulose fiber, glass fiber and the like, and either woven fabric or non-woven fabric may be used. In order to increase the strength of the multilayer wiring board to obtain a highly reliable substrate, it is desirable to include at least one insulating layer containing fibers.
[0019]
In the present invention, the conductor wiring layer 3 preferably includes at least one selected from copper, aluminum, gold, and silver. Further, a high-resistance metal such as Ni—Cr may be used according to the needs of the circuit. In particular, the conductor wiring layer 3 is preferably made of a metal foil made of the above metal.
[0020]
Furthermore, the via-hole conductor 4 is formed by filling at least one metal powder selected from copper, aluminum, gold, and silver, and may contain a bonding organic resin in addition to the metal powder.
[0021]
According to the present invention, as shown in the enlarged cross-sectional view of the main part of FIG. 2, the line width of the conductor wiring layer 3 in the connecting portion between the conductor wiring layer 3 and the via-hole conductor 4 is It is important that the hole diameter of the via hole conductor 4 is the same as or smaller than that of the via hole conductor 4 and that the conductor wiring layer 3 having a small line width is embedded in the surface of the via hole conductor 4.
[0022]
As described above, the conductor wiring layer 3 is reinforced by the via-hole conductor 4 by burying the conductor wiring layer 3 so that the line width of the conductor wiring layer 3 is equal to or smaller than the hole diameter of the via-hole conductor 4. It is possible to increase the adhesion strength between the conductor wiring layer 3 and the via-hole conductor 4 and simultaneously reduce the contact resistance. In particular, if the line width of the conductor wiring layer 3 is made smaller than the hole diameter, not only the bottom surface of the conductor wiring layer 3 but also both side surfaces come into contact with the metal powder of the via hole conductor, thereby further increasing the adhesion strength. At the same time, the connection resistance can be reduced.
[0023]
As described above, according to the present invention, since there is no conductor wiring layer having a large diameter unlike the conventional land portion, the wiring density can be increased. Therefore, if the line width of the conductor wiring layer at the connecting portion is larger than the hole diameter of the via-hole conductor, the conductor wiring layer and the via-hole conductor are only in planar contact, the contact resistance is likely to increase, and the adhesion strength is also reduced. Furthermore, it becomes an obstacle to forming a high-density wiring layer.
[0024]
Line width L of the upper surface of this conductor wiring layer 3 ₁ Is the same as or smaller than the hole diameter M of the via-hole conductor 4, and in particular, M ≧ L ₁ ≧ 0.3M, or 0.98M ≧ L ₁ It is desirable that the relationship is ≧ 0.4M, and the line width L ₁ Is larger than M, that is, in the case of a conventional land portion, the connection resistance with the via-hole conductor is high, and the adhesion of the wiring layer 3 to the via-hole conductor is also insufficient. L ₁ If it is narrower than 0.3M, the absolute contact area becomes narrow, and the connection resistance tends to increase or the adhesion strength tends to decrease.
[0025]
Further, according to the present invention, as shown in FIG. 2, the conductor wiring layer 3 has a cross-sectional shape of the conductor wiring layer 3 having a line width L of the lower surface on the side embedded in the via-hole conductor 4. ₂ Is the line width L on the top surface ₁ It is desirable that the inverted trapezoidal shape angle θ be 45 ° to 80 °, particularly 50 ° to 75 °. By adopting such an inverted trapezoidal shape, the process of embedding the conductor wiring layer 3 in the via-hole conductor 4 or the insulating layer 2 can be performed without generating a gap. As a result, the via-hole conductor 4 or the insulating layer of the conductor wiring layer 3 As a result of effectively increasing the contact area with 2, the adhesion of the conductor wiring layer 3 to the via-hole conductor 4 and the insulating layer 2 can be enhanced. Therefore, when the formation angle deviates from 45 ° to 80 °, the above-described improvement in adhesion is not exhibited. Preferably, the conductor wiring layer 3 has the inverted trapezoidal shape in cross section, and the line width L of the upper surface of the conductor wiring layer. ₁ Is most preferably the same as the hole diameter M of the via-hole conductor.
[0026]
The thickness D of the conductor wiring layer 3 is preferably 3 to 35 μm. If the thickness is thinner than 3 μm, the embedding amount when the via-hole conductor is embedded in the via-hole conductor is small, and the connection at the side surface of the wiring layer is reduced. The wiring layer is not suitable for making fine wiring, and in particular, a wiring layer having a line width of 50 μm or less cannot be formed.
[0027]
Furthermore, the surface roughness of the lower surface and the side surface of the conductor wiring layer 3 should be 200 nm or more, particularly 400 nm or more in order to improve the adhesion when the conductor wiring layer 3 is embedded in the via-hole conductor 4 or the insulating layer 2. Is desirable.
[0028]
Furthermore, according to the present invention, the conductor wiring layer 3 has a neck portion 6 formed at the contact portion with the metal powder 5 in the via-hole conductor 4 as shown in the enlarged cross-sectional view of the main part of FIG. It is desirable. By forming such a neck portion, the contact resistance can be lowered together with the strong connection between the conductor wiring layer 3 and the via-hole conductor 4. In particular, the average width of the neck part is desirably 1/5 or more of the average particle diameter of the metal powder.
[0029]
The multilayer wiring board of the present invention is manufactured as follows as shown in the process diagram of FIG.
[0030]
First, in order to form an insulating layer, an insulating composition obtained by appropriately blending a liquid organic resin with an inorganic or organic filler or the like is sufficiently mixed and insulated by means such as a kneader (kneader) or three rolls. A functional slurry is prepared. A sufficiently mixed insulating slurry is formed into a sheet by a rolling method, an extrusion method, an injection method, or a doctor blade method, and then the organic resin in the sheet is semi-cured to produce the insulating layer 11 in FIG. To do.
[0031]
The insulating slurry is preferably added to the insulating composition as described above constituting the insulating layer by adding a solvent such as toluene, butyl acetate, methyl ethyl ketone, methanol, methyl cellosolve acetate, isopropyl alcohol, or the like. It consists of a fluid with viscosity. From this point of view, the viscosity of the slurry is suitably from 100 to 3000 poise, although it depends on the forming method. In the semi-curing treatment, when the organic resin used is a thermoplastic resin, the mixture mixed under heating is cooled. In the case of a thermosetting resin, the temperature is slightly higher than a temperature sufficient for complete solidification. What is necessary is just to heat to low temperature. When a woven fabric or a non-woven fabric is used, a varnish-like resin is impregnated into a fiber such as a woven fabric or a non-woven fabric and dried to produce a semi-cured prepreg insulating layer.
[0032]
Next, a via hole 12 is formed on the insulating layer 11 produced as described above by a punching method or laser processing, if desired, and filled with a conductive paste to form a via hole conductor 13 (FIG. 4B). )). The metal powder blended in the conductor paste is preferably made of at least one low resistance metal among copper, aluminium, silver, and gold, and an organic solvent and a binder can be added to obtain a paste. At this time, the average particle size of the metal powder to be used is preferably 3 to 10 μm. This is because when the average particle size of the metal powder is smaller than 3 μm or larger than 10 μm, the printability of the conductor paste and the filling property into the hole are liable to deteriorate, and the filling density of the metal powder in the hole This is because the resistance of the via-hole conductor is likely to increase due to the decrease in the resistance.
[0033]
Then, a conductor wiring layer is formed on the surface of the semi-cured insulating layer 11. For the formation of the conductor wiring layer, first, a metal foil 15 made of at least one kind selected from copper, gold, silver, aluminum or the like or an alloy of two or more kinds is bonded to the surface of the resin film 14 with an adhesive. A prepared one is prepared (FIG. 4 (c1)). The metal foil 15 is most preferably copper or an alloy containing copper.
[0034]
Next, a resist for the wiring pattern is provided on the surface of the metal foil 15 bonded to the resin film 14, and after removing the non-resist forming portion of the metal foil by an etching method, the resist is further removed to form the conductor wiring layer 16 (FIG. 4 (c2)).
[0035]
At this time, the width L on the adhesive surface side with the resin film 14 in the cross section of the conductor wiring layer 16 ₁ Is the upper surface L of the conductor wiring layer 17 ₂ It is desirable to form a trapezoidal shape in which the formation angle θ is 45 ° to 80 °. In such a trapezoidal shape, it is preferable that the etching rate is 2 to 50 μm / min after a resist layer of a wiring pattern is formed on the surface of the metal foil 15. In order to reduce the surface roughness of the conductor wiring layer 16 to 200 nm or less, the wiring layer is made of formic acid or NaClO. ₂ , NaOH, Na ₃ PO ₄ Surface treatment with a mixed solution or the like can be easily controlled at a roughening rate of 1 μm / min or more.
[0036]
Next, the conductor wiring layer 16 on the surface of the resin film 14 is transferred to the insulating layer 11 on which the via-hole conductor 13 is formed. As a method of transferring, as shown in FIG. 4D, the resin film 14 and the insulating layer 11 are aligned, the resin film 14 and the insulating layer 11 are laminated, and the pressure is 10 to 500 kg / cm. ² Apply a moderate pressure. At this time, since the insulating layer 11 is in a semi-cured soft state, the conductor wiring layer 16 can be embedded in the surfaces of the insulating layer 11 and the via-hole conductor 13 by the mechanical pressure. Then, the conductor wiring layer 16 can be transferred to the insulating layer 11 by peeling the resin film 14 together with the adhesive layer. In this manner, a single-layer wiring board 17 (FIG. 4E) in which the conductor wiring layer 16 is embedded in the surfaces of the insulating layer 11 and the via-hole conductor 13 can be formed.
[0037]
Then, a plurality of wiring boards manufactured in the same manner as described above can be stacked at a predetermined position, pressed or heated to be closely adhered and integrated, and a multilayer wiring board as shown in FIG. 1 can be manufactured.
[0038]
In addition, according to the present invention, after the single-layer wiring board 17 is manufactured or the multilayer wiring board having the structure shown in FIG. A pulse current is applied for a predetermined time.
[0039]
When this pulse current is applied, a plasma discharge is generated between the conductor wiring layer 16 and the metal powder, and between the metal powder, and the oxide film and deposits on the surface of the metal powder are removed, resulting in a so-called welded state, which is described in FIG. As a result, the metal powder, the conductor wiring layer, and the metal powder are in contact with each other without inclusions that obstruct the conductivity. As a result, the resistance of the via-hole conductor 13 is reduced. In addition, a reduction in contact resistance between the conductor wiring layer 16 and the via-hole conductor 13 and strong adhesion can be realized.
[0040]
This pulse current is applied by applying a plate electrode of 10 kg / cm from the upper and lower surfaces to the insulating layer on which the conductor wiring layer is formed. ² It is desirable to perform the pressing with the above pressure. Moreover, it can also carry out simultaneously with the said pressurization process. As the optimum condition of the pulse current to be applied, the current density is 1 to 2000 A / cm. ² The pulse width is 0.01 to 1000 msec. The current density is 1 A / cm. ² If it is lower, it is difficult to remove the oxide film or resin present at the interface between the metal powders without being welded, and 2000 A / cm. ² This is because heat generation may partially occur and the insulating substrate may be damaged. The pulse current interval between pulses is preferably 3 seconds or less, and the application time of the pulse current to the conductor wiring layer and via hole conductor is preferably 5 seconds to 5 minutes, and 10 seconds to 1 minute. The pulse current is preferably a square wave DC pulse. This is because the rectangular wave is more likely to discharge between particles than the sine wave, and the surface cleaning effect is high, and the direct current of the pulse current is less likely to adhere to the cleaned particle surface than the alternating current. Because.
[0041]
Furthermore, the resistance of the wiring layer can be further reduced by applying heat treatment to the conductor wiring layer after the application of the pulse current. The current treatment is performed at a current density of 1 to 4000 A / cm. ² The heating temperature by energization is suitably in the range of 100 to 350 ° C. If the temperature at this time is lower than 100 ° C., the effect of lowering the electric resistance is small, and if it exceeds 350 ° C., the resin constituting the insulating layer or the conductor wiring layer may be decomposed. By this energization heating, the contact between the metal powders generates heat, and the bonding force between the powders can be further increased.
[0042]
The energization heating can be performed simultaneously with the application of the pulse current described above. Specifically, when applying a waveform that combines a DC pulse current and a DC current, that is, a current in which the upper part of the DC current waveform is a rectangular wave, the action due to current heating and the discharge welding action due to the pulse current application are simultaneously performed. Can be applied.
[0043]
As described in detail above, at the connecting portion between the conductor wiring layer and the via hole conductor, the line width of the conductor wiring layer is smaller than the hole diameter of the via hole conductor, and the conductor wiring layer is embedded in the surface of the via hole conductor. Thus, the adhesion between the conductor wiring layer and the via-hole conductor can be increased and the contact resistance can be reduced. Furthermore, the contact portion between the conductor wiring layer and the metal powder in the via-hole conductor can be welded. Thus, a low-resistance and high-reliability high-density multilayer wiring board can be obtained without forming lands, and a low flatness board suitable for flip-chip mounting can be provided.
[0044]
【Example】
Spherical fused SiO with an average particle size of 5 μm for BT resin, PPE and polyimide for insulation layer formation ₂ 50% by volume of acicular aluminum borate whisker (acicular AlBO) having an aspect ratio of 5 is added in combination as shown in Tables 1 and 2, and butyl acetate, toluene, and methyl ethyl ketone are added as solvents to the cured organic resin. A catalyst for promoting the mixing was added and mixed for 1 hour by a stirrer in which a stirring blade revolves and rotates. Then, the slurry was formed into a sheet having a thickness of 200 μm by a doctor blade method. As another insulating layer, a glass cloth and an aramid nonwoven fabric were impregnated and dried with 50% by volume of BT resin and polyimide to prepare a prepreg having a thickness of 200 μm.
[0045]
These insulating layers are cut to 150 mm □ and CO ₂ Via holes having a diameter of 50 to 100 μm were formed by a laser. A copper paste mainly composed of copper-silver alloy powder was embedded in the via hole by screen printing.
[0046]
On the other hand, an adhesive was applied to the surface of a polyethylene terephthalate (PET) film to adhere an electrolytic copper foil having a thickness of 12 μm. Then, the surface of the copper foil was treated with a 10% formic acid solution to adjust the surface roughness to 450 nm.
[0047]
Thereafter, a photosensitive resist is applied to the surface of the copper foil, exposed and washed through a glass mask to form a wiring pattern, and then immersed in a ferric chloride solution to etch the non-resist portion at a rate of 35 μm. After removing by etching at a rate of 1 minute, the resist was peeled off. The produced conductor wiring layer is a fine pattern having a line width of 30 to 120 μm and a distance between wirings (wiring pitch) of 50 μm or less. When the cross-sectional shape of the produced conductor wiring layer was examined, it was found to have a trapezoidal shape with a formation angle θ of 60 °. In addition, a trapezoidal shape having a formation angle of 30 to 90 ° was produced by changing the etching rate. (Sample Nos. 7 to 11)
Then, the transfer sheet after the etching treatment and the insulating sheet are aligned and 30 kg / cm by a vacuum laminator. ² After pressurizing at a pressure of 30 seconds, the resin film was peeled off, and the conductor wiring layer was transferred to the insulating layer to produce a single-layer wiring board.
[0048]
Then, the six wiring boards produced as described above are aligned and stacked, and 30 kg / cm ² The laminate was pressure bonded at a pressure of. Furthermore, this laminate is set in a press machine and 30 kg / cm. ² At a pressure of 200 ° C., heat treatment was performed at 200 ° C. for 5 hours to completely cure the thermosetting resin, thereby producing a multilayer wiring board.
[0049]
In Table 2, after a single-layer wiring board was formed on the wiring board, a pulse current was applied for 30 seconds at the current density and pulse width shown in Table 1 between the conductor wiring layer and the via-hole conductor. The interval between pulses was the same as the pulse width. Furthermore, a part of the substrates was further subjected to current heating under the conditions shown in Table 1.
[0050]
For the obtained multilayer wiring board, the specific resistance between the conductor wiring layer-via-hole conductor-conductor wiring layer is measured, and a metal wire is attached to the conductor wiring layer made of metal foil with solder, and the metal wire is placed vertically. By pulling, the adhesion strength of the conductor wiring layer to the via-hole conductor was measured.
[0051]
Furthermore, by observing the cross section of the via-hole conductor forming portion, observing the contact state between the conductor wiring layer and the metal powder in the via-hole conductor, and for those having necks, the average particle diameter of the metal powder The ratio of the average neck width to was calculated.
[0052]
[Table 1]

[0053]
[Table 2]

[0054]
As is clear from Table 1, the line width L of the conductor wiring layer at the connection portion between the via-hole conductor and the conductor wiring layer. ₁ Is larger than the hole diameter of the via-hole conductor. 1, the adhesion strength is 2 kg / mm ² , The connection resistance is 130 × 10 ^-6 Sample No. which is about Ω-cm and in which no conductor wiring layer was embedded. 12, the connection resistance is 260 × 10 ^-6 Ω-cm, adhesion strength 0.7kg / mm ² In contrast, the line width L of the conductor wiring layer ₁ Is the same as or smaller than the hole diameter of the via-hole conductor, and the sample No. 1 has a structure in which the conductor wiring layer is embedded in the via-hole conductor surface. In the products of the present invention of 2 to 6, the adhesion strength is 2 kg / mm ² The connection resistance is 100 × 10 ^-6 Excellent connectivity and adhesion of Ω-cm or less were exhibited. Further, when the formation angle θ of the cross section of the wiring circuit layer is 45 ° to 80 °, the adhesion strength is further 2.2 kg / mm. ² It was improved to the above.
[0055]
Further, as shown in Table 2, the sample No. 1 in which a pulse current was applied between the conductor wiring layer and the via hole conductor was used. 14 to 25, the adhesion strength is further 3.0 kg / mm ² The connection resistance is 1 × 10 ^-5 It was possible to improve to Ω-cm or less.
[0056]
【The invention's effect】
As detailed above, the multilayer wiring board of the present invention Manufacturing method According to the present invention, in the connection portion between the conductor wiring layer and the via hole conductor, the line width of the conductor wiring layer is made smaller than the hole diameter of the via hole conductor and embedded in the via hole conductor surface, By forming the neck at the contact portion with the metal powder in the via-hole conductor, the adhesion of the conductor wiring layer to the via-hole conductor can be improved and the contact resistance between the two can be reduced, resulting in high reliability. A multilayer wiring board can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a multilayer wiring board according to the present invention.
FIG. 2 is an enlarged cross-sectional view of a main part for explaining the structure of a connection portion between a conductor wiring layer and a via-hole conductor in the multilayer wiring board of the present invention.
FIG. 3 is an enlarged cross-sectional view of a main part for explaining a contact state between a conductor wiring layer and a metal powder at a connection portion between a conductor wiring layer and a via-hole conductor in the multilayer wiring board of the present invention.
FIG. 4 is a process diagram for explaining a method for manufacturing a multilayer wiring board according to the present invention.
[Explanation of symbols]
1 Multilayer wiring board
2 Insulating layer
3 Conductor wiring layer
4 Via-hole conductor
5 Metal powder
6 Neck

Claims (5)

Forming a via hole in a soft insulating layer containing at least a thermosetting resin, filling a conductor paste containing a metal powder therein to form a via hole conductor; and a surface of the transfer sheet, Conductor wiring in which the line width of the portion connected to the via-hole conductor is the same as or smaller than the hole diameter of the via-hole conductor, and the line width on the upper surface side is smaller than the line width on the transfer sheet side A step of forming a layer, and the transfer sheet is pressed against the insulating layer on which the via-hole conductor is formed, and the conductor wiring layer is embedded in the surface of the insulating layer, and at the same time, a via-hole conductor of the conductor wiring layer A step of embedding the conductor wiring layer in the via hole conductor surface at a connecting portion, and peeling off the transfer sheet to transfer the conductor wiring layer to the insulating layer. Method for manufacturing a multilayer wiring board, characterized by. Method for manufacturing a multilayer wiring board according to claim 1, wherein the conductor interconnect layer of the surface of said transfer sheet comprises a metal foil. Method for manufacturing a multilayer wiring board according to claim 1, wherein the conductive wiring layer is obtained by etching of the metal foil. After transferring the conductor wiring layer from the transfer sheet to the insulating layer, a pulse current is applied between the via hole conductor and the conductor wiring layer to contact the conductor wiring layer and the metal powder in the via hole conductor. The method for manufacturing a multilayer wiring board according to claim 1, further comprising a step of welding the portions. The applied pulse current has a current density of 1 to 2000 A / cm ² and a pulse width of 0.01 to 1000 msec. The method for producing a multilayer wiring board according to claim 4, wherein:

Images