JP3518122B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JP3518122B2
JP3518122B2 JP00378196A JP378196A JP3518122B2 JP 3518122 B2 JP3518122 B2 JP 3518122B2 JP 00378196 A JP00378196 A JP 00378196A JP 378196 A JP378196 A JP 378196A JP 3518122 B2 JP3518122 B2 JP 3518122B2
Authority
JP
Japan
Prior art keywords
heat treatment
treatment step
impurities
gate electrode
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP00378196A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09190983A (ja
Inventor
雅則 塚本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP00378196A priority Critical patent/JP3518122B2/ja
Priority to US08/777,814 priority patent/US6124187A/en
Priority to EP97400048A priority patent/EP0784339A2/en
Publication of JPH09190983A publication Critical patent/JPH09190983A/ja
Application granted granted Critical
Publication of JP3518122B2 publication Critical patent/JP3518122B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H10D64/01346—
    • H10D64/01312—
    • H10D64/01338—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP00378196A 1996-01-12 1996-01-12 半導体装置の製造方法 Expired - Lifetime JP3518122B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP00378196A JP3518122B2 (ja) 1996-01-12 1996-01-12 半導体装置の製造方法
US08/777,814 US6124187A (en) 1996-01-12 1996-12-31 Method of fabricating semiconductor device
EP97400048A EP0784339A2 (en) 1996-01-12 1997-01-10 Method of fabricating a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP00378196A JP3518122B2 (ja) 1996-01-12 1996-01-12 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH09190983A JPH09190983A (ja) 1997-07-22
JP3518122B2 true JP3518122B2 (ja) 2004-04-12

Family

ID=11566741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP00378196A Expired - Lifetime JP3518122B2 (ja) 1996-01-12 1996-01-12 半導体装置の製造方法

Country Status (3)

Country Link
US (1) US6124187A (cg-RX-API-DMAC10.html)
EP (1) EP0784339A2 (cg-RX-API-DMAC10.html)
JP (1) JP3518122B2 (cg-RX-API-DMAC10.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001127174A (ja) * 1999-10-25 2001-05-11 Mitsubishi Electric Corp 半導体装置
KR100522758B1 (ko) 2000-06-28 2005-10-21 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US6808974B2 (en) 2001-05-15 2004-10-26 International Business Machines Corporation CMOS structure with maximized polysilicon gate activation and a method for selectively maximizing doping activation in gate, extension, and source/drain regions
JP3699946B2 (ja) 2002-07-25 2005-09-28 株式会社東芝 半導体装置の製造方法
US6991972B2 (en) 2002-10-22 2006-01-31 Amberwave Systems Corporation Gate material for semiconductor device fabrication
JP4733912B2 (ja) 2003-04-03 2011-07-27 株式会社東芝 半導体装置の製造方法
JP4342429B2 (ja) * 2004-02-09 2009-10-14 株式会社東芝 半導体装置の製造方法
JP4031000B2 (ja) 2005-01-13 2008-01-09 エルピーダメモリ株式会社 半導体装置の製造方法
US7749875B2 (en) * 2007-02-16 2010-07-06 Infineon Technologies Ag Method of manufacturing a semiconductor element and semiconductor element

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4555842A (en) * 1984-03-19 1985-12-03 At&T Bell Laboratories Method of fabricating VLSI CMOS devices having complementary threshold voltages
US4544418A (en) * 1984-04-16 1985-10-01 Gibbons James F Process for high temperature surface reactions in semiconductor material
US4585492A (en) * 1984-07-30 1986-04-29 International Business Machines Corporation Rapid thermal annealing of silicon dioxide for reduced hole trapping
US4749441A (en) * 1986-12-11 1988-06-07 General Motors Corporation Semiconductor mushroom structure fabrication
US5139961A (en) * 1990-04-02 1992-08-18 National Semiconductor Corporation Reducing base resistance of a bjt by forming a self aligned silicide in the single crystal region of the extrinsic base
US5219784A (en) * 1990-04-02 1993-06-15 National Semiconductor Corporation Spacer formation in a bicmos device
DE4035842A1 (de) * 1990-11-10 1992-05-14 Telefunken Electronic Gmbh Verfahren zur rekristallisierung voramorphisierter halbleiteroberflaechenzonen
US5306657A (en) * 1993-03-22 1994-04-26 United Microelectronics Corporation Process for forming an FET read only memory device
US5384285A (en) * 1993-07-26 1995-01-24 Motorola, Inc. Process for fabricating a silicide layer in a semiconductor device
US5489540A (en) * 1995-03-22 1996-02-06 Advanced Micro Devices Inc. Method of making simplified LDD and source/drain formation in advanced CMOS integrated circuits using implantation through well mask
US5691212A (en) * 1996-09-27 1997-11-25 Taiwan Semiconductor Manufacturing Company, Ltd. MOS device structure and integration method

Also Published As

Publication number Publication date
EP0784339A3 (cg-RX-API-DMAC10.html) 1997-08-20
US6124187A (en) 2000-09-26
JPH09190983A (ja) 1997-07-22
EP0784339A2 (en) 1997-07-16

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