JP3462032B2 - Power converter - Google Patents
Power converterInfo
- Publication number
- JP3462032B2 JP3462032B2 JP04867997A JP4867997A JP3462032B2 JP 3462032 B2 JP3462032 B2 JP 3462032B2 JP 04867997 A JP04867997 A JP 04867997A JP 4867997 A JP4867997 A JP 4867997A JP 3462032 B2 JP3462032 B2 JP 3462032B2
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- JP
- Japan
- Prior art keywords
- voltage
- terminals
- main circuit
- command voltage
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Power Conversion In General (AREA)
- Inverter Devices (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は電圧駆動形の高速ス
イッチングデバイスを用いた電力変換装置に係り、特
に、該高速スイッチングデバイスのスイッチング特性を
充分に活用できるように改善した電力変換装置に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter using a voltage-driven high-speed switching device, and more particularly to a power converter improved so that the switching characteristics of the high-speed switching device can be fully utilized.
【０００２】[0002]
【従来の技術】スイッチングデバイスを用いた電力変換
装置として種々の回路方式が用いられているが、図１０
に交流電動機等を駆動するＰＷＭ制御インバータ装置と
して一般的に用いられている電力変換装置を示す。2. Description of the Related Art Various circuit systems are used as a power converter using a switching device.
Shows a power conversion device generally used as a PWM control inverter device for driving an AC motor or the like.
【０００３】この電力変換装置は、交流電源端子１１よ
り供給される交流電力を整流器１２で直流電力に変換
し、直流フィルタコンデンサ１３で平滑化して、スイッ
チングデバイス１５を用いたインバータ１４をＰＷＭ制
御によりスイッチング動作させ、平滑化された直流電力
をパルス幅変調して交流電力に変換し、交流電動機等の
負荷１６に交流電力を供給するＰＷＭ制御インバータ装
置として機能する。In this power converter, AC power supplied from an AC power supply terminal 11 is converted into DC power by a rectifier 12, smoothed by a DC filter capacitor 13, and an inverter 14 using a switching device 15 is PWM-controlled. It functions as a PWM control inverter device that performs a switching operation and pulse-width modulates the smoothed DC power to convert it into AC power and supplies the AC power to a load 16 such as an AC motor.
【０００４】スイッチングデバイス１５として、サイリ
スタやＧＴＯなどが一般的に用いられているが、これら
のスイッチングデバイスのスイッチング時間は数マイク
ロ秒で、電流変化率も比較的に小さく、発生するサージ
電圧も比較的に小さい。As the switching device 15, a thyristor, a GTO, etc. are generally used. The switching time of these switching devices is several microseconds, the current change rate is relatively small, and the surge voltage generated is also compared. Small.
【０００５】近年、これらのサイリスタやＧＴＯより短
いスイッチング時間で高速動作するＩＧＢＴやＭＯＳ−
ＦＥＴ、更にはＩＥＧＴなどの、電圧駆動形の高速スイ
ッチングデバイスが上述スイッチングデバイス１５とし
て用いられ、各方面に適用されるようになってきてい
る。In recent years, IGBTs and MOS-'s operating at high speed with a switching time shorter than those of these thyristors and GTOs.
A voltage-driven high-speed switching device such as an FET and an IEGT has been used as the switching device 15 and has been applied to various fields.
【０００６】これらの高速スイッチングデバイスは、Ｇ
ＴＯと比較して、一桁以上短いスイッチング時間で高速
にスイッチング動作を行い、主回路の電流変化率も非常
に大きくなり、主回路のインダクタンスを大幅に低減し
なければ、サージ電圧も非常に大きくなる。このように
サージ電圧が増大すると、高速スイッチングデバイス自
身に定格を越える電圧が印加されて、過電圧で破壊する
危険があり、更に、大きなノイズ源として周辺機器に対
して悪影響を与える場合がある。These high speed switching devices are
Compared to TO, switching operation is performed at high speed with a switching time shorter than one digit, the current change rate of the main circuit becomes very large, and the surge voltage becomes very large unless the inductance of the main circuit is significantly reduced. Become. When the surge voltage increases in this way, a voltage exceeding the rating is applied to the high-speed switching device itself, there is a risk of destruction due to overvoltage, and further, it may adversely affect peripheral equipment as a large noise source.
【０００７】図１１は高速スイッチングデバイスの一例
として、ＩＧＢＴモジュール１５を示したもので、以下
ＩＧＢＴモジュール１５を高速スイッチングデバイスと
同義語として用いる。FIG. 11 shows an IGBT module 15 as an example of a high speed switching device, and hereinafter the IGBT module 15 is used as a synonym for a high speed switching device.
【０００８】このＩＧＢＴモジュール１５は、ＩＧＢＴ
１７とダイオード１８が逆並列に接続されて構成され、
コレクタ端子Ｃ、エミッタ端子Ｅ、ゲート端子Ｇ、制御
用エミッタ端子Ｅ１を備え、ゲート抵抗２１を介して端
子Ｇ−Ｅ１間に与えられるゲート電圧Ｖg に基づいてＩ
ＧＢＴ１７がオン・オフし、ＩＧＢＴモジュール１５の
Ｃ−Ｅ端子間がオン（導通）状態或いはオフ（非導通）
状態となるスイッチング動作が行われる。なお、１９は
ＩＧＢＴモジュール１５のゲート容量、２０、２０ａは
ＩＧＢＴモジュール内部の配線に生じる浮遊インダクタ
ンスを示している。The IGBT module 15 is an IGBT
17 and the diode 18 are connected in antiparallel,
A collector terminal C, an emitter terminal E, a gate terminal G, and a control emitter terminal E1 are provided, and I based on a gate voltage Vg applied between the terminals G and E1 via a gate resistor 21.
The GBT 17 is turned on / off, and the C-E terminals of the IGBT module 15 are turned on (conduction) or turned off (non-conduction).
The switching operation that brings the state is performed. The numeral 19 indicates the gate capacitance of the IGBT module 15, and the numerals 20 and 20a indicate the stray inductance generated in the wiring inside the IGBT module.
【０００９】このようなＩＧＢＴモジュール１５の場
合、端子Ｇ−Ｅ１間の内部抵抗は無限大に近くゲート容
量１９で内部インピーダンスが決定され、ゲート抵抗２
１を介してゲート電圧Ｖg を与える場合、ゲート容量１
９に流れる充放電電流によってゲート電圧Ｖg の変化率
ｄＶg ／ｄｔが影響を受ける。In the case of such an IGBT module 15, the internal resistance between the terminals G and E1 is close to infinity, and the internal impedance is determined by the gate capacitance 19.
When the gate voltage Vg is given via 1, the gate capacitance 1
The rate of change dVg / dt of the gate voltage Vg is affected by the charging / discharging current flowing in 9.
【００１０】図１２は正極性のゲート電圧Ｖg0が与えら
れ、オフ状態からオン状態へスイッチング動作するとき
の、ゲート電流ｉg 、コレクタ電流Ｉc と、図１０のよ
うにＩＧＢＴモジュール１５が直列接続されたときの相
手側のＩＧＢＴモジュール１５の端子Ｃ−Ｅ間に生じる
電圧Ｖd の波形例を示したものである。In FIG. 12, a gate voltage Vg0 having a positive polarity is applied, and a gate current ig and a collector current Ic at the time of switching operation from an off state to an on state, and an IGBT module 15 are connected in series as shown in FIG. 7 shows an example of the waveform of the voltage Vd generated between the terminals CE of the IGBT module 15 on the other side at this time.
【００１１】図１３は上述とは逆に負極性のゲート電圧
Ｖg0が与えられ、オン状態からオフ状態へスイッチング
動作するときの、ゲート電流ｉg 、コレクタ電流Ｉc 、
コレクタ電圧ＶCEの波形例を示したものである。Contrary to the above, FIG. 13 shows that the gate current ig, the collector current Ic, and the collector current Ic when the negative polarity gate voltage Vg0 is applied and the switching operation is performed from the on state to the off state.
It is an example of a waveform of the collector voltage VCE.
【００１２】これらの波形図から解るように、ゲート抵
抗２１の入力側に正極性或いは負極性のゲート電圧が与
えられ、ゲート容量１９の充放電による正極性或いは負
極性のゲート電流ｉg が流れた時点から所定の遅れ時間
ｔd （ターンオンディレイタイムｔd(on) 或いはターン
オフディレイタイムｔd(off)）が経過してから実際のス
イッチング動作が開始される。As can be seen from these waveform diagrams, a positive or negative polarity gate voltage is applied to the input side of the gate resistance 21, and a positive or negative polarity gate current ig flows due to charging and discharging of the gate capacitance 19. The actual switching operation is started after a predetermined delay time td (turn-on delay time td (on) or turn-off delay time td (off)) has elapsed from the time point.
【００１３】なお、端子Ｇ−Ｅ１間の内部インピーダン
スが比較的に大きいのでゲート電圧Ｖg を正確に測定す
ることが難しくゲート電流ｉg で示している。このよう
な高速スイッチングデバイス１５は、ゲート抵抗２１の
値を大きくしてゲート容量１９に流れるゲート電流ｉg
を減少させると遅れ時間ｔd が長くなり主回路の電流変
化率ｄＩc ／ｄｔが小さくなり、逆にゲート抵抗２１の
値を小さくしてゲート電流ｉg を増加させると遅れ時間
ｔd が短くなり主回路の電流変化率ｄＩc ／ｄｔが大き
くなることが知られており、電流変化率ｄＩc ／ｄｔが
適度な値になるようにゲート抵抗２１の値を選定し、ス
イッチング動作によるサージ電圧がＩＧＢＴ１７の許容
電圧（ＳＷＳＯＡ：スイッチング安全動作領域）を越え
ないように設定している。Since the internal impedance between the terminals G and E1 is relatively large, it is difficult to accurately measure the gate voltage Vg, which is indicated by the gate current ig. In such a high-speed switching device 15, the value of the gate resistance 21 is increased to increase the gate current ig flowing through the gate capacitance 19.
Is decreased, the delay time td is increased and the current change rate dIc / dt of the main circuit is decreased. Conversely, when the value of the gate resistor 21 is decreased and the gate current ig is increased, the delay time td is decreased. It is known that the current change rate dIc / dt becomes large. The value of the gate resistance 21 is selected so that the current change rate dIc / dt becomes an appropriate value, and the surge voltage due to the switching operation is the allowable voltage of the IGBT17 ( (SWSOA: Switching safe operation area) is set so as not to exceed.
【００１４】ＩＧＢＴモジュール１５の外部回路に存在
する配線のインダクタンスによるサージ電圧はスナバ回
路によって抑制されるが、モジュール内部に存在する配
線インダクタンス２０、２０ａによって生じるサージ電
圧を抑制することも重要である。Although the surge voltage due to the inductance of the wiring existing in the external circuit of the IGBT module 15 is suppressed by the snubber circuit, it is also important to suppress the surge voltage caused by the wiring inductances 20 and 20a existing inside the module.
【００１５】[0015]
【発明が解決しようとする課題】現状のＩＧＢＴなどの
高速スイッチングデバイスを用いてＰＷＭ制御を行う場
合、装置定格電流の通電による導通損失Ｐc とスイッチ
ング動作時に生じるスイッチング損失Ｐs がほぼ等しく
なるように変調（スイッチング）周波数が選定されてお
り、品質の良い正弦波の交流電力を得るために変調周波
数を増加させるとスイッチング損失Ｐs が増加し、サー
ジ電圧も増大するという問題がある。When PWM control is performed using a current high-speed switching device such as an IGBT, modulation is performed so that the conduction loss Pc due to energization of the rated current of the device and the switching loss Ps generated during the switching operation are substantially equal to each other. The (switching) frequency is selected, and if the modulation frequency is increased in order to obtain high-quality sinusoidal AC power, the switching loss Ps increases and the surge voltage also increases.
【００１６】また、高速スイッチングデバイスの外部回
路の配線インダクタンスによるサージ電圧をスナバ回路
によって吸収させるにしても、主回路の電流変化率が大
きいとスナバ回路の容量も大きくなり装置外形が大きく
なり、電力損失も大きくなるなどの影響があり、必ずし
も高速スイッチングデバイスのスイッチング特性を充分
に活かした制御が行われていない。更に速いスイッチン
グ速度の高速スイッチングデバイスが開発される方向に
あるが、そのスイッチング特性を充分に活かした高速ス
イッチングデバイス応用技術が求められている。Further, even if the snubber circuit absorbs the surge voltage due to the wiring inductance of the external circuit of the high speed switching device, if the current change rate of the main circuit is large, the capacity of the snubber circuit also becomes large and the external shape of the device becomes large, resulting in a power consumption. There is also an effect such as an increase in loss, and control that does not necessarily fully utilize the switching characteristics of high-speed switching devices is not performed. Although high-speed switching devices with even higher switching speeds are being developed, high-speed switching device application techniques that fully utilize their switching characteristics are required.
【００１７】本発明は上述事情に鑑みてなされたもの
で、その目的とするところは、高速スイッチングデバイ
スのスイッチング動作を速くして、しかもスイッチング
動作時の電流変化率を抑制し、スイッチング損失を低減
させ、スナバ回路の容量を低減し、サージ電圧を抑制し
て外部機器へ与えるノイズを軽減することができるよう
にスイッチング動作を改善した電力変換装置を提供する
ことにある。The present invention has been made in view of the above circumstances, and an object thereof is to speed up the switching operation of a high-speed switching device, suppress the current change rate during the switching operation, and reduce the switching loss. Another object of the present invention is to provide a power conversion device with improved switching operation so that the capacity of the snubber circuit can be reduced, surge voltage can be suppressed, and noise given to external equipment can be reduced.
【００１８】[0018]
【課題を解決するための手段】上記目的を達成するた
め、本発明の電力変換装置は以下のように構成する。
（請求項１） 制御２端子間に与えられる指令電圧に基
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、前記指令電圧補正手段は、前記主回路２端子間の電
圧の所定電圧以上の領域においてスイッチング時の前記
主回路２端子間の電圧変化率を所定値内に抑制すると共
にピーク値を抑制する。
（請求項２） 更に、前記指令電圧はゲート抵抗を介し
て制御２端子間に与えられ、前記指令電圧補正手段は、
抵抗または定電圧素子とコンデンサの直列回路と前記コ
ンデンサに並列接続された抵抗とで構成される回路を、
前記主回路２端子の一方の主回路端子と前記制御２端子
の一方の制御端子間に接続して構成し、前記主回路２端
子間の電圧変化率に基づいて前記指令電圧を補正する。
（請求項３） 更に、前記指令電圧補正手段は、定電圧
素子とコンデンサとが直列接続される回路を、前記主回
路２端子の一方の主回路端子と前記制御２端子の一方の
制御端子間に接続して構成し、前記主回路２端子間の電
圧変化率に基づいて前記指令電圧を補正する。
（請求項４） 更に、前記指令電圧補正手段は、定電圧
素子と抵抗とコンデンサとが直列に接続された回路、ま
たは、定電圧素子と抵抗とコンデンサとが直列に接続さ
れた回路と前記コンデンサに並列接続された抵抗とで構
成される回路を、前記主回路２端子の一方の主回路端子
と前記制御２端子の一方の制御端子間に接続して構成
し、前記主回路２端子間の電圧変化率に基づいて前記指
令電圧を補正する。
（請求項５） 更に、前記指令電圧補正手段は、制御指
令に基づいて前記指令電圧を補正する機能を有効とする
手段を備え、高速スイッチングデバイスがスイッチング
動作するとき、所定期間のみ前記指令電圧を補正する機
能を有効とする。更に、前記指令電圧はゲート抵抗を介
して制御２端子間に与えられ、前記指令電圧補正手段
は、前記主回路２端子間の電圧に基づいて前記制御２端
子間にバイパス電流を流し指令電圧を補正する制御手段
を備える。
（請求項６） 更に、前記高速スイッチングデバイスを
パッケージとして構成し、少なくとも前記指令電圧補正
手段の一部を前記パッケージ内部に収納する。
（請求項７） 更に、前記制御手段は、制御指令に基づ
いてバイパス電流を流す機能を有効とする手段を備え、
高速スイッチングデバイスがスイッチング動作すると
き、所定期間のみバイパス電流を流す機能を有効とす
る。In order to achieve the above object, the power converter of the present invention is constructed as follows. (Claim 1) A high-speed switching device is used in which the main circuit 2 terminals are in a conducting state or a non-conducting state based on a command voltage applied between the control 2 terminals, and the high speed switching device is used based on the voltage between the main circuit 2 terminals. In a power conversion device that includes a command voltage correction unit that corrects a command voltage, and that suppresses a voltage change rate between the main circuit 2 terminals during switching within a predetermined value, the command voltage correction unit is configured between the main circuit 2 terminals. The voltage change rate between the terminals of the main circuit 2 at the time of switching is suppressed within a predetermined value and the peak value is suppressed in a region where the voltage is higher than a predetermined voltage. (Claim 2) Further, the command voltage is given between the two control terminals via a gate resistor, and the command voltage correction means is
A circuit composed of a series circuit of a resistor or a constant voltage element and a capacitor and a resistor connected in parallel to the capacitor,
It is configured by connecting between one main circuit terminal of the main circuit 2 terminal and one control terminal of the control 2 terminal, and the command voltage is corrected based on a voltage change rate between the main circuit 2 terminals. (Claim 3) Further, the command voltage correction means includes a circuit in which a constant voltage element and a capacitor are connected in series between the main circuit terminal of one of the main circuit 2 terminals and the control terminal of one of the control 2 terminals. , And corrects the command voltage based on the rate of change in voltage between the two terminals of the main circuit. (Claim 4) Further, the command voltage correction means is a circuit in which a constant voltage element, a resistor and a capacitor are connected in series, or a circuit in which a constant voltage element, a resistor and a capacitor are connected in series and the capacitor. And a resistor connected in parallel to the main circuit 2 terminal is connected between one main circuit terminal of the main circuit 2 terminal and one control terminal of the control 2 terminal. The command voltage is corrected based on the voltage change rate. (Claim 5) Further, the command voltage correction means includes means for validating the function of correcting the command voltage based on a control command, and when the high-speed switching device performs a switching operation, the command voltage is corrected only for a predetermined period. Enable the correction function. Further, the command voltage is applied between the two control terminals via a gate resistor, and the command voltage correcting means supplies a command voltage by passing a bypass current between the two control terminals based on the voltage between the two terminals of the main circuit. The control means for correcting is provided. (Claim 6 ) Further, the high-speed switching device is configured as a package, and at least a part of the command voltage correction means is housed inside the package. (Claim 7 ) Further, the control means is provided with means for enabling a function of flowing a bypass current based on a control command,
When the high-speed switching device performs the switching operation, the function of passing the bypass current only for a predetermined period is effective.
【００１９】[0019]
【発明の実施の形態】本発明に係る実施例を図１に示
す。図１は、本発明の電力変換装置を構成する要部、す
なわち、高速スイッチングデバイス（ＩＧＢＴモジュー
ル）１５の周辺回路の構成を示したもので、コンデンサ
２２と抵抗２３の直列回路を高速スイッチングデバイス
１５のコレクタ端子Ｃとゲート端子Ｇ間に接続して構成
する。その他は従来（図１１）と同じで同一符号で示し
ている。また、図１の構成は図１０のようなＰＷＭ制御
インバータ装置など種々の電力変換装置に適用すること
ができる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment according to the present invention is shown in FIG. FIG. 1 shows a main part of the power converter of the present invention, that is, a configuration of a peripheral circuit of a high-speed switching device (IGBT module) 15, in which a series circuit of a capacitor 22 and a resistor 23 is connected to the high-speed switching device 15. It is configured by connecting between the collector terminal C and the gate terminal G of. Others are the same as the conventional one (FIG. 11) and are shown by the same reference numerals. Further, the configuration of FIG. 1 can be applied to various power conversion devices such as the PWM control inverter device as shown in FIG. 10.
【００２０】上記構成において、オン或いはオフのため
のゲート電圧Ｖg0が与えられ、ゲート抵抗２１を介して
高速スイッチングデバイス１５のゲート端子Ｇと制御用
エミッタ端子Ｅ１間に指令電圧Ｖg が与えられると、Ｉ
ＧＢＴ１７がオン（導通）或いはオフ（非導通）して主
回路電流Ｉc の通電或いはしゃ断が行われる。In the above structure, when the gate voltage Vg0 for turning on or off is applied and the command voltage Vg is applied between the gate terminal G of the high speed switching device 15 and the control emitter terminal E1 via the gate resistor 21, I
The GBT 17 is turned on (conducting) or off (non-conducting) to energize or interrupt the main circuit current Ic.
【００２１】このように高速スイッチングデバイス１５
がオフからオンへ或いはオンからオフへスイッチング動
作するとき、コレクタ端子Ｃとエミッタ端子Ｅ間のコレ
クタ電圧ＶCEが減少或いは増大するように変化して、コ
ンデンサ２２と抵抗２３の直列回路にコレクタ電圧ＶCE
の変化率に比例した電流ｉs が流れる。この電流ｉsは
端子Ｇ−Ｅ１間の指令電圧Ｖg を変化させ、ＩＧＢＴ１
７の導電率を変化させ、コレクタ電圧ＶCEの変化率を抑
制するように作用する。Thus, the high speed switching device 15
Is switched from off to on or from on to off, the collector voltage VCE between the collector terminal C and the emitter terminal E changes so as to decrease or increase, and the collector voltage VCE is added to the series circuit of the capacitor 22 and the resistor 23.
A current is flowing in proportion to the change rate of This current is changes the command voltage Vg between the terminals G and E1, and the IGBT1
7 to change the conductivity and suppress the change rate of the collector voltage VCE.
【００２２】例えば、図２に示すように、高速スイッチ
ングデバイス１５がオン（導通）状態において、時刻ｔ
1 で負極性のゲート電圧Ｖg0が与えられたとき、ゲート
抵抗２１を通じて負極性のゲート電流ｉg1が流れ始め、
図示しない指令電圧Ｖg が負方向に変化し、ターンオフ
ディレイタイムｔd(off)が経過した時刻ｔ2 からＩＧＢ
Ｔ１７の導電率が減少し始め端子Ｃ−Ｅ間のコレクタ電
圧ＶCEが上昇方向に変化する。このように時刻ｔ2 から
コレクタ電圧ＶCEが上昇方向に変化すると、コンデンサ
２２と抵抗２３の直列回路にコレクタ電圧ＶCEの上昇率
（変化率）に比例した充電電流ｉs が流れ、この充電電
流ｉs は端子Ｇ−Ｅ１間に流れる負のゲート電流ｉg1を
打ち消すように作用する。従って、図示しない指令電圧
Ｖg の変化を妨げるように作用し、コレクタ電圧ＶCEの
上昇率を所定値に抑制するように作用し、結果としてコ
レクタ電流Ｉc の減少率（変化率）を抑制する。For example, as shown in FIG. 2, when the high speed switching device 15 is in the ON (conducting) state, the time t
When the negative polarity gate voltage Vg0 is applied at 1, the negative polarity gate current ig1 starts to flow through the gate resistor 21,
The command voltage Vg (not shown) changes in the negative direction, and the IGB starts from time t2 when the turn-off delay time td (off) elapses.
The conductivity of T17 begins to decrease, and the collector voltage VCE between the terminals C and E changes in the increasing direction. As described above, when the collector voltage VCE changes in an increasing direction from the time t2, the charging current is proportional to the increasing rate (rate of change) of the collector voltage VCE flows in the series circuit of the capacitor 22 and the resistor 23, and this charging current is is It acts to cancel the negative gate current ig1 flowing between G-E1. Therefore, it acts so as to prevent the change of the command voltage Vg (not shown), and acts to suppress the increase rate of the collector voltage VCE to a predetermined value, and consequently suppresses the decrease rate (change rate) of the collector current Ic.
【００２３】コレクタ電圧ＶCEが所定の変化率で上昇
し、図示しないスナバ回路のコンデンサの充電電圧以上
に達すると、コレクタ電流Ｉc がスナバ回路のコンデン
サ側へ分流（転流）してＩＧＢＴ１７に流れるコレクタ
電流Ｉc はコレクタ電圧ＶCEの変化率に対応した電流変
化率で減少する。このように、コレクタ電圧ＶCEの変化
率を所定値に抑制することによって、コレクタ電圧ＶCE
とコレクタ電流Ｉc の積で決まる瞬時電力損失の最大値
が減少する。When the collector voltage VCE rises at a predetermined rate of change and reaches or exceeds the charging voltage of the capacitor of the snubber circuit (not shown), the collector current Ic is shunted (commutated) to the capacitor side of the snubber circuit and flows into the IGBT 17. The current Ic decreases at a current change rate corresponding to the change rate of the collector voltage VCE. In this way, by suppressing the rate of change of the collector voltage VCE to a predetermined value, the collector voltage VCE
The maximum value of the instantaneous power loss determined by the product of the collector current Ic and the collector current Ic decreases.
【００２４】また、図３に示すように、高速スイッチン
グデバイス１５がオフ（非導通）状態において、正極性
のゲート電圧Ｖg0が与えられたとき、ゲート抵抗２１を
通じて正極性のゲート電流ｉg1が流れ始め、ターンオン
ディレイタイムｔd(on) が経過した時刻からＩＧＢＴ１
７の導電率が増大し始め、端子Ｃ−Ｅ間のコレクタ電圧
ＶCEが減少方向に変化し、コンデンサ２２からコレクタ
電圧ＶCEの変化率に比例した放電電流ｉs が流れ、この
放電電流ｉs は端子Ｇ−Ｅ１間に流れる正のゲート電流
ｉg1を打ち消すように作用する。従って、コレクタ電圧
ＶCEの減少率を所定値に抑制するように作用し、結果と
してコレクタ電流Ｉc の上昇率（変化率）を抑制する。Further, as shown in FIG. 3, when the high speed switching device 15 is in the off (non-conducting) state and the positive gate voltage Vg0 is applied, the positive gate current ig1 starts to flow through the gate resistor 21. , IGBT1 from the time when the turn-on delay time td (on) has elapsed
The conductivity of 7 starts to increase, the collector voltage VCE between the terminals CE changes in a decreasing direction, and the discharge current is proportional to the rate of change of the collector voltage VCE flows from the capacitor 22, and this discharge current is It acts so as to cancel the positive gate current ig1 flowing between −E1. Therefore, it acts so as to suppress the decrease rate of the collector voltage VCE to a predetermined value, and consequently suppresses the increase rate (change rate) of the collector current Ic.
【００２５】なお、電圧Ｖd は図１０のようにＩＧＢＴ
モジュール１５が直列接続されたときの相手側の高速ス
イッチングデバイス１５の端子Ｃ−Ｅ間に生じる電圧の
波形を示し、コレクタ電圧ＶCEと同様に緩やかに上昇す
ることを示している。The voltage Vd is the same as that of the IGBT as shown in FIG.
The waveform of the voltage generated between the terminals C and E of the high-speed switching device 15 on the other side when the module 15 is connected in series is shown, showing that the voltage gradually rises like the collector voltage VCE.
【００２６】本実施例によれば、ゲート抵抗２１の値を
小さくして遅れ時間ｔd を短縮しスイッチング時間を短
縮するように動作させてもコレクタ電圧ＶCEの変化率を
所定値に抑制することが可能となる。従って、スイッチ
ング動作時のコレクタ電流の変化率を所定値内に抑制す
ることができ、サージ電圧を安全動作領域内に抑制し、
スイッチング損失Ｐs の瞬時値の最大損失を減少させる
ことができ、スナバ回路の容量を低減することが可能と
なり、ＰＷＭ制御の変調周波数を増加させ、より品質の
良い交流電力を供給することが可能となる。According to the present embodiment, the rate of change of the collector voltage VCE can be suppressed to a predetermined value even if the gate resistance 21 is made smaller and the delay time td is shortened and the switching time is shortened. It will be possible. Therefore, the rate of change of the collector current during the switching operation can be suppressed within a predetermined value, and the surge voltage can be suppressed within the safe operation area.
The maximum loss of the instantaneous value of the switching loss Ps can be reduced, the capacity of the snubber circuit can be reduced, the modulation frequency of the PWM control can be increased, and higher quality AC power can be supplied. Become.
【００２７】図４は本発明の請求項１、２に係る実施例
を示したもので、高速スイッチングデバイス１５のコレ
クタ電圧ＶCEの所定電圧以上の領域において電圧変化率
を抑制すると共にピーク値を抑制するようにした例であ
る。FIG. 4 shows an embodiment according to claims 1 and 2 of the present invention. In the region where the collector voltage VCE of the high speed switching device 15 is equal to or higher than a predetermined voltage, the voltage change rate is suppressed and the peak value is suppressed. This is an example of doing so.
【００２８】図４において、２４はゼナーダイオード等
の定電圧素子で、コンデンサ２２と抵抗２５の並列回路
に直列接続され、これらの直列回路が高速スイッチング
デバイス１５のコレクタ端子Ｃとゲート端子Ｇ間に接続
される。In FIG. 4, a constant voltage element 24 such as a Zener diode is connected in series with a parallel circuit of a capacitor 22 and a resistor 25, and these series circuits are connected between the collector terminal C and the gate terminal G of the high speed switching device 15. Connected to.
【００２９】上記構成により、コレクタ電圧ＶCEが定電
圧素子２４の制限電圧で定まる所定電圧以上になると、
コンデンサ２２と抵抗２５の並列回路に電流ｉs が流
れ、この電流ｉs により電圧変化率ｄＶCE／ｄｔを抑制
すると共にコレクタ電圧ＶCEのピーク値を抑制するよう
に端子Ｇ−Ｅ１間に流れるゲート電流ｉg1が補正され
る。With the above configuration, when the collector voltage VCE becomes equal to or higher than the predetermined voltage determined by the limiting voltage of the constant voltage element 24,
A current is flows in the parallel circuit of the capacitor 22 and the resistor 25, and the current is causes the gate current ig1 flowing between the terminals G and E1 so as to suppress the voltage change rate dVCE / dt and the peak value of the collector voltage VCE. Will be corrected.
【００３０】例えば、図５に示すように、高速スイッチ
ングデバイス１５がオン状態において、時刻ｔ1 でオフ
指令（負極性）のゲート電圧が与えられると、ゲート抵
抗２１を介して高速スイッチングデバイス１５の端子Ｇ
−Ｅ１間にゲート電流ｉg1が流れ、ターンオフディレイ
タイム後の時刻ｔ2 からゲート抵抗２１の値で定まる電
圧変化率でコレクタ電圧ＶCEが定電圧素子２４の制限電
圧まで急速に増大する。時刻ｔ21でコレクタ電圧ＶCEが
制限電圧を越えると、コンデンサ２２と抵抗２５の並列
回路に電流ｉs が流れ始め、端子Ｇ−Ｅ１間に流れる負
極性のゲート電流ｉg1を減少させるように作用する。こ
の場合、コンデンサ２２に流れる充電電流はコレクタ電
圧ＶCEの電圧上昇率を抑制するように作用し、抵抗２５
に流れる電流はコレクタ電圧ＶCEのピーク値を抑制する
ように作用する。従って、時刻ｔ21よりコレクタ電圧Ｖ
CEの電圧上昇率ｄＶCE／ｄｔが所定値に抑制されると共
にピーク値が制限電圧に近い値に抑制される。For example, as shown in FIG. 5, when the high-speed switching device 15 is in the ON state and an OFF command (negative polarity) gate voltage is applied at time t1, the terminal of the high-speed switching device 15 is supplied through the gate resistor 21. G
The gate current ig1 flows between −E1 and the collector voltage VCE rapidly increases to the limit voltage of the constant voltage element 24 at a voltage change rate determined by the value of the gate resistor 21 from time t2 after the turn-off delay time. When the collector voltage VCE exceeds the limit voltage at time t21, the current is begins to flow in the parallel circuit of the capacitor 22 and the resistor 25, and acts to reduce the negative gate current ig1 flowing between the terminals G-E1. In this case, the charging current flowing through the capacitor 22 acts to suppress the rate of increase in the collector voltage VCE, and the resistor 25
The current flowing through the capacitor acts to suppress the peak value of the collector voltage VCE. Therefore, from time t21, the collector voltage V
The voltage rise rate dVCE / dt of CE is suppressed to a predetermined value, and the peak value is suppressed to a value close to the limit voltage.
【００３１】なお、時刻ｔ2 からｔ21の間でコレクタ電
圧ＶCEがスナバコンデンサの充電電圧を越えるとコレク
タ電流Ｉc がスナバ回路側へ分流してコレクタ電流Ｉc
が急速に減少し、時刻21から電圧上昇率に対応した変化
率で減少する。If the collector voltage VCE exceeds the charging voltage of the snubber capacitor between the times t2 and t21, the collector current Ic is shunted to the snubber circuit side and the collector current Ic is obtained.
Rapidly decreases, and from time 21, the rate of change corresponds to the rate of voltage increase.
【００３２】また、図４の場合、定電圧素子２４の制限
電圧は高速スイッチングデバイス１５の主回路に印加さ
れる直流電圧より少し高い値に選定される。本実施例に
よれば、前述と同様にスイッチング時間を短くし、ター
ンオフ時に主回路のダンピング特性によって生じる過電
圧領域において電圧上昇率を抑制し、ノイズ障害を軽減
することが可能となり、また、過電圧のピーク値が抑制
される結果としてスナバ回路も小さくでき、スイッチン
グ損失Ｐs も減少する。In the case of FIG. 4, the limiting voltage of the constant voltage element 24 is selected to be a value slightly higher than the DC voltage applied to the main circuit of the high speed switching device 15. According to the present embodiment, the switching time is shortened similarly to the above, the voltage rise rate is suppressed in the overvoltage region caused by the damping characteristic of the main circuit at the time of turn-off, and it becomes possible to reduce the noise disturbance. As a result of suppressing the peak value, the snubber circuit can be made smaller and the switching loss Ps is also reduced.
【００３３】一般的にサージ電圧は高速スイッチングデ
バイス１５の主回路に印加される直流電圧の１．４〜２
倍近い値まで上昇し、そのピーク電圧とその付近での電
圧上昇率が他の装置へ悪影響を与えるので、制限電圧以
上の範囲でコレクタ電圧ＶＣＥの上昇率を抑制し、その
ピーク値を抑制することによって、他の装置へ与えるノ
イズ障害を軽減することができる。Generally, the surge voltage is 1.4 to 2 of the DC voltage applied to the main circuit of the high speed switching device 15.
Since the voltage rises to a value nearly double and the peak voltage and the voltage increase rate in the vicinity thereof adversely affect other devices, the increase rate of the collector voltage VCE is suppressed within the range of the limit voltage or higher, and the peak value is suppressed. As a result, it is possible to reduce noise interference given to other devices.
【００３４】なお、抵抗２５は高速スイッチングデバイ
ス１５のオン動作中又はオフ動作中にコンデンサ２２の
電荷を放電させる作用をも行うものである。図６は上記
実施例の変形例として請求項３、４に係る実施例を示し
たもので、電圧指令補正手段として、コンデンサ２２と
抵抗２３と定電圧素子２４の直列回路を高速スイッチン
グデバイス１５のコレクタ端子Ｃとゲート端子Ｇ間に接
続したものである。The resistor 25 also has a function of discharging the electric charge of the capacitor 22 while the high-speed switching device 15 is on or off. FIG. 6 shows an embodiment according to claims 3 and 4 as a modification of the above-mentioned embodiment. As a voltage command correction means, a series circuit of a capacitor 22, a resistor 23 and a constant voltage element 24 is connected to a high speed switching device 15. It is connected between the collector terminal C and the gate terminal G.
【００３５】この実施例の如く、回路構成を変更しても
コレクタ電圧ＶＣＥの所定値以上の範囲において電圧上
昇率を抑制する作用が得られ、コンデンサ２２に抵抗２
５を接続すればコレクタ電圧ＶCEのピーク値を抑制する
作用が得られ、図４と同様の効果が得られる。Even if the circuit configuration is changed as in this embodiment, the effect of suppressing the voltage increase rate can be obtained in the range of the collector voltage VCE of the predetermined value or more, and the resistor 2 is added to the capacitor 22.
If 5 is connected, the effect of suppressing the peak value of the collector voltage VCE can be obtained, and the same effect as in FIG. 4 can be obtained.
【００３６】なお、コンデンサ２２の充電電荷はＩＧＢ
Ｔ１７のオン動作中に、抵抗２３、定電圧素子２４、図
示しないゲート制御回路、ゲート抵抗２１を介して放電
される。The charge of the capacitor 22 is IGB.
During the ON operation of T17, the electric charge is discharged through the resistor 23, the constant voltage element 24, the gate control circuit (not shown), and the gate resistor 21.
【００３７】本発明の請求項６に係る実施例を図７に示
す。一般的にＩＧＢＴ１７とダイオード１８でなる高速
スイッチングデバイスは、プラスチックを使用したモジ
ュールパッケージや、両面冷却できるフラッとパッケー
ジなどに収納されており、この実施例は、パッケージと
して構成される高速スイッチングデバイス１５の内部に
図４に示した電圧指令補正手段を収納する例を示したも
のである。An embodiment according to claim 6 of the present invention is shown in FIG. Generally, a high-speed switching device composed of an IGBT 17 and a diode 18 is housed in a module package using plastic, a double-sided cooling flap and a package, and the like. 5 shows an example in which the voltage command correction means shown in FIG. 4 is housed inside.
【００３８】本実施例によれば、前述と同様の効果が得
られると共に、高速スイッチングデバイス１５の周辺部
品が少なくなり、シンプルでコンパクトな電力変換装置
とすることができる。According to the present embodiment, the same effect as described above can be obtained, and the peripheral parts of the high speed switching device 15 are reduced, so that a simple and compact power converter can be obtained.
【００３９】また、このパッケージ内部に図１や図６に
示した電圧指令補正手段を収納しても前述と同様の効果
が得られる。本発明の請求項５に係る実施例を図８に示
す。If the voltage command correction means shown in FIGS. 1 and 6 is housed inside this package, the same effect as described above can be obtained. FIG. 8 shows an embodiment according to claim 5 of the present invention.
【００４０】図８において、２６はオン、オフ指令のゲ
ート電圧Ｖg0を与えるゲート制御回路、２７はゲート制
御回路２６から与えられるスイッチ指令Ｓに基づいてオ
ン、オフするスイッチである。In FIG. 8, reference numeral 26 is a gate control circuit for giving a gate voltage Vg0 for on / off command, and 27 is a switch for turning on / off based on a switch command S given from the gate control circuit 26.
【００４１】この実施例は、ゲート制御回路２６から与
えられるスイッチ指令Ｓに基づいてスイッチ２７をオン
させ、コンデンサ２２と抵抗２３の直列回路に流れる電
流ｉs により指令電圧Ｖg を補正する作用（機能）を有
効とするもので、高速スイッチングデバイス１５をスイ
ッチング動作させるとき、所望の期間のみ電圧変化率を
抑制するようにしたものである。In this embodiment, the switch 27 is turned on based on the switch command S given from the gate control circuit 26, and the command voltage Vg is corrected by the current is flowing in the series circuit of the capacitor 22 and the resistor 23 (function). When the high speed switching device 15 is switched, the voltage change rate is suppressed only for a desired period.
【００４２】例えば、図５に示す時刻ｔ1 からｔ3 の期
間のみスイッチ指令Ｓを与え、時刻ｔ3 以降のコレクタ
電圧ＶCEが外部要因で変動してもゲート電流ｉg1の補正
動作を行わないようにする。For example, the switch command S is given only during the period from time t1 to t3 shown in FIG. 5 so that the correction operation of the gate current ig1 is not performed even if the collector voltage VCE after time t3 changes due to an external factor.
【００４３】本実施例によれば、高速スイッチングデバ
イス１５をスイッチング動作させるとき、所望期間のみ
ゲート電圧Ｖg を補正する機能を有効とすることができ
るので、定電圧素子２４の制限電圧を主回路の定格電圧
より低い値に設定して電圧上昇率を抑制する作用を早め
に行なわせ、ピーク電圧を定格電圧内に抑制することが
可能となり、上記所望期間を除く期間の外乱に対して補
正動作を禁止し安定した動作とすることができる。According to the present embodiment, when the high-speed switching device 15 is switched, the function of correcting the gate voltage Vg can be made effective only for a desired period, so that the limiting voltage of the constant voltage element 24 is controlled by the main circuit. It is possible to set the value lower than the rated voltage to suppress the voltage rise rate earlier and suppress the peak voltage to within the rated voltage, and to correct the disturbance for the period other than the desired period. Prohibition and stable operation can be performed.
【００４４】なお、スイッチ指令Ｓは、高速スイッチン
グデバイス１５がオンからオフに或いはオフからオンに
スイッチング動作する時のみスイッチ２７をオンさせる
ように与えることがきる。The switch command S can be given to turn on the switch 27 only when the high-speed switching device 15 performs switching operation from on to off or from off to on.
【００４５】本発明の請求項６、７に係る実施例を図９
に示す。図９において、２８は抵抗３１に生じる電圧降
下に基づいて端子Ｇ−Ｅ１間に与えられる電圧指令Ｖg
を補正する電圧補正回路である。FIG. 9 shows an embodiment according to claims 6 and 7 of the present invention.
Shown in. In FIG. 9, 28 is a voltage command Vg given between the terminals G-E1 based on the voltage drop across the resistor 31.
Is a voltage correction circuit that corrects.
【００４６】この実施例は、抵抗２３とコンデンサ２２
と抵抗３１の直列回路が高速スイッチングデバイス１５
のコレクタ端子Ｃと制御用エミッタ端子Ｅ１間に接続さ
れ、コレクタ電圧ＶCEが変化するとき、コンデンサ２２
に流れる電流ｉs によって抵抗３１に生じる電圧降下Ｖ
s により電圧補正回路２８が端子Ｇ−Ｅ１間に与えられ
る電圧指令Ｖg を補正してコレクタ電圧ＶCEの変化率を
所定値内に抑制するように作用する。In this embodiment, the resistor 23 and the capacitor 22 are
The series circuit of the resistor and the resistor 31 is the high-speed switching device 15
Connected between the collector terminal C and the control emitter terminal E1 of the capacitor 22 when the collector voltage VCE changes.
Voltage V generated in the resistor 31 by the current is flowing through
The voltage correction circuit 28 corrects the voltage command Vg given between the terminals G and E1 by s to suppress the rate of change of the collector voltage VCE within a predetermined value.
【００４７】例えば、高速スイッチングデバイス１５が
オンの状態においてオフ（負極性）のゲート電圧Ｖg0が
与えられ、ＩＧＢＴ１７がターンオフしてオフ状態に移
行するとき、コレクタ電圧ＶCEが急速に上昇してコンデ
ンサ２２に充電電流ｉs が流れ、抵抗３１に正極性の電
圧降下Ｖs が生じると、電圧補正回路２８は端子Ｇ−Ｅ
１間に与えられる電圧指令Ｖg によるバイパス電流ｉb
を流して負方向に変化する電圧指令Ｖg の変化率を抑制
する。For example, when the high-speed switching device 15 is in the on state and the off (negative) gate voltage Vg0 is applied and the IGBT 17 turns off and shifts to the off state, the collector voltage VCE rapidly rises and the capacitor 22 is turned on. When a charging current is flows through the resistor 31 and a positive voltage drop Vs occurs in the resistor 31, the voltage correction circuit 28 causes the voltage correction circuit 28 to have a terminal GE
Bypass current ib due to voltage command Vg given between 1 and
To suppress the rate of change of the voltage command Vg which changes in the negative direction.
【００４８】すなわち、増幅器２９と抵抗３０を介して
電圧降下Ｖs の絶対値に比例した負極性のバイパス電流
ｉb を流し、ゲート抵抗２１と電圧補正回路２８の内部
抵抗でゲート電圧Ｖg0を分圧するように作用させ、コレ
クタ電圧ＶCEの変化率（上昇率）を所定値に抑制する。That is, a negative bypass current ib proportional to the absolute value of the voltage drop Vs is passed through the amplifier 29 and the resistor 30, and the gate voltage Vg0 is divided by the gate resistor 21 and the internal resistor of the voltage correction circuit 28. To suppress the rate of change (rate of increase) of the collector voltage VCE to a predetermined value.
【００４９】高速スイッチングデバイス１５がオフ状態
においてオン（正極性）のゲート電圧が与えられ、ＩＧ
ＢＴ１７がオン状態に移行する場合は正極性のバイパス
電流ｉb が流れ、前述と同様に作用して、コレクタ電圧
ＶCEの変化率（減少率）が所定値内に抑制される。When the high-speed switching device 15 is in the off state, an on (positive polarity) gate voltage is applied, and
When the BT 17 shifts to the ON state, the positive bypass current ib flows and acts in the same manner as described above, and the change rate (decrease rate) of the collector voltage VCE is suppressed within a predetermined value.
【００５０】なお、コンデンサ２２と抵抗２３の直列回
路は図５、図７に示すように定電圧素子２４を直列接続
して構成し、コレクタ電圧ＶCEの所定電圧以上の範囲で
補正動作を行わせるようにすることができる。The series circuit of the capacitor 22 and the resistor 23 is constituted by connecting the constant voltage element 24 in series as shown in FIGS. 5 and 7, and the correction operation is performed within the range of the collector voltage VCE above the predetermined voltage. You can
【００５１】また、パッケージとして構成される高速ス
イッチングデバイス１５の内部に電圧指令補正手段の全
部或いは一部（例えば、電圧補正回路２８のみ）を収納
するように構成することができる。Further, the high speed switching device 15 configured as a package may be configured to house all or part of the voltage command correction means (for example, only the voltage correction circuit 28).
【００５２】また、電圧補正回路２８にスイッチ指令Ｓ
に基づいて電圧補正回路２８の機能を有効とする手段を
設け、図８の実施例と同様にスイッチング動作時に所定
期間のみバイパス電流ｉb を流すようにして安定したス
イッチング動作を行わせることができる。In addition, the switch command S is sent to the voltage correction circuit 28.
Based on the above, a means for activating the function of the voltage correction circuit 28 is provided, and a stable switching operation can be performed by causing the bypass current ib to flow only during a predetermined period during the switching operation as in the embodiment of FIG.
【００５３】以上の実施例では、高速スイッチングデバ
イスとして、ＩＧＢＴとダイオードを収納したＩＧＢＴ
モジュールで説明したが、ＭＯＳ−ＦＥＴやＩＥＧＴ等
の電圧駆動形の高速スイッチングデバイスであれば本発
明を適用することが可能であり、本発明では特にＩＧＢ
Ｔに限定するものではない。In the above-mentioned embodiments, the IGBT containing the IGBT and the diode is used as the high speed switching device.
Although the module has been described, the present invention can be applied to any voltage-driven high-speed switching device such as a MOS-FET or IEGT.
It is not limited to T.
【００５４】[0054]
【発明の効果】本発明によれば、電圧駆動形の高速スイ
ッチングデバイスを使用して電力変換装置を構成する場
合、簡潔な構成で高速スイッチングデバイスのスイッチ
ング動作を速くして、しかもスイッチング動作時の電圧
変化率、電流変化率及びピーク値を抑制することが可能
となり、スイッチング損失を低減させ、スナバ回路をコ
ンパクト化し、装置形状を小形化することができ、外部
機器へ与えるノイズ障害を軽減することが可能となる。According to the present invention, when a power converter is constructed using a voltage-driven high-speed switching device, the switching operation of the high-speed switching device can be accelerated with a simple structure, and at the time of switching operation. Voltage change rate, current change rate and peak value can be suppressed, switching loss can be reduced, snubber circuit can be made compact, device shape can be miniaturized, and noise interference given to external equipment can be reduced. Is possible.
【図１】本発明の請求項１、２に係る実施例の要部構成
図。FIG. 1 is a configuration diagram of essential parts of an embodiment according to claims 1 and 2 of the present invention.
【図２】上記実施例のターンオフ時の作用を説明するた
めの波形図。FIG. 2 is a waveform diagram for explaining the operation at the time of turn-off in the above embodiment.
【図３】上記実施例のターンオン時の作用を説明するた
めの波形図。FIG. 3 is a waveform diagram for explaining the operation at the time of turn-on of the above embodiment.
【図４】本発明の請求項３、４に係る実施例の要部構成
図。FIG. 4 is a main part configuration diagram of an embodiment according to claims 3 and 4 of the present invention.
【図５】上記実施例のターンオフ時の作用を説明するた
めの波形図。FIG. 5 is a waveform diagram for explaining the operation at the time of turn-off of the above embodiment.
【図６】本発明の請求項３、４に係る別の実施例の要部
構成図。FIG. 6 is a main part configuration diagram of another embodiment according to claims 3 and 4 of the present invention.
【図７】本発明の請求項５に係る実施例の要部構成図。FIG. 7 is a configuration diagram of main parts of an embodiment according to claim 5 of the present invention.
【図８】本発明の請求項６に係る実施例の要部構成図。FIG. 8 is a configuration diagram of essential parts of an embodiment according to claim 6 of the present invention.
【図９】本発明の請求項７〜９に係る実施例の要部構成
図。FIG. 9 is a main part configuration diagram of an embodiment according to claims 7 to 9 of the present invention.
【図１０】スイッチングデバイスを用いた一般的な電力
変換装置の構成図。FIG. 10 is a configuration diagram of a general power converter using a switching device.
【図１１】高速スイッチングデバイスを用いた従来の電
力変換装置の要部構成図。FIG. 11 is a main part configuration diagram of a conventional power conversion device using a high-speed switching device.
【図１２】上記従来装置のターンオン時の作用を説明す
るための波形図。FIG. 12 is a waveform diagram for explaining the operation of the conventional device at turn-on.
【図１３】上記従来装置のターンオフ時の作用を説明す
るための波形図。FIG. 13 is a waveform diagram for explaining the operation of the conventional device at the time of turning off.
１２…整流器 １３…直流フ
ィルタコンデンサ
１４…ＰＷＭ制御インバータ １５…高速ス
イッチングデバイス
１６…負荷 １７…ＩＧＢ
Ｔ
１８…ダイオード １９…ゲート
容量
２０、２０ａ…配線インダクタンス ２１…ゲート
抵抗
２２…コンデンサ ２３、２５、
３０、３１…抵抗
２４…定電圧素子 ２６…ゲート
制御回路
２７…スイッチ ２８…電圧補
正回路
２９…増幅器12 ... Rectifier 13 ... DC filter capacitor 14 ... PWM control inverter 15 ... High-speed switching device 16 ... Load 17 ... IGB
T 18 ... Diode 19 ... Gate capacitance 20, 20a ... Wiring inductance 21 ... Gate resistance 22 ... Capacitor 23, 25,
30 and 31 ... Resistor 24 ... Constant voltage element 26 ... Gate control circuit 27 ... Switch 28 ... Voltage correction circuit 29 ... Amplifier
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H02M 1/08 351 H02M 1/00 H02M 7/48 H02M 7/537 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields investigated (Int.Cl. 7 , DB name) H02M 1/08 351 H02M 1/00 H02M 7/48 H02M 7/537
Claims (7)
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、 前記指令電圧補正手段は、前記主回路２端子間の電圧の
所定電圧以上の領域において該電圧に基づいて前記指令
電圧を補正し、前記主回路２端子間の電圧の所定電圧以
上の領域においてスイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制すると共にピーク値を抑
制することを特徴とする電力変換装置。1. A high-speed switching device is used in which the main circuit 2 terminals are brought into a conducting state or a non-conducting state based on a command voltage applied between the control 2 terminals, and the high speed switching device is used based on the voltage between the main circuit 2 terminals. In a power conversion device that includes a command voltage correction unit that corrects a command voltage, and that suppresses a voltage change rate between the main circuit 2 terminals during switching within a predetermined value, the command voltage correction unit is configured to connect the main circuit 2 terminals. The command voltage is corrected based on the voltage in a region equal to or higher than a predetermined voltage, and the rate of change in voltage between the main circuit 2 terminals during switching is determined in a region in which the voltage between the main circuit 2 terminals is equal to or higher than a predetermined voltage. An electric power conversion device characterized by suppressing the peak value within a predetermined value.
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、 前記指令電圧はゲート抵抗を介して制御２端子間に与え
られ、 前記指令電圧補正手段は、抵抗または定電圧素子とコン
デンサの直列回路と前記コンデンサに並列接続された抵
抗とで構成される回路を、前記主回路２端子の一方の主
回路端子と前記制御２端子の一方の制御端子間に接続し
て構成し、前記主回路２端子間の電圧変化率に基づいて
前記指令電圧を補正することを特徴とする電力変換装
置。2. A high-speed switching device in which the main circuit 2 terminals are brought into a conducting state or a non-conducting state based on a command voltage applied between the control 2 terminals is used, and the high speed switching device is based on the voltage between the main circuit 2 terminals. In a power conversion device that includes a command voltage correction unit that corrects a command voltage and suppresses a voltage change rate between the main circuit 2 terminals during switching within a predetermined value, the command voltage is controlled between two control terminals via a gate resistor. And the command voltage correction means includes a circuit composed of a series circuit of a resistor or a constant voltage element and a capacitor, and a resistor connected in parallel with the capacitor as one main circuit terminal of the two main circuit terminals. A power conversion device configured to be connected between one control terminals of the control 2 terminals to correct the command voltage based on a voltage change rate between the main circuit 2 terminals.
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、 前記指令電圧はゲート抵抗を介して制御２端子間に与え
られ、 前記指令電圧補正手段は、定電圧素子とコンデンサとが
直列接続される回路を、前記主回路２端子の一方の主回
路端子と前記制御２端子の一方の制御端子間に接続して
構成し、前記主回路２端子間の電圧変化率に基づいて前
記指令電圧を補正することを特徴とする電力変換装置。3. A high-speed switching device in which two terminals of the main circuit are brought into a conducting state or a non-conducting state based on a command voltage given between two terminals of the control is used, and the high speed switching device is used based on the voltage between the two terminals of the main circuit. In a power conversion device that includes a command voltage correction unit that corrects a command voltage and suppresses a voltage change rate between the main circuit 2 terminals during switching within a predetermined value, the command voltage is controlled between two control terminals via a gate resistor. The command voltage correction means connects a circuit in which a constant voltage element and a capacitor are connected in series between one main circuit terminal of the main circuit 2 terminal and one control terminal of the control 2 terminal. The power conversion device is configured as described above, and the command voltage is corrected based on a rate of change in voltage between the terminals of the main circuit.
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、 前記指令電圧はゲート抵抗を介して制御２端子間に与え
られ、 前記指令電圧補正手段は、定電圧素子と抵抗とコンデン
サとが直列に接続された回路、または、定電圧素子と抵
抗とコンデンサとが直列に接続された回路と前記コンデ
ンサに並列接続された抵抗とで構成される回路を、前記
主回路２端子の一方の主回路端子と前記制御２端子の一
方の制御端子間に接続して構成し、前記主回路２端子間
の電圧変化率に基づいて前記指令電圧を補正することを
特徴とする電力変換装置。4. A high-speed switching device in which two terminals of the main circuit are brought into a conducting state or a non-conducting state based on a command voltage applied between two terminals of the control is used, and the high speed switching device is used based on the voltage between the two terminals of the main circuit. In a power conversion device that includes a command voltage correction unit that corrects a command voltage and suppresses a voltage change rate between the main circuit 2 terminals during switching within a predetermined value, the command voltage is controlled between two control terminals via a gate resistor. The command voltage correction means is a circuit in which a constant voltage element, a resistor and a capacitor are connected in series, or a circuit in which a constant voltage element, a resistor and a capacitor are connected in series and the capacitor is connected in parallel. And a resistor formed between the main circuit 2 terminal and one control terminal of the control 2 terminal. Power converter and corrects the command voltage based on the ratio.
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、 前記指令電圧補正手段は、制御指令に基づいて前記指令
電圧を補正する機能を有効とする手段を備え、高速スイ
ッチングデバイスがスイッチング動作するとき、所定期
間のみ前記指令電圧を補正する機能を有効とすることを
特徴とする電力変換装置。5. A high-speed switching device in which two terminals of the main circuit are brought into a conducting state or a non-conducting state based on a command voltage applied between two terminals of the control is used, and the high speed switching device is used based on the voltage between the two terminals of the main circuit. In a power conversion device comprising a command voltage correction unit that corrects a command voltage, and suppressing the voltage change rate between the main circuit 2 terminals during switching to be within a predetermined value, the command voltage correction unit is configured to control the command voltage based on a control command. A power conversion device comprising means for activating a function of correcting a command voltage, and activating a function of correcting the command voltage only for a predetermined period when a high-speed switching device performs a switching operation.
の電力変換装置、又は、制御２端子間に与えられる指令
電圧に基づいて主回路２端子間が導通状態或いは非導通
状態となる高速スイッチングデバイスを使用し、前記主
回路２端子間の電圧に基づいて前記指令電圧を補正する
指令電圧補正手段を備え、スイッチング時の前記主回路
２端子間の電圧変化率を所定値内に抑制し、前記指令電
圧はゲート抵抗を介して制御２端子間に与えられ、前記
指令電圧補正手段は、前記主回路２ 端子間の電圧に基づ
いて前記制御２端子間にバイパス電流を流し指令電圧を
補正する制御手段を備えることを特徴とする電力変換装
置において、 前記高速スイッチングデバイスをパッケージとして構成
し、少なくとも前記指令電圧補正手段の一部を前記パッ
ケージ内部に収納することを特徴とする電力変換装置。6. The power converter according to any one of claims 1 to 5, or, directive applied between the control 2 terminals
Conduction or non-conduction between main circuit 2 terminals based on voltage
Use a high-speed switching device
The command voltage is corrected based on the voltage between the two terminals of the circuit.
The main circuit at the time of switching, which is provided with command voltage correction means
The voltage change rate between the two terminals is suppressed within a predetermined value, and
Pressure is applied between the two control terminals via a gate resistor,
The command voltage correction means is based on the voltage between the two terminals of the main circuit.
Then, a bypass current is made to flow between the control 2 terminals and a command voltage is applied.
Power conversion device characterized by comprising control means for correction
In the power conversion device , the high speed switching device is configured as a package, and at least a part of the command voltage correction means is housed inside the package.
づいて主回路２端子間が導通状態或いは非導通状態とな
る高速スイッチングデバイスを使用し、前記主回路２端
子間の電圧に基づいて前記指令電圧を補正する指令電圧
補正手段を備え、スイッチング時の前記主回路２端子間
の電圧変化率を所定値内に抑制する電力変換装置におい
て、 前記指令電圧はゲート抵抗を介して制御２端子間に与え
られ、 前記指令電圧補正手段は、前記主回路２端子間の電圧に
基づいて前記制御２端子間にバイパス電流を流し指令電
圧を補正する制御手段を備え、 前記制御手段は、制御指令に基づいてバイパス電流を流
す機能を有効とする手段を備え、高速スイッチングデバ
イスがスイッチング動作するとき、所定期間のみバイパ
ス電流を流す機能を有効とすることを特徴とする電力変
換装置。7. A control voltage based on a command voltage applied between two control terminals.
Therefore, the two terminals of the main circuit are turned on or off.
Using a high-speed switching device
Command voltage for correcting the command voltage based on the voltage between the slaves
Compensation means is provided between the two terminals of the main circuit at the time of switching
In the power converter that suppresses the voltage change rate of
The command voltage is applied between the two control terminals via the gate resistance.
And the command voltage correction means adjusts the voltage between the two terminals of the main circuit.
Based on the command current
A control means for correcting the pressure is provided, and the control means is provided with a means for activating a function of supplying a bypass current based on a control command. When the high speed switching device performs a switching operation, it has a function of supplying a bypass current only for a predetermined period. A power conversion device characterized by being effective.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04867997A JP3462032B2 (en) | 1997-03-04 | 1997-03-04 | Power converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04867997A JP3462032B2 (en) | 1997-03-04 | 1997-03-04 | Power converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10248237A JPH10248237A (en) | 1998-09-14 |
| JP3462032B2 true JP3462032B2 (en) | 2003-11-05 |
Family
ID=12810016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP04867997A Expired - Lifetime JP3462032B2 (en) | 1997-03-04 | 1997-03-04 | Power converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3462032B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP3141613B2 (en) * | 1993-03-31 | 2001-03-05 | 株式会社日立製作所 | Method and circuit for driving voltage-driven element |
| SE9500761D0 (en) * | 1995-03-02 | 1995-03-02 | Abb Research Ltd | Protection circuit for series-connected power semiconductors |
| JP3577807B2 (en) * | 1995-05-23 | 2004-10-20 | 富士電機デバイステクノロジー株式会社 | Driver circuit for self-extinguishing semiconductor device |
| JP3373704B2 (en) * | 1995-08-25 | 2003-02-04 | 三菱電機株式会社 | Insulated gate transistor drive circuit |
| JP3132648B2 (en) * | 1996-09-20 | 2001-02-05 | 富士電機株式会社 | Gate drive circuit in power converter |
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1997
- 1997-03-04 JP JP04867997A patent/JP3462032B2/en not_active Expired - Lifetime
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015068755A1 (en) | 2013-11-08 | 2015-05-14 | 株式会社明電舎 | Protection circuit for semiconductor switching element, and power conversion device |
| US10014763B2 (en) | 2013-11-08 | 2018-07-03 | Meidensha Corporation | Protection circuit for semiconductor switching element, and power conversion device |
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