JP5369987B2 - Gate drive circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve problems that a switching element is erroneously operated due to the vibration of a voltage between a gate and a source when decreasing a gate resistance in order to reduce a switching loss, and that a power supply for a gate drive circuit is enlarged in size. <P>SOLUTION: In the gate drive circuit, a series circuit formed of a transformer 6a and a capacitor 7 is connected in parallel with the switching element, a first winding magnetically coupled to the transformer is connected between a positive-electrode terminal of the switching element and a gate terminal via a first diode 8, and a second winding magnetically coupled to the transformer is connected between a negative-side terminal of the switching element and the gate terminal via a second diode 9. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a gate drive circuit applied to switching elements such as IGBTs and MOSFETs.

FIG. 5 shows a conventional gate drive system, and FIG. 6 shows its operation waveform. This is a configuration when a MOSFET is used as the switching element. A gate signal V1 generated by the gate signal generator 1 is input between the gate and source of the MOSFET 3 via the gate resistor 2. In the period of t2 at the time of turn-on, the input capacitance 4 parasitic on the MOSFET 3 is charged and the gate voltage _VGS rises. When the gate threshold voltage is exceeded, the MOSFET 3 is turned on and the drain current _ID starts to flow.

In the period t3, the current flowing through the input capacitor 4 through the path of the gate signal generator 1 → gate resistor 2 → input capacitor 4 → gate signal generator 1 is gate signal generator 1 → gate resistor 2 → feedback capacitor 5 → MOSFET 3 → The gate signal generator 1 commutates to the path for discharging the feedback capacitor 5, and the rise of the gate-source voltage _VGS stops. As the charge stored in the feedback capacitor 5 is discharged, the drain-gate voltage decreases, and at the same time, the drain-source voltage V _DS also decreases. During this period, the current for charging the input capacitor 4 does not flow, so the gate-source voltage V _GS is constant. When the charge of the feedback capacitor 5 is released and the drain-source voltage V _DS becomes zero, the current for charging the input capacitor 4 starts to flow again in the period t4, and the gate-source voltage V _GS rises.

On the other hand, the following operation is performed at turn-off. In the period t5 after the gate signal V1 output from the gate signal generator 1 is turned off, the charge stored in the input capacitor 4 is discharged through the gate resistor 2, so that the gate-source voltage V _GS Decreases to the threshold voltage. In the period t6, the drain-source voltage V _DS rises and the feedback capacitor 5 is charged at the same time. The charging current flows through the path of the drain of the MOSFET 3 → the feedback capacitor 5 → the input capacitor 4 → the source of the MOSFET 3. At this time, the current discharged from the input capacitor 4 to the gate signal generator 1 flows in the reverse direction along the path of the input capacitor 4 → gate resistor 2 → gate signal generator 1 → input capacitor 4, so the current of the input capacitor 4 is fed back. The charge current from the capacitor 5 and the discharge current to the gate signal generation unit 1 cancel each other and become zero. Therefore, the gate voltage is constant during this period.

When the drain-source voltage V _DS becomes a steady voltage in the period t6, the charging of the feedback capacitor 5 is also finished, and the charging current of the feedback capacitor 5 flowing from the drain of the MOSFET 3 → the feedback capacitor 5 → the input capacitor 4 → the source of the MOSFET 3 is also Since it disappears, the gate-source voltage V _GS decreases again. During this period, when the gate-source voltage V _GS falls below the threshold voltage, the drain current _ID also decreases.
In the operation as described above, the drain-source voltage V _DS changes while the drain current _ID is kept large during the period t3 when the feedback capacitor 5 is discharged and the period t6 when it is charged. Since the switching loss is a value obtained by integrating the product of the drain-source voltage V _DS and the drain current _ID during the switching period, the switching loss increases as the periods t3 and t6 become longer.

Generally, in order to shorten the periods t3 and t6, a method is used in which the gate resistance 2 is set small and the input capacitor 4 is rapidly charged / discharged with a large current. As a result, the charge / discharge of the feedback capacitor 5 is also accelerated. However, the gate signal generator 1 also has an internal resistance, and there is a limit even if the externally adjustable gate resistance 2 is reduced. If the gate resistance 2 is set to a small value, the power supply capacity increases, and the gate-source voltage V _GS fluctuates due to resonance with the wiring inductance and the capacitive component of the feedback capacity 5 and the input capacity 4, and slight noise is generated. As a result, the gate-source voltage _VGS fluctuates, which may cause a so-called malfunction in which the MOSFET 3 is turned on / off at a timing different from the desired control.

  FIG. 7 shows an example of a gate drive circuit that reduces switching loss by increasing the speed described in Patent Document 1. A transformer is connected in series with the drain of the MOSFET 3, and a secondary winding of the transformer is connected between the gate signal generation unit 1 and the gate terminal of the MOSFET 3 via a resistor 2. When the drain current starts to increase at the time of turn-on, the induced voltage of the secondary winding voltage of the transformer is added to the on-voltage signal from the gate signal generation unit 1, and the turn-on speed is increased. Similarly, when the drain current starts to decrease during turn-off, the induced voltage of the transformer secondary winding voltage is subtracted from the gate signal generation unit to the off-voltage signal, and the turn-off speed is increased. There are features such as that it is not necessary to increase the capacity of the gate drive circuit and it is not necessary to reduce the gate resistance.

JP 2008-235997 A

As described above, when the gate resistance is reduced to reduce the switching loss, the gate-source voltage oscillates and the switching element malfunctions, and the gate drive circuit power supply becomes large. Further, in the method of Patent Document 1 shown in FIG. 7, there is a problem that a magnetic reset circuit is required because the biasing of the transformer is a problem, and the apparatus becomes large.
Accordingly, an object of the present invention is to provide a gate drive circuit that can reduce the switching loss without requiring an increase in the size of the device and an increase in the capacity of the gate drive power supply.

  In order to solve the above-described problem, in the first invention, a series circuit of a transformer and a capacitor is connected in parallel with the switching element, and energy is supplied to the feedback capacitance of the switching element through another winding magnetically coupled to the transformer. Supply.

  In the second invention, a series circuit of a transformer and a capacitor is connected in parallel with a switching element, and a first winding magnetically coupled to the transformer is connected to a positive terminal and a gate terminal of the switching element via a first diode. And a second winding magnetically coupled to the transformer is connected between the negative terminal and the gate terminal of the switching element via a second diode.

  In a third invention, in the first or second invention, a component for limiting current is inserted between the first winding magnetically coupled to the transformer and the feedback capacitor or the input capacitor.

  In a fourth aspect of the present invention, a series circuit of a transformer and a capacitor is connected in parallel with the switching element, and another winding magnetically coupled to the transformer is interposed between the gate signal generation unit and the gate terminal of the switching element via a resistor. Connecting.

  In the present invention, a series circuit of a transformer and a capacitor is connected in parallel with the switching element, and the drain-gate capacitance is charged / discharged by the energy of another winding magnetically coupled to the transformer and the energy of the gate signal generation unit. Therefore, it is not necessary to increase the capacity of the gate drive power supply or reduce the gate resistance, and high-speed turn-on and turn-off operations are possible, and switching loss can be reduced.

  As a result, since it is not necessary to reduce the gate resistance, vibration and malfunction do not occur. Further, it is not necessary to increase the capacity of the gate drive power supply. Further, since there is no problem of the bias magnetism of the transformer, a magnetic reset circuit is unnecessary and the device can be miniaturized.

1 is a circuit diagram showing a first embodiment of the present invention. FIG. 2 is an operation waveform diagram of FIG. It is a circuit diagram which shows the 2nd Example of this invention. It is a circuit diagram which shows the 3rd Example of this invention. It is a figure for demonstrating the prior art example 1. FIG. FIG. 6 is an operation waveform diagram of FIG. 5. It is a circuit diagram which shows the prior art example 2.

  The main point of the present invention is that a series circuit of a transformer and a capacitor is connected in parallel with the switching element, and the drain-gate capacitance is charged / discharged by the energy of another winding magnetically coupled to the transformer and the energy of the gate signal generation unit This is the point.

  FIG. 1 shows a first embodiment of the present invention, and FIG. 2 shows an example of operation waveforms of FIG. In this configuration, a MOSFET is used as the switching element. First, the operation at turn-on will be described. Here, in the periods t1 and t2, the operation is the same as that of the prior art shown in FIGS. In the period t3, the electric charge stored in the capacitor 7 is discharged until it becomes zero in the path of the capacitor 7, the transformer 6a, the MOSFET 3, and the capacitor 7. At the same time, a current for charging the input capacitor 4 flows from the intermediate tap of another winding in the transformer 6a via the diode 9. By charging the input capacitor 4 during this period, the feedback capacitor 5 is also discharged faster. Therefore, charging of the input capacitor 4 and discharging of the feedback capacitor 5 are performed rapidly, and the period of t3 is shortened. This also increases the switching speed and reduces turn-on loss.

In the turn-off operation, the operation is the same as that of the prior art shown in FIGS. 5 and 6 during the periods t5 and t6. However, in the period t6 in the present invention, the capacitor 7 is charged with a rise of the drain-source voltage V _DS of MOSFET 3. Since the charging current also flows through the transformer 6a, a current for charging the feedback capacitor 5 flows through the path of the winding of the transformer 6a → the diode 8 → the feedback capacitor 5 → the intermediate tap of the transformer 6a. Therefore, since the voltage of the feedback capacitor 5 rises rapidly, the period t6 is shortened, the switching speed is increased, and the switching loss at turn-off is reduced.

  Therefore, in the present invention, high-speed switching is possible not only at the time of turn-on but also at the time of turn-off, and the switching loss can be effectively reduced. The present invention can be applied not only to MOSFETs but also to switching elements such as IGBTs.

  FIG. 3 shows a second embodiment of the present invention. The difference from the first embodiment is that a resistor 10 is connected between the intermediate tap of the transformer 6a and the gate terminal of the MOSFET 3 as a component for limiting the current. Here, the current for charging the feedback capacitor 5 or the input capacitor 4 from the transformer 6a can be adjusted by the resistor 10, and the rate of change of the drain-gate voltage and the gate-source voltage can also be adjusted. Therefore, the switching speed can be adjusted by the value of the resistor 10. As a result, the jumping voltage and noise at the time of switching can be reduced, leading to low noise and improved reliability of the apparatus.

  FIG. 4 shows a third embodiment of the present invention. A series circuit of a transformer 6 b and a capacitor 7 is connected in parallel with the MOSFET 3. Another winding of the magnetically coupled transformer 6b is connected between the gate signal generator 1 and the gate terminal of the MOSFET 3 via a resistor. In such a configuration, when the turn-on operation is performed, after the input capacitor 4 is charged to the threshold voltage by the signal from the gate signal generation unit 1 and the MOSFET 3 starts to turn on, the charge of the capacitor 7 is discharged by the MOSFET 3 through the transformer 6b. start. Then, a voltage is induced in another winding magnetically coupled to the transformer 6b, and a voltage added to the voltage of the gate signal generation unit 1 is applied to the gate terminal of the MOSFET. As a result, the feedback capacitor 5 is rapidly discharged, and the MOSFET 3 is turned on at high speed.

Further, at the time of turn-off operation, when the MOSFET 3 starts to turn off after the input capacitance 4 is discharged to the threshold voltage by the signal from the gate signal generator 1, a current starts to flow to the capacitor 7 through the transformer 6b. Then, a voltage is induced in another winding magnetically coupled to the transformer 6b, the voltage of the gate signal generation unit is decreased, and the off operation of the MOSFET 3 is accelerated.
With the above-described operation, switching loss at turn-on and turn-off can be reduced. In this operation, the transformer 6b is excited only when the capacitor 7 is charged for a short time and when it is discharged for a short time, and there is no bias.
In addition, although the example which used MOSFET as a switching element was shown in the said Example, it is realizable also by voltage drive type elements, such as IGBT.

DESCRIPTION OF SYMBOLS 1 ... Gate signal generation part 2, 10 ... Resistor 3 ... MOSFET 4 ... Input capacity 5 ... Feedback capacity 6a, 6b, 6c ... Transformer 7 ... Capacitor 8, 9, ··diode

Claims (4)

  A gate drive circuit characterized in that a series circuit of a transformer and a capacitor is connected in parallel with a switching element, and energy is supplied to a feedback capacitor of the switching element via another winding magnetically coupled to the transformer.   A series circuit of a transformer and a capacitor is connected in parallel with a switching element, and a first winding magnetically coupled to the transformer is connected between a positive electrode terminal and a gate terminal of the switching element via a first diode, A gate driving circuit characterized in that a second winding magnetically coupled to the transformer is connected between a negative terminal and a gate terminal of the switching element via a second diode.   3. The gate drive circuit according to claim 1, wherein a component for limiting current is inserted between the first winding magnetically coupled to the transformer and a feedback capacitor or an input capacitor. A series circuit of a transformer and a capacitor is connected in parallel with a switching element, and another winding magnetically coupled to the transformer is connected between a gate signal generation unit and the gate terminal of the switching element via a resistor. Gate drive circuit.