JP2002171746A - Semiconductor power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To keep constant the clamp voltage of IGBT for alleviating the loss thereof. SOLUTION: This semiconductor power converter is formed into a circuit structure, such that a voltage for a wiring 13N, having a constant potential difference with respect to the collector and the emitter of the IGBT1, is divided with a high-potential side resistor 3 and a low-potential side resistor 4 and also has a function to protect the IGBT from an overcurrent application to the collector by controlling the gate potential of the IGBT to the potential of a voltage-dividing point 9 via the buffer circuit 6. In this semiconductor power converter, a capacitor 5 is connected in parallel with the low potential side resistor, and the capacitance Cl of the capacitor C5 is set to obtain the relation (1) Cl=Ch×Rh/Rl, when a resistance value of the high potential side resistor 3 is Rh, a parasitic capacitance value is Ch, a resistance value of the low potential side resistor 4 is Rl and a capacitance of the capacitor 5 is Cl. Thereby, a clamp voltage level can be held at the constant value, without relation to a voltage variation coefficient (dv/dt) of the collector voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor power converter using a semiconductor element or the like, and more particularly to a technique for suppressing an overvoltage during a switching operation.

[0002]

2. Description of the Related Art When an IGBT is applied to a power converter, a surge voltage is generated by energy stored in a wiring at the time of turn-off, and is applied to the IGBT. As a method for preventing element destruction due to application of an overvoltage such as a surge voltage at the time of turn-off, for example, IEE,
I.S.S. International Conference Material “Series Co
nection of high voltage
As shown in Fig. 1 of the IGBT module "Preliminary report of the IEEJ Industry Application Division Conference of 2000," Serial connection of IGBTs ", the gate voltage is divided based on the potential of the divided point by dividing the collector voltage with a resistor or the like. An active gate control system that determines a command value and suppresses an overvoltage is known. For example, as shown in FIG. 2 attached to the present specification, the voltage dividing point 9 and the gate of the IGBT 1 are connected via the buffer circuit 9 so that the gate voltage of the IGBT 1 becomes the voltage of the voltage dividing point 9. When the on / off pulse generator 7 outputs a negative potential while the IGBT 1 is in the on state, the electric charge stored in the gate of the IGBT 1 is drawn out through the gate resistor 8 to start lowering the gate voltage and shift to the turn off state. The collector voltage increases. Even in a situation where a surge overvoltage is applied by the energy stored in the leakage inductance of the main wiring, if this control method is used, the gate-emitter follows the rise of the potential of the voltage dividing point according to the collector voltage. Since the inter-voltage (gate voltage) also increases and the impedance of the IGBT decreases, it is possible to protect the device from overvoltage destruction by clamping an increase in the collector voltage. Here, in FIG. 2, the freewheeling diode 2 is connected in antiparallel to the IGBT 1, and the pulse generator 7 is supplied with power from the power supply 13 to
The high-voltage-side voltage dividing resistor 3 and the low-voltage-side voltage dividing resistor 4 are connected between the collector terminal 1 and the wiring in the gate driver.

[0003]

SUMMARY OF THE INVENTION An IGBT is provided by a resistor.
When the collector voltage is divided, the resistor used for voltage division is preferably 5 to 100 kΩ for the resistor on the higher voltage side than the voltage dividing point (if the impedance when the IGBT element is off is large, the resistance value can be further increased). ), The resistor on the low voltage side has a resistance value that is not more than 1/20 (gate breakdown voltage / collector breakdown voltage) of the high voltage side resistor, but the resistor has a parasitic capacitance that is approximately proportional to the resistance value. Therefore, the parasitic capacitance of the high-voltage-side resistor having a large resistance value cannot be ignored. In the voltage division of the collector voltage, since the high voltage side is divided by a high resistance and the low voltage side is divided by a low resistance resistor, the voltage rise rate (dv / dt) of the collector voltage such as when the collector voltage rises when the IGBT is turned off is increased. If it is large, the impedance of the high-resistance resistor on the high voltage side decreases, the voltage at the voltage dividing point increases, and the collector voltage of the IGBT is unnecessarily reduced, so that the loss of the IGBT increases.

[0004] It is an object of the present invention to provide a semiconductor power conversion device suitable for holding a clamp voltage of an IGBT constant and reducing a loss of the IGBT.

[0005]

In order to solve the above-mentioned problems, a capacitor is connected in parallel to a low-voltage-side resistor, or a capacitor is connected in parallel to each of a low-voltage-side resistor and a high-voltage-side resistor. In this case, the ratio of the impedance of the high-voltage-side voltage dividing circuit to the impedance of the low-voltage-side voltage dividing circuit is made substantially constant independently of the voltage fluctuation rate (dv / dt) of the collector voltage.

[0006]

Embodiments of the present invention will be described below with reference to the drawings. In all the drawings describing the embodiments, components having the same functions are denoted by the same reference numerals. The potential is based on the emitter. In addition, IGB
Under the condition that an overvoltage is applied between the collector and the emitter of T, the voltage between the collector and the emitter is almost equal to the voltage between the collector and the gate.

FIG. 1 shows a first embodiment which is a semiconductor power converter of the present invention. FIG. 3 shows a main part of a power converter to which the present embodiment is applied. FIG. 1 shows a main part of the arm 20 shown in FIG. 3. The power converter includes three arms 20 connected in series, three in parallel, each connected to a DC voltage source 21, and each midpoint of a pair of arms. Is connected to the load 22. The configuration of the arm of the power converter of the present embodiment is as follows. Freewheel diode 2 in anti-parallel to IGBT1
Connect. The gate of the IGBT 1 is connected to an on / off pulse generator 7 that generates an on / off signal for a switching command via a gate resistor 8. Power is supplied from a power supply 13 to the pulse generator 7. A high-voltage divider 3 and a low-voltage divider 4 are connected between the collector terminal of the IGBT and the wiring 13N in the gate driver.
Further, a capacitor 5 is connected in parallel to the low voltage side resistor 4. The voltage dividing point 9 of the high voltage dividing resistor 3 and the low voltage dividing resistor 4 is connected to the gate terminal of the IGBT 1 via the buffer circuit 6. Here, the resistance value of the high-voltage side resistor 3 is R
h, the parasitic capacitance value thereof is Ch, the resistance value of the low voltage side resistor 4 is Rl, and the capacitance of the capacitor 5 connected in parallel to the low voltage side resistor 4 is Cl. Cl = Ch × Rh / Rl (1) If the capacitance Cl of the capacitor 5 connected in parallel is set so as to satisfy the relational expression (1), the resistance of the resistor 4 on the low voltage side and the resistor 3 on the high voltage side is set. The value ratio is the same as the ratio of the impedance of the capacitor 5 connected in parallel to the low-voltage side resistor 4 and the impedance of the parasitic capacitance of the high-voltage side resistor 3. In other words, the low-voltage side resistance component and capacitance component C
It can be said that equation (1) is satisfied when the R time constant is equal to the CR time constant of the resistance component and the capacitance component on the high voltage side. As a result, the voltage rise rate (dv / d) of the collector voltage of the IGBT 1
Regardless of t), the partial pressure ratio can be kept constant.

For example, resistance value: 50 kΩ, parasitic capacitance value:
The resistor of 50 pF is defined as the high-voltage resistor 3 and the resistor of 175Ω is defined as the low-voltage resistor 4. Assuming that the gate voltage threshold of the IGBT 1 is 7 V, in the steady state, when the collector voltage of the IGBT 1 reaches 2000 V, the voltage at the voltage dividing point 9 reaches the threshold voltage 7 V, and clamps the collector voltage.
FIG. 8 shows that the collector voltage is 2000 V at an arbitrary dv / dt.
5 shows a potential at a voltage dividing point at 2000 V when the voltage is raised up to the maximum. Under the condition that the parallel capacitor 5 is not connected, dv
If / dt is large, the voltage at the voltage dividing point becomes too high, and when the voltage at the voltage dividing point is output to the gate of the IGBT 1,
The IGBT fires incorrectly. However, if a capacitor having a capacitance value that satisfies the expression (1), that is, a capacitor 5 of about 14286 μF is connected in parallel to the resistor 4 on the low voltage side, the potential of the voltage dividing point 9 will be independent of dv / dt. Potential is about 7
V. Usually, when the gate voltage is in the range of about 10 V from the threshold voltage, the collector voltage can be suppressed without igniting the IGBT, and the dv / dt of the collector voltage is also 5000.
V / μs or less. Therefore, in FIG. 8, when the capacitance of the capacitor is 10000 μF, dv / dt is 5000 V
/ Μs or less, and the voltage dividing point potential is 10 V or less. That is, if the capacitance of the capacitor is within 30% of the capacitance obtained from the relational expression (1), it can be said that the capacitance is within a practical range.

Next, the operation of the power converter will be described. The power necessary for the operation of the pulse generator 7 is supplied from the power supply 13, and the pulse generator 7 generates a drive signal controlled by PWM or PAM control. The generated drive signal is input to the gate of the IGBT through the gate resistor 8 and
By turning on or off the GBT 1, the arm 20 is turned on and off to generate an AC voltage, which is applied to the load 22. The paired arms are not turned on at the same time (for example, arm 20 (P) and arm 20 (N)). Here, attention is paid to the case where the drive signal to the arm 20 (P) is on and the arm 20 (N) is off by controlling the arm 20 (N) and the arm 20 (P) alternately on / off. When the arm 20 (P) is in the ON state, the current flows from the DC voltage source 21 to the arm 20 (P) and the inductive load 2.
It flows in a path such as 2. When the arm 20 (P) is turned off, the wiring inductance 23 existing in the path of the main circuit (DC voltage source 21 → arm 20 (P) → arm 20 (N) → DC voltage source 21) is applied to the arm 20 (P). Is superimposed on the voltage of the DC voltage source 21. Therefore, the voltage between the collector and the emitter of the IGBT 1 constituting the arm 20 (P) also jumps.

Referring to FIG. 4, the collector voltage and the gate voltage waveform of the IGBT at the time of turn-off will be described in more detail. FIG. 4 shows the collector voltage waveform 31 of the IGBT,
7 shows a T gate voltage waveform 32 and a voltage waveform 33 at a voltage dividing point. When the pulse generator 7 generates an off signal indicated by the gate potential 32 in a state where the IGBT 1 is on (a negative potential is output from the pulse generator 7), the IGBT 1
The charge stored in the gate of the IGBT 1 is drawn out through the gate resistor 8 and the IGBT 1 is turned off, and the potential 31 of the collector rises. The potential 33 at the voltage dividing point 9 also increases according to the collector voltage. As described above, if the capacitance of the parallel capacitor 5 that satisfies the relationship of the expression (1) is selected, regardless of the collector voltage dv / dt, the voltage dividing point 9
Is proportional to the collector voltage of the IGBT1. Also,
The gate potential of the IGBT 1 is divided by a buffer 6 into a voltage dividing point 9.
Is controlled to the potential of. Therefore, if an overvoltage (a voltage superimposed on the voltage of the DC voltage source 21 on the voltage generated in the wiring inductance 23) is applied to the collector voltage and the gate voltage exceeds the threshold value, the impedance of the IGBT decreases and the collector voltage is reduced. Although the voltage is clamped, the potential of the voltage dividing point 9 increases in proportion to the collector voltage of the IGBT regardless of the collector voltage dv / dt. This is done by the potential of the no voltage dividing point 9. this is,
This means that the clamp voltage level of the collector of the IGBT is kept constant. Thus, in the present embodiment, the IGB
Since the collector voltage clamp level can be kept constant irrespective of the dv / dt of the collector voltage of T, the collector voltage of the IGBT does not decrease unnecessarily as in the related art, and the loss of the IGBT is reduced. Can be reduced.

FIG. 5 shows a second embodiment of the present invention.
Here, the arm 20 of the power converter shown in FIG.
The configuration is as follows. The present embodiment is characterized in that the voltage dividing resistor 4 is connected to the wiring 13N in the gate driver in the first embodiment, but the voltage dividing resistor 4 is connected to the emitter terminal of the IGBT. The same effect as in the first embodiment can be obtained.

FIG. 6 shows a third embodiment of the present invention.
The first and second embodiments are characterized in that a capacitor 5 having a capacity corresponding to the parasitic capacitance value of the high-voltage-side resistor 3 is connected in parallel with the low-voltage-side voltage-dividing resistor 4. However, the parasitic capacitance of the high-voltage side resistor 3 varies in production, and selecting a capacitor having a capacitance corresponding to the production variation requires a great deal of trouble. The present embodiment is characterized in that a capacitor 51 that is sufficiently larger than the parasitic capacitance value of the resistor 3 is connected in parallel with the resistor 3 on the high voltage side. The resistance value of the high voltage side resistor 3 is Rh, the parasitic capacitance value is Ch, the resistance value of the low voltage side resistor 4 is Rl, and the capacitor 5 connected in parallel to the high voltage side resistor 3.
The capacity of 1 is Cch, and the capacity of the capacitor 5 connected in parallel with the resistor 4 on the low voltage side is Cl. Cl = (Cch + Ch) × Rh / Rl (2) The capacitance Cl of the capacitor 5 and the capacitance Cch of the capacitor 51
Is set so that the relational expression of (2) holds, IGB
The voltage division ratio can be kept constant irrespective of the dv / dt of the collector voltage of T. Here, if Cch >> Ch, the capacitance Cl of the capacitor 5 and the capacitance C of the capacitor 51
The relational expression (3) for ch holds. Cl = Cch × Rh / Rl (3) Also in this embodiment, from a different viewpoint, when the CR time constant of the high-voltage-side resistance component and the capacitance component is equal to the CR time constant of the low-voltage-side resistance component and the capacitance component, It can be said that equation (3) holds. That is, also in the present embodiment, regardless of the collector voltage dv / dt, the potential at the voltage dividing point 9 is IGB
It increases in proportion to the collector voltage of T. The gate potential of the IGBT 1 is controlled by the buffer 6 to the potential at the voltage dividing point 9. Therefore, if an overvoltage (a voltage superimposed on the voltage of the DC voltage source 21 on the voltage generated in the wiring inductance 23) is applied to the collector voltage and the gate voltage exceeds the threshold value, the impedance of the IGBT decreases and the collector voltage is reduced. Although the voltage is clamped, the potential of the voltage dividing point 9 increases in proportion to the collector voltage of the IGBT regardless of the collector voltage dv / dt. Therefore, the collector voltage clamping is performed in accordance with the collector voltage dv / dt. This is done by the potential of the no voltage dividing point 9. This means that the clamp voltage level of the collector of the IGBT is kept constant. If Cch >> Ch, the capacitor 5 is ignored regardless of the parasitic capacitance value variation of the high-voltage side resistor 3.
And the capacity of the capacitor 51 can be set.

FIG. 7 shows a fourth embodiment of the present invention.
In the first to third embodiments, the arms are configured by one series of IGBTs, whereas the present embodiment is characterized in that the IGBTs are connected in multiple series. It is assumed that IGBT elements having differences in element characteristics such as gate capacitance are connected in series. For example, in a device having a small gate capacitance, the timing at which the collector voltage rises at turn-off is earlier than in other devices. If the turn-off timing is earlier, the impedance increases at a faster rate than the other elements, so that the DC voltage is more greatly shouldered, and the collector voltage rises sharply compared to turn-off in one series. It may destroy the element. However, in the circuit system of the present embodiment, even if the dv / dt of the collector voltage is large, the clamp level of the collector voltage is constant.
The voltage sharing between the IGBTs connected in series is equalized. Thereby, destruction of the element can be prevented.

As described above, the IGBT 1 according to the embodiment of the present invention
However, it is needless to say that the same effect can be obtained by replacing the device with a device such as a power MOSFET that controls on / off by a voltage applied to a MOS gate.

[0015]

As described above, according to the present invention,
Since the collector voltage clamp level can be kept constant regardless of the collector voltage dv / dt of the IGBT (including other MOS gate devices such as a power MOSFET), the collector voltage of the IGBT is increased more than necessary as in the related art. IGBT is not reduced, and the loss of the IGBT can be reduced. Further, when the arm configuration of the power converter is a multi-series connection of IGBTs, even if the dv / dt of the collector voltage is large, the clamp level of the collector voltage is constant. And destruction of the element can be prevented.

[Brief description of the drawings]

FIG. 1 is a first embodiment of a semiconductor power conversion device according to the present invention.

FIG. 2 is a main part of one arm of a conventional power converter.

FIG. 3 is a main part of a power converter to which the present invention is applied.

FIG. 4 is a collector, gate voltage waveform and a voltage waveform at a voltage dividing point of the IGBT of the present invention.

FIG. 5 shows a second embodiment of the present invention.

FIG. 6 shows a third embodiment of the present invention.

FIG. 7 shows a fourth embodiment of the present invention.

FIG. 8 is an explanatory diagram of the first embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... IGBT, 2 ... Reflux diode, 3 ... High-voltage side voltage dividing resistor, 4 ... Low-voltage side voltage dividing resistor, 5 ... Capacitor element, 51 ...
Capacitor element, 6 buffer circuit, 7 on / off pulse generator, 8 gate resistance, 9 voltage dividing point, 13 power supply for on / off pulse generator, 13N negative potential wiring in gate circuit, 20 arm, 21 DC voltage source, 22: Inductance load, 23: Parasitic inductance

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Hiromitsu Sakai 1-1-1, Kokubuncho, Hitachi City, Ibaraki Prefecture F-term in the Electric Systems Division, Hitachi, Ltd. (Reference) 5H006 CA01 CC02 DB03 FA01 5H007 AA03 CA01 CC07 DB03 DB09 FA01 FA13 FA20 5H740 AA06 BB01 BB07 BB08 HH03 HH05 KK01 MM03

Claims (7)

[Claims] A circuit for dividing a voltage between a collector and an emitter of the IGBT or a wiring having a constant potential difference between the collector and the emitter of the IGBT with at least two or more resistors; IGB to the potential of
In a semiconductor power converter having a function of protecting an IGBT from application of an overvoltage to a collector by controlling a gate potential of T, a capacitor is connected in parallel to a resistor on the low voltage side from the voltage dividing point. Semiconductor power converter. 2. The method according to claim 1, wherein the ratio of the impedance of the voltage dividing circuit on the high voltage side of the voltage dividing point to the impedance of the voltage dividing circuit on the low voltage side of the voltage dividing point is substantially independent of the voltage fluctuation rate of the collector voltage. A semiconductor power conversion device characterized by being constant. 3. The capacitor according to claim 1, comprising a resistance value component of a resistor higher than the voltage dividing point and a parasitic capacitance component thereof.
A semiconductor power conversion device, wherein an R time constant is substantially equal to a CR time constant of a resistor connected in parallel with the resistor from the voltage dividing point to a resistor lower than the voltage dividing point. 4. A circuit for dividing a voltage between a collector and an emitter of an IGBT or a wiring having a fixed potential difference between the collector and the emitter of the IGBT by at least two or more resistors. IGB to the potential of
In a semiconductor power conversion device having a function of protecting an IGBT from overvoltage application to a collector by controlling a gate potential of T, a capacitor is provided in parallel with each of a resistor on a low voltage side and a resistor on a high voltage side from the voltage dividing point. And the ratio of the impedance of the voltage dividing circuit on the higher voltage side than the voltage dividing point to the impedance of the voltage dividing circuit on the lower voltage side than the voltage dividing point is substantially constant irrespective of the voltage fluctuation rate of the collector voltage. Semiconductor power converter. 5. A circuit structure for dividing a voltage between a collector and an emitter of an IGBT or between wirings having a certain potential difference with respect to a collector and an emitter of the IGBT by at least two or more resistors. IGB to the potential of
In a semiconductor power conversion device having a function of protecting an IGBT from overvoltage application to a collector by controlling a gate potential of T, a capacitor is provided in parallel with each of a resistor on a low voltage side and a resistor on a high voltage side from the voltage dividing point. And the CR time constant of the resistor on the high voltage side from the voltage dividing point and the CR time constant of the capacitor connected in parallel to the high voltage side resistor is approximately equal to the CR time constant of the resistor and the capacitor on the low voltage side from the voltage dividing point. A semiconductor power conversion device characterized by being equal. 6. The semiconductor power conversion device according to claim 1, wherein the IGBT is connected to one arm of the power converter in multiple series. 7. The semiconductor power conversion device according to claim 1, wherein the IGBT is replaced with another MOS gate device.