JP3381593B2 - How to mount electronic components with bumps - Google Patents
How to mount electronic components with bumpsInfo
- Publication number
- JP3381593B2 JP3381593B2 JP35262397A JP35262397A JP3381593B2 JP 3381593 B2 JP3381593 B2 JP 3381593B2 JP 35262397 A JP35262397 A JP 35262397A JP 35262397 A JP35262397 A JP 35262397A JP 3381593 B2 JP3381593 B2 JP 3381593B2
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- substrate
- solder
- bump
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Abstract
Description
【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は、フリップチップな
どのバンプ付電子部品を基板に実装するバンプ付電子部
品の実装方法に関するものである。
【０００２】
【従来の技術】電子部品を基板の回路パターンの電極に
半田付けして実装する方法として、予め電子部品の電極
上に半田バンプを形成してバンプ付電子部品とし、この
半田バンプを基板の電極に半田接合する方法が知られて
いる。半田接合に際しては、予め半田バンプまたは基板
の電極上にフラックスを塗布した後、半田バンプを電極
上に搭載し、半田を加熱溶融させることによって半田バ
ンプと電極とを接合することが行われる。そして半田接
合後には、実装後の信頼性を確保するためフラックスの
残さを除去する洗浄が行われ、その後電子部品と基板と
の隙間には、接合部を補強する目的でアンダーフィル樹
脂が充填され、このアンダーフィル樹脂を熱処理によっ
て硬化させて実装が完了する。
【０００３】
【発明が解決しようとする課題】しかしながら、上記バ
ンプ付電子部品の実装工程では、電子部品の小型化に伴
って以下に述べるような問題点が生じてきている。ま
ず、半田接合後の洗浄工程は、従来多用されていたフロ
ンなどの溶剤による洗浄方法が規制されたことから複雑
化、高コスト化し、電子部品の小型化と相まって、技術
的にも困難なものとなっている。また、アンダーフィル
樹脂については、電子部品の小型化により電子部品と基
板の隙間が小さくなって電子部品搭載後の樹脂充填が困
難となり、実装後の品質が安定しないという品質上の問
題点とともに、同一部品の実装に半田接合と樹脂の硬化
のための熱処理の２つの加熱工程を必要とし、工程を複
雑化する要因となっていた。
【０００４】このように従来のバンプ付電子部品の実装
方法は、フラックスの使用とアンダーフィル樹脂の充填
のために工程が複雑化し、品質の安定した実装を低コス
トで行うことが困難であるという問題点があった。
【０００５】そこで本発明は、フラックスの使用を必要
とせず、品質の安定した低コストのバンプ付電子部品の
実装方法を提供することを目的とする。
【０００６】
【課題を解決するための手段】本発明のバンプ付電子部
品の実装方法は、基板の銅電極上にニッケルのバリア層
を形成し、このバリア層上に金膜を形成する工程と、こ
の金膜上に半田より硬質の金属の突出部を形成する工程
と、前記基板への電子部品の搭載に先立って前記突出部
上に熱硬化性の接着材を塗布する工程と、半田バンプ付
の電子部品を前記基板に搭載し前記突出部に半田バンプ
を当接させる工程と、前記半田バンプを前記突出部に押
圧することにより半田バンプ表面の酸化膜を破壊する工
程と、前記接着材が熱硬化する前に半田バンプを溶融さ
せて前記突出部と接合する工程とを含む。
【０００７】本発明によれば、基板の電極上にニッケル
のバリア層を形成しこのバリア層の上に金膜を形成した
後、この金膜上に半田より硬質の金属の突起部を形成
し、この突起部を電子部品の半田バンプに押圧して半田
バンプの酸化膜を破壊することにより、フラックスを使
用せずに電子部品を基板に半田付けすることができる。
【０００８】
【発明の実施の形態】次に本発明の実施の形態を図面を
参照して説明する。図１（ａ），（ｂ），（ｃ）は本発
明の一実施の形態のバンプ付電子部品の実装方法の工程
説明図、図２、図３、図４は同バンプ付電子部品および
基板の部分断面図である。なお、各図はバンプ付電子部
品の実装方法を工程順に示すものである。
【０００９】図１（ａ）および図２において、基板１上
には電極２が形成されている。電極２は銅電極２ａ上に
バリア層としてのニッケル膜２ｂを形成し、ニッケル膜
２ｂ上に金膜２ｃを金めっきにより形成したものである
（図２参照）。金膜２ｃ上には半田より硬質の金属の突
出部である金バンプ３が形成されている。金バンプ３は
ワイヤボンディングにより形成され、テール部３ａを有
した形状となっている。
【００１０】次に図１（ｂ）に示すように、基板１上に
金バンプ３を覆ってボンド４が塗布される。ボンド４
は、半田の融点温度よりも高い硬化温度を有する熱硬化
性の接着材である（特開平６−１７７５２３号公報参
照）。次に、図１（ｃ）に示すように、基板１の電極２
上に圧着ツール９によりバンプ付き電子部品５が搭載さ
れる。バンプ付き電子部品５は、図１（ｃ）に示すよう
に電子部品５の電極６の表面にバリア層７を形成し、バ
リア層７上に半田バンプ８を形成したものである。この
バンプ付き電子部品５の半田バンプ８を基板１の電極２
に位置合わせして圧着ツール９を下降させ、半田バンプ
８の先端部を金バンプ３に対して押圧する。すると図２
に示すように、半田より硬い金属である金よりなる金バ
ンプ３のテール部３ａが半田バンプ８の先端部に埋入
し、このとき半田バンプ８の表面に生成した酸化膜８ａ
を部分的に破壊する。
【００１１】次に圧着ツール９により電子部品５を介し
て半田バンプ８を加熱する。加熱温度が半田の融点を超
えると、図３に示すように半田バンプ８は溶融して溶融
半田８’となる。ここでボンド４の硬化温度は半田の融
点温度よりも高いため、この時点ではボンド４は未硬化
であり、電子部品５を加熱しながら所定高さｈまで押圧
することを妨げない。これにより溶融半田８’は金バン
プ３の周囲を包み込み、金バンプ３との半田接合面を形
成する。
【００１２】このとき、金バンプ３の先端が半田バンプ
８の酸化膜８ａを部分的に破壊して半田の露出面が形成
されており、半田バンプ８の半田接合部はボンド４に完
全に包み込まれて大気から遮断され無酸素状態となって
いるため、フラックスを用いることなく金バンプ３との
半田接合を良好に行うことができる。また溶融半田８’
はフラックス無しでも酸化膜のない金バンプ８の表面や
電極２の表面の半田ぬれ性のよい金膜２ｃ上を伝わって
容易に拡がるため、強度上に優れた形状である鼓状の接
合部を形成することができる。
【００１３】このようにして拡がった溶融半田８’が基
板１の電極２の表面と接触することにより形成される接
合面では、表面の薄い金膜２ｃは半田中に拡散し、強度
に優れたニッケルと半田の合金より成る接合面が形成さ
れる。この接合面は金バンプ３と半田との接合部を効果
的に補強し、全体としてより信頼性の高い接合部を得る
ことができる。
【００１４】この後、加熱を継続することにより温度は
更に上昇し、図４に示すようにボンド４の硬化温度に到
達するとボンド４の熱硬化が開始する。そして所定の硬
化時間が経過することにより、電子部品５の基板１への
実装が完了する。
【００１５】このように、半田バンプ８を有する電子部
品５が実装される基板１に半田より硬い金属の突起部を
形成し、実装時には突起部で電子部品の半田バンプ８の
表面の酸化膜７ａを破壊することにより、フラックスを
使用することなく電子部品５を基板１に良好に半田付け
して実装することができる。また、アンダーフィル樹脂
としてのボンド４を電子部品５の搭載前に塗布すること
により、電子部品５と基板１の隙間は完全にボンド４に
よって充填され、接合部を確実に補強して実装後の品質
を安定させることができる。
【００１６】なお本実施の形態では、半田の融点温度よ
りも硬化温度が高いボンドを使用しているが、半田の融
点温度よりも硬化温度が低いボンドを使用してもよい。
この場合、ボンドが完全硬化する前に半田を融点温度以
上に加熱して溶融させ、溶融した半田のぬれ広がりを妨
げないようにするとよい。
【００１７】
【発明の効果】本発明は、基板の電極上にニッケルのバ
リア層を形成し、このバリア層に金膜を形成した後この
金膜上に半田より硬質の金属の突起部を形成し、この突
起部を電子部品の半田バンプに押圧して半田バンプの酸
化膜を破壊するようにしているので、フラックスを使用
することなく電子部品を基板に実装することができ、実
装後の洗浄を必要としない。また熱硬化性樹脂の接着材
を使用して電子部品を実装する以前に接着材を基板に塗
布するようにしているので、半田付けと接着材の熱硬化
を同一の加熱工程で行って工程を簡略化し低コストを実
現できるとともに、電子部品と基板の隙間が狭い場合で
もアンダーフィル樹脂としての接着材が完全に充填さ
れ、実装後の安定した品質を確保することができる。Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a method for mounting a bumped electronic component such as a flip chip on a substrate. 2. Description of the Related Art As a method of mounting an electronic component by soldering to an electrode of a circuit pattern on a substrate, a solder bump is formed on an electrode of the electronic component in advance to form a bumped electronic component. 2. Description of the Related Art A method of soldering to an electrode of a substrate is known. At the time of solder bonding, a flux is applied in advance on a solder bump or an electrode of a substrate, then the solder bump is mounted on the electrode, and the solder is heated and melted to join the solder bump and the electrode. After soldering, cleaning is performed to remove the residual flux to ensure reliability after mounting, and then the gap between the electronic component and the board is filled with underfill resin to reinforce the joint. The underfill resin is cured by heat treatment to complete the mounting. [0003] However, in the process of mounting the electronic component with bumps, the following problems have arisen with the miniaturization of the electronic component. First of all, the cleaning process after soldering is technically difficult, because the cleaning method using a solvent such as chlorofluorocarbon, which has been widely used in the past, has been complicated, the cost has been increased, and the size of electronic components has been reduced. It has become. As for the underfill resin, the gap between the electronic component and the board becomes smaller due to the miniaturization of the electronic component, making it difficult to fill the resin after mounting the electronic component, and the quality after mounting is not stable. The mounting of the same component requires two heating steps of soldering and heat treatment for curing the resin, which has become a factor complicating the steps. As described above, the conventional mounting method of the electronic component with bumps involves a complicated process due to the use of the flux and the filling of the underfill resin, and it is difficult to perform the mounting with stable quality at low cost. There was a problem. SUMMARY OF THE INVENTION It is an object of the present invention to provide a low-cost mounting method of a low-cost electronic component with bumps, which does not require the use of a flux. A method for mounting an electronic component with bumps according to the present invention comprises the steps of forming a nickel barrier layer on a copper electrode of a substrate and forming a gold film on the barrier layer. Forming a protruding portion of a metal harder than solder on the gold film; applying a thermosetting adhesive on the protruding portion prior to mounting the electronic component on the substrate; Mounting the attached electronic component on the substrate and bringing the solder bump into contact with the projecting portion; pressing the solder bump against the projecting portion to destroy an oxide film on the surface of the solder bump; Melting the solder bumps prior to thermosetting and joining the solder bumps to the protrusions. According to the present invention, a nickel barrier layer is formed on an electrode of a substrate, a gold film is formed on the barrier layer, and a metal protrusion harder than solder is formed on the gold film. By pressing the projection against the solder bump of the electronic component to break the oxide film of the solder bump, the electronic component can be soldered to the substrate without using a flux. Next, an embodiment of the present invention will be described with reference to the drawings. 1 (a), 1 (b) and 1 (c) are process explanatory views of a method of mounting an electronic component with bumps according to an embodiment of the present invention, and FIGS. 2, 3 and 4 are electronic component and substrate with bumps. FIG. Each drawing shows a method of mounting the electronic component with bumps in the order of steps. In FIGS. 1A and 2, an electrode 2 is formed on a substrate 1. The electrode 2 is obtained by forming a nickel film 2b as a barrier layer on a copper electrode 2a and forming a gold film 2c on the nickel film 2b by gold plating (see FIG. 2). On the gold film 2c, a gold bump 3 which is a protrusion of a metal harder than solder is formed. The gold bump 3 is formed by wire bonding and has a shape having a tail portion 3a. Next, as shown in FIG. 1B, a bond 4 is applied on the substrate 1 so as to cover the gold bump 3. Bond 4
Is a thermosetting adhesive having a curing temperature higher than the melting point of the solder (see JP-A-6-177523). Next, as shown in FIG.
The electronic component 5 with bumps is mounted thereon by the crimping tool 9. The bumped electronic component 5 has a structure in which a barrier layer 7 is formed on the surface of an electrode 6 of the electronic component 5 and a solder bump 8 is formed on the barrier layer 7 as shown in FIG. The solder bumps 8 of the electronic component 5 with bumps are connected to the electrodes 2 of the substrate 1.
Then, the crimping tool 9 is lowered and the tip of the solder bump 8 is pressed against the gold bump 3. Then Figure 2
As shown in FIG. 3, the tail portion 3a of the gold bump 3 made of gold, which is a metal harder than solder, is embedded in the tip of the solder bump 8, and the oxide film 8a formed on the surface of the solder bump 8 at this time.
Partially destroyed. Next, the solder bump 8 is heated by the crimping tool 9 via the electronic component 5. When the heating temperature exceeds the melting point of the solder, the solder bump 8 is melted and becomes a molten solder 8 'as shown in FIG. Here, since the curing temperature of the bond 4 is higher than the melting point temperature of the solder, the bond 4 is uncured at this point, and does not prevent the electronic component 5 from being pressed to the predetermined height h while being heated. Thus, the molten solder 8 ′ wraps around the gold bump 3 and forms a solder joint surface with the gold bump 3. At this time, the tip of the gold bump 3 partially breaks the oxide film 8a of the solder bump 8 to form an exposed surface of the solder, and the solder joint of the solder bump 8 is completely wrapped in the bond 4. As a result, since it is cut off from the atmosphere and is in an oxygen-free state, the solder bonding with the gold bump 3 can be favorably performed without using a flux. In addition, molten solder 8 '
Can easily spread along the surface of the gold bump 8 without an oxide film or the gold film 2c having good solder wettability on the surface of the electrode 2 without flux, so that a drum-shaped joint having a shape excellent in strength can be formed. Can be formed. On the bonding surface formed by the contact of the molten solder 8 'thus spread with the surface of the electrode 2 of the substrate 1, the thin gold film 2c on the surface is diffused into the solder and has excellent strength. A bonding surface made of an alloy of nickel and solder is formed. This joint surface effectively reinforces the joint between the gold bump 3 and the solder, and a joint with higher reliability as a whole can be obtained. Thereafter, the temperature is further increased by continuing the heating, and when the curing temperature of the bond 4 is reached as shown in FIG. When the predetermined curing time has elapsed, the mounting of the electronic component 5 on the substrate 1 is completed. As described above, a metal projection harder than solder is formed on the substrate 1 on which the electronic component 5 having the solder bump 8 is mounted, and the oxide film 7a on the surface of the solder bump 8 of the electronic component is formed by the projection at the time of mounting. Is broken, and the electronic component 5 can be favorably soldered and mounted on the substrate 1 without using a flux. In addition, by applying the bond 4 as an underfill resin before mounting the electronic component 5, the gap between the electronic component 5 and the substrate 1 is completely filled with the bond 4, and the bonding portion is reliably reinforced and mounted. Quality can be stabilized. In this embodiment, a bond whose curing temperature is higher than the melting point of solder is used, but a bond whose curing temperature is lower than the melting point of solder may be used.
In this case, it is preferable that the solder is heated to a temperature equal to or higher than the melting point and melted before the bond is completely cured so as not to hinder the spread of the molten solder. According to the present invention, a nickel barrier layer is formed on an electrode of a substrate, a gold film is formed on the barrier layer, and a metal protrusion harder than solder is formed on the gold film. Since the projections are pressed against the solder bumps of the electronic component to break the oxide film of the solder bumps, the electronic component can be mounted on the substrate without using a flux, and the post-mounting cleaning is performed. Do not need. Also, since the adhesive is applied to the board before mounting the electronic components using the thermosetting resin adhesive, the soldering and the thermosetting of the adhesive are performed in the same heating step, and the process is performed. Simplification and low cost can be realized, and even when the gap between the electronic component and the substrate is narrow, the adhesive as the underfill resin is completely filled, and stable quality after mounting can be ensured.
【図面の簡単な説明】
【図１】（ａ）本発明の一実施の形態のバンプ付電子部
品の実装方法の工程説明図
（ｂ）本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図
（ｃ）本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図
【図２】本発明の一実施の形態のバンプ付電子部品およ
び基板の部分断面図
【図３】本発明の一実施の形態のバンプ付電子部品およ
び基板の部分断面図
【図４】本発明の一実施の形態のバンプ付電子部品およ
び基板の部分断面図
【符号の説明】
１ 基板
２ 電極
２ａ 銅電極
２ｂ ニッケル膜
２ｃ 金膜
３ 金バンプ
４ ボンド
５ バンプ付電子部品
８ 半田バンプ
８ａ 酸化膜
９ 圧着ツールBRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 (a) Process explanatory view of a mounting method of a bumped electronic component according to one embodiment of the present invention (b) Mounting of a bumped electronic component according to one embodiment of the present invention FIG. 2 (c) is a process explanatory view of a method of mounting an electronic component with bumps according to an embodiment of the present invention. FIG. 2 is a partial cross-sectional view of an electronic component with bumps and a substrate according to an embodiment of the present invention. FIG. 3 is a partial cross-sectional view of an electronic component with a bump and a substrate according to one embodiment of the present invention. FIG. 4 is a partial cross-sectional view of an electronic component with a bump and a substrate according to one embodiment of the present invention. 2 electrode 2a copper electrode 2b nickel film 2c gold film 3 gold bump 4 bond 5 electronic component with bump 8 solder bump 8a oxide film 9 crimping tool
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平９−260421（ＪＰ，Ａ) 特開 平９−270443（ＪＰ，Ａ) 特開 平10−270498（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/60 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-9-260421 (JP, A) JP-A-9-270443 (JP, A) JP-A 10-270498 (JP, A) (58) Field (Int.Cl. 7 , DB name) H01L 21/60
Claims (1)
成し、このバリア層上に金膜を形成する工程と、この金
膜上に半田より硬質の金属の突出部を形成する工程と、
前記基板への電子部品の搭載に先立って前記突出部上に
熱硬化性の接着材を塗布する工程と、半田バンプ付の電
子部品を前記基板に搭載し前記突出部に半田バンプを当
接させる工程と、前記半田バンプを前記突出部に押圧す
ることにより半田バンプ表面の酸化膜を破壊する工程
と、前記接着材が熱硬化する前に半田バンプを溶融させ
て前記突出部と接合する工程とを含むことを特徴とする
バンプ付電子部品の実装方法。(57) [Claim 1] A step of forming a nickel barrier layer on a copper electrode of a substrate and forming a gold film on the barrier layer; Forming a metal protrusion;
A step of applying a thermosetting adhesive on the protruding portion prior to mounting the electronic component on the substrate; and mounting an electronic component with a solder bump on the substrate and bringing the solder bump into contact with the protruding portion. And a step of breaking the oxide film on the surface of the solder bump by pressing the solder bump against the protrusion, and a step of melting the solder bump before the adhesive material is thermally cured and joining the solder bump to the protrusion. A method of mounting an electronic component with bumps, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35262397A JP3381593B2 (en) | 1997-12-22 | 1997-12-22 | How to mount electronic components with bumps |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35262397A JP3381593B2 (en) | 1997-12-22 | 1997-12-22 | How to mount electronic components with bumps |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11186324A JPH11186324A (en) | 1999-07-09 |
| JP3381593B2 true JP3381593B2 (en) | 2003-03-04 |
Family
ID=18425316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35262397A Expired - Lifetime JP3381593B2 (en) | 1997-12-22 | 1997-12-22 | How to mount electronic components with bumps |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3381593B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008135481A (en) * | 2006-11-27 | 2008-06-12 | Matsushita Electric Works Ltd | Electronic device and its manufacturing method |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100345035B1 (en) * | 1999-11-06 | 2002-07-24 | 한국과학기술원 | The Method for Preparation of Flip chip Bump and UBM for High speed Copper Interconnect Chip Using Electroless Plating Method |
| DE60141391D1 (en) * | 2000-03-10 | 2010-04-08 | Chippac Inc | Flip-chip connection structure and its manufacturing method |
| US10388626B2 (en) | 2000-03-10 | 2019-08-20 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming flipchip interconnect structure |
| JP2001338947A (en) * | 2000-05-26 | 2001-12-07 | Nec Corp | Flip chip type semiconductor device and its manufacturing method |
| JP3922882B2 (en) * | 2000-12-28 | 2007-05-30 | 東レエンジニアリング株式会社 | Chip mounting method |
| JP2004140169A (en) | 2002-10-17 | 2004-05-13 | Rohm Co Ltd | Packaged semiconductor device |
| KR102007780B1 (en) | 2012-07-31 | 2019-10-21 | 삼성전자주식회사 | Methods for fabricating semiconductor devices having multi-bump structural electrical interconnections |
| FR3003688B1 (en) * | 2013-03-22 | 2016-07-01 | Commissariat Energie Atomique | FLIP CHIP ASSEMBLY METHOD COMPRISING THE PRE-COATING OF INTERCONNECTING ELEMENTS |
-
1997
- 1997-12-22 JP JP35262397A patent/JP3381593B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008135481A (en) * | 2006-11-27 | 2008-06-12 | Matsushita Electric Works Ltd | Electronic device and its manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11186324A (en) | 1999-07-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3381601B2 (en) | How to mount electronic components with bumps | |
| JP5066935B2 (en) | Method for manufacturing electronic component and electronic device | |
| JP2000114301A (en) | Formation of solder bump and method for forming the solder bump | |
| JP3381593B2 (en) | How to mount electronic components with bumps | |
| JP2001332583A (en) | Method of mounting semiconductor chip | |
| JP2000349194A (en) | Semiconductor device and its manufacture | |
| US6998293B2 (en) | Flip-chip bonding method | |
| KR20020044577A (en) | Advanced flip-chip join package | |
| JP2000174059A (en) | Method of mounting electronic component | |
| JP3570229B2 (en) | Solder joining method and thermosetting resin for solder joining | |
| JP2008288490A (en) | Process for producing built-in chip substrate | |
| JP4200273B2 (en) | Mounting board manufacturing method | |
| JP2574369B2 (en) | Semiconductor chip mounted body and mounting method thereof | |
| JP3482840B2 (en) | Method for manufacturing semiconductor device | |
| JP3417281B2 (en) | How to mount electronic components with bumps | |
| JP3705152B2 (en) | Method of forming solder bump | |
| JP2830824B2 (en) | Mounting method and mounting structure of work with bump | |
| JP3539177B2 (en) | Electronic component mounting method | |
| JP2002171055A (en) | Electronic circuit board, electronic component, electronic circuit device and manufacturing method of them | |
| JP3894095B2 (en) | Electronic component mounting method | |
| JP3078781B2 (en) | Semiconductor device manufacturing method and semiconductor device | |
| JPH10144850A (en) | Connecting pin and mounting method of substrate | |
| JP2004253598A (en) | Method for packaging electronic component | |
| JP3493999B2 (en) | Solder bump forming method and solder bump mounting method | |
| JP3367416B2 (en) | Solder bump forming method, solder bump mounting method, and solder joint structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20071220 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081220 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091220 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091220 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101220 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101220 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111220 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111220 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121220 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121220 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131220 Year of fee payment: 11 |
|
| EXPY | Cancellation because of completion of term |