JP3417281B2 - How to mount electronic components with bumps - Google Patents

How to mount electronic components with bumps

Info

Publication number
JP3417281B2
JP3417281B2 JP00201598A JP201598A JP3417281B2 JP 3417281 B2 JP3417281 B2 JP 3417281B2 JP 00201598 A JP00201598 A JP 00201598A JP 201598 A JP201598 A JP 201598A JP 3417281 B2 JP3417281 B2 JP 3417281B2
Authority
JP
Japan
Prior art keywords
bumps
electronic component
bond
solder
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP00201598A
Other languages
Japanese (ja)
Other versions
JPH11204568A (en
Inventor
誠一 吉永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP00201598A priority Critical patent/JP3417281B2/en
Publication of JPH11204568A publication Critical patent/JPH11204568A/en
Application granted granted Critical
Publication of JP3417281B2 publication Critical patent/JP3417281B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、フリップチップな
どのバンプ付電子部品を基板に実装するバンプ付電子部
品の実装方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bump electronic component mounting method for mounting a bump electronic component such as a flip chip on a substrate.

【0002】[0002]

【従来の技術】電子部品を基板に実装する方法として、
フリップチップなど電子部品に突設されたバンプを基板
の電極に接合する方法が知られている。バンプとしては
半田が多用され、実装時に加熱されることにより半田が
溶融し、基板の電極に半田付けされる。また、電子部品
と基板の隙間はアンダーフィル樹脂で封止され、半田接
合部を包み込んで補強するとともに異物の侵入を防ぐ。
このアンダーフィル樹脂には、エポキシなどの熱硬化性
樹脂が用いられる。
2. Description of the Related Art As a method of mounting electronic parts on a board,
A method is known in which bumps protruding from an electronic component such as a flip chip are bonded to electrodes on a substrate. Solder is often used as the bump, and the solder is melted by being heated at the time of mounting and soldered to the electrode of the substrate. Further, the gap between the electronic component and the substrate is sealed with an underfill resin to wrap and reinforce the solder joint portion and prevent foreign matter from entering.
A thermosetting resin such as epoxy is used as the underfill resin.

【0003】[0003]

【発明が解決しようとする課題】従来、半田バンプを電
極に接合する際には半田接合性を向上させるためフラッ
クスが用いられ、半田付け後には接合部の信頼性向上の
ためフラックスの残渣の除去を目的とする洗浄を行う必
要があった。しかしながら洗浄工程は有機溶剤の使用規
制や電子部品の小型化により複雑化し、高コストを要す
るものとなって来ている。そして樹脂封止はこの洗浄後
に行われるため、アンダーフィル樹脂を熱硬化させるた
めの加熱工程が必要とされており、すなわち同一部品の
実装に際して2回の加熱工程を必要としていた。このよ
うに、従来のバンプ付電子部品の実装方法は、高コスト
を必要とする複雑な工程を経る必要があり、生産性を向
上させることが困難であるという問題点があった。
Conventionally, when solder bumps are bonded to electrodes, flux is used to improve solder bondability, and after soldering, flux residue is removed to improve the reliability of the bond. It was necessary to perform the cleaning for the purpose. However, the cleaning process has become complicated due to restrictions on the use of organic solvents and miniaturization of electronic parts, and has become expensive. Since the resin sealing is performed after this cleaning, a heating step for thermosetting the underfill resin is required, that is, two heating steps are required for mounting the same component. As described above, the conventional method for mounting electronic components with bumps has a problem that it is difficult to improve productivity because it requires complicated steps that require high cost.

【0004】そこで本発明は、低コストで生産性を向上
させることができるバンプ付電子部品の実装方法を提供
することを目的とする。
Therefore, an object of the present invention is to provide a mounting method for bumped electronic components which can improve productivity at low cost.

【0005】[0005]

【課題を解決するための手段】請求項1記載のバンプ付
電子部品の実装方法は、半田バンプが形成されたバンプ
付電子部品を基板に搭載し、加熱することにより半田バ
ンプを溶融させて基板の電極に半田付けするとともにバ
ンプ付電子部品と基板の隙間を封止樹脂により封止する
バンプ付電子部品の実装方法であって、前記バンプ付電
子部品の半田バンプまたは前記基板の電極に、前記封止
樹脂の一部を構成し、エポキシ樹脂、半田の融点温度よ
りも高い融点温度の硬化剤および有機酸よりなる活性剤
を含有して活性作用を有する第1のボンドを塗布する工
程と、第1のボンド塗布後に前記バンプ付き電子部品を
前記基板上に搭載する工程と、前記封止樹脂を構成し、
エポキシ樹脂および半田の融点温度より高い融点温度の
硬化剤を含む第2のボンドを基板に搭載したバンプ付き
電子部品の側方に供給する工程と、加熱によって半田バ
ンプを溶融させ、次いで第1のボンドおよび第2のボン
ドを熱硬化させる工程とを含む。
According to a first aspect of the present invention, there is provided a method for mounting an electronic component having bumps, wherein the electronic component having bumps on which solder bumps are formed is mounted on a substrate and heated to melt the solder bumps. A method for mounting an electronic component with bumps, which is soldered to the electrodes of the electronic component with bumps and sealed with a sealing resin in a gap between the electronic component with bumps and a substrate, wherein the solder bumps of the electronic component with bumps or the electrodes of the substrate are: A step of forming a part of the sealing resin and applying a first bond having an activating effect by containing an epoxy resin, a curing agent having a melting point higher than that of the solder, and an activator made of an organic acid; A step of mounting the electronic component with bumps on the substrate after applying the first bond, and configuring the sealing resin,
A step of supplying a second bond containing a curing agent having a melting point temperature higher than that of the epoxy resin and the solder to the side of the bumped electronic component mounted on the substrate, and heating to melt the solder bump, and then the first step. Thermally curing the bond and the second bond.

【0006】請求項2記載のバンプ付電子部品の実装方
法は、半田バンプが形成されたバンプ付電子部品を基板
に搭載し、加熱することにより半田バンプを溶融させて
基板の電極に半田付けするとともにバンプ付電子部品と
基板の隙間を封止樹脂により封止するバンプ付電子部品
の実装方法であって、前記バンプ付電子部品の半田バン
プまたは前記基板の電極に、前記封止樹脂の一部を構成
し、エポキシ樹脂、半田の融点温度よりも高い融点温度
の硬化剤および有機酸よりなる活性剤を含有して活性作
用を有する第1のボンドを塗布する工程と、前記封止樹
脂を構成し、エポキシ樹脂および半田の融点温度より高
い融点温度の硬化剤を含む第2のボンドを基板上に供給
する工程と、第2のボンド供給後に前記バンプ付き電子
部品を前記基板上に搭載する工程と、加熱によって半田
バンプを溶融させ、次いで第1のボンドおよび第2のボ
ンドを熱硬化させる工程とを含む。
According to a second aspect of the present invention, there is provided a method for mounting an electronic component with bumps, wherein the electronic component with bumps having solder bumps is mounted on a substrate, and the solder bumps are melted by heating and soldered to electrodes on the substrate. A method of mounting an electronic component with bumps, which comprises sealing a gap between an electronic component with bumps and a substrate with a sealing resin, wherein a part of the sealing resin is applied to a solder bump of the electronic component with bumps or an electrode of the substrate. And a first bond containing an epoxy resin, a curing agent having a melting point temperature higher than the melting point temperature of solder and an activator consisting of an organic acid, and having an active action, and the encapsulating resin. Then, a step of supplying a second bond containing a curing agent having a melting point temperature higher than the melting points of the epoxy resin and the solder onto the substrate, and the electronic component with bumps on the substrate after the second bond is supplied. Comprising a step of mounting, the solder bumps are melted by heating, then a step of the first bond and the second bond is thermally cured.

【0007】各請求項記載の発明によれば、半田融点よ
り高い温度で硬化を開始しかつ活性作用を有する第1の
ボンドを半田接合部に塗布し、さらに封止樹脂を構成す
る第2のボンドを塗布した後にバンプ付き電子部品を加
熱して半田接合することにより、半田接合後には第1の
ボンド中の活性成分は第1のボンドのエポキシ樹脂と反
応することにより活性力を失い、第2のボンドに取り込
まれて硬化する。したがって、実装後の洗浄工程を必要
とせず、また半田付けと封止樹脂の熱硬化を同一の加熱
工程で行うことができる。
According to the invention described in each claim, the first bond which starts curing at a temperature higher than the melting point of the solder and has an active action is applied to the solder joint portion, and further the second resin which constitutes the sealing resin is formed. After applying the bond, the bumped electronic component is heated to be solder-bonded. After the solder-bonding, the active component in the first bond reacts with the epoxy resin of the first bond to lose its activity. It is taken into the 2nd bond and hardened. Therefore, a cleaning process after mounting is not required, and soldering and thermosetting of the sealing resin can be performed in the same heating process.

【0008】[0008]

【発明の実施の形態】次に本発明の実施の形態を図面を
参照して説明する。図1(a),(b),(c)、図2
(a),(b),(c),(d)は本発明の一実施の形
態のバンプ付電子部品の実装方法の工程説明図、図3は
同バンプ付電子部品の実装方法の加熱プロファイルであ
る。図1(a),(b),(c)、図2(a),
(b),(c),(d)はバンプ付電子部品の実装方法
を工程順に示すものである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. 1 (a), (b), (c), FIG.
(A), (b), (c), (d) is a process explanatory view of the mounting method of the bumped electronic component of one embodiment of the present invention, and FIG. 3 is a heating profile of the mounting method of the bumped electronic component. Is. 1 (a), (b), (c), FIG. 2 (a),
(B), (c) and (d) show a method of mounting the bumped electronic component in the order of steps.

【0009】図1(a)において、バンプ付電子部品1
は半田バンプ2を有しており、バンプ付電子部品1は圧
着ツール3によって保持されている。圧着ツール3の下
方にはボンド槽4が配置されており、ボンド槽4の底面
には第1のボンド5がスキージ6により塗布されてい
る。
In FIG. 1A, an electronic component 1 with bumps is provided.
Has solder bumps 2, and the bumped electronic component 1 is held by a crimping tool 3. A bond tank 4 is arranged below the pressure bonding tool 3, and a first bond 5 is applied to the bottom surface of the bond tank 4 by a squeegee 6.

【0010】ここで第1のボンド5について説明する。
第1のボンド5は、樹脂封止に用いられるエポキシ樹脂
に、半田接合時の接合性を向上させるために用いられる
フラックスの機能を併せて備えるようにしたものであ
る。第1のボンド5の組成の例としては、エポキシ樹脂
(約40%)、非結晶系のロジン(約40%)、ジカル
ボン酸などの有機酸よりなる活性剤兼硬化剤(約10
%)および硬化剤(約10%)となっている。ここで、
硬化剤の融点温度、すなわち第1のボンド5の硬化開始
温度は200±10℃であり、半田の融点温度より高い
ものとなっている。非結晶系のロジンは、第1のボンド
5による電子部品1の仮止力(タック力)を増すために
加えられるものであり、基板が搬送等で振動しても電子
部品1が位置ずれしないようにしている。
Here, the first bond 5 will be described.
The first bond 5 is provided with an epoxy resin used for resin encapsulation and a function of a flux used to improve the bondability at the time of soldering. Examples of the composition of the first bond 5 include an epoxy resin (about 40%), an amorphous rosin (about 40%), and an activator / curing agent (about 10%) made of an organic acid such as dicarboxylic acid.
%) And a curing agent (about 10%). here,
The melting point temperature of the curing agent, that is, the curing start temperature of the first bond 5 is 200 ± 10 ° C., which is higher than the melting point temperature of the solder. The amorphous rosin is added to increase the temporary fixing force (tacking force) of the electronic component 1 due to the first bond 5, and the electronic component 1 will not be displaced even if the substrate vibrates during transportation. I am trying.

【0011】圧着ツール3を下降させてバンプ付電子部
品1の半田バンプ2をボンド槽4の底面に当接させた後
に圧着ツール3を上昇させると、図1(b)に示すよう
に半田バンプ2の下端部に第1のボンド5が転写により
塗布される。第1のボンド5を塗布する方法としては、
バンプ2への転写以外にも、基板7の電極8にディスペ
ンサで吐出する方法、スクリーンマスクによる印刷また
はピン転写などの方法を用いることもできる。
When the crimping tool 3 is lowered to bring the solder bumps 2 of the electronic component with bumps 1 into contact with the bottom surface of the bonding bath 4, the crimping tool 3 is lifted, as shown in FIG. 1 (b). The first bond 5 is applied to the lower end of 2 by transfer. As a method of applying the first bond 5,
In addition to the transfer to the bumps 2, it is also possible to use a method in which the electrodes 8 of the substrate 7 are ejected by a dispenser, a method using a screen mask or a method such as pin transfer.

【0012】次いで圧着ツール3を移動させ基板7上に
位置させて、バンプ付電子部品1の半田バンプ2を基板
7の電極8に位置合せする。その後圧着ツール3を下降
させることにより、図1(c)に示すようにバンプ付電
子部品1を基板7に搭載する。この後、図2(a)に示
すように、第2のボンド9をディスペンサ10により基
板7の上面の電子部品1の周囲に塗布して供給する。供
給された第2のボンド9は、基板7と電子部品1との隙
間へ徐々に浸透する。
Next, the crimping tool 3 is moved and positioned on the substrate 7, and the solder bumps 2 of the bumped electronic component 1 are aligned with the electrodes 8 of the substrate 7. Thereafter, the crimping tool 3 is lowered to mount the bumped electronic component 1 on the substrate 7 as shown in FIG. After that, as shown in FIG. 2A, the second bond 9 is applied to the periphery of the electronic component 1 on the upper surface of the substrate 7 by the dispenser 10 and supplied. The supplied second bond 9 gradually penetrates into the gap between the substrate 7 and the electronic component 1.

【0013】第2のボンド9はエポキシ樹脂を主成分と
しており、硬化後は封止樹脂の一部を構成する。第2の
ボンド9は、第1のボンド5と同様に半田の融点温度よ
り高い融点温度の硬化剤を含んでいる。この第2のボン
ド9は、バンプ付電子部品1と基板2の間の隙間に充填
されるものであり、ディスペンサ10によって塗布され
る際にも出来るだけ隙間の内部に侵入しやすいようバン
プ付き電子部品1に接近して塗布される。
The second bond 9 has an epoxy resin as a main component, and constitutes a part of the sealing resin after curing. Like the first bond 5, the second bond 9 contains a curing agent having a melting point temperature higher than the melting point temperature of the solder. The second bond 9 fills the gap between the bumped electronic component 1 and the substrate 2, and when applied by the dispenser 10, the bumped electronic component is made to easily enter the gap. Applied close to part 1.

【0014】この後基板7はリフロー炉に送られ、全体
が加熱される。ここで図3を参照してリフロー加熱時の
温度の変化について説明する。図3の範囲Aに示すよう
に、リフロー工程では、加熱を開始してから温度が上昇
して半田の融点温度以下に設定された所定温度に到達す
ると、この所定温度が保持される。これによりバンプ付
電子部品1の周囲に供給された第2のボンド9の粘度が
低下し、表面張力によりバンプ付電子部品1と基板7の
間の隙間に更に浸透する。この結果、図2(b)に示す
ようにバンプ付電子部品1と基板7の間の隙間は、第2
のボンド9によって充填される。
After this, the substrate 7 is sent to a reflow furnace and the whole is heated. Here, the change in temperature during reflow heating will be described with reference to FIG. As shown in a range A of FIG. 3, in the reflow step, when the temperature rises after starting heating and reaches a predetermined temperature set below the melting point temperature of the solder, the predetermined temperature is maintained. As a result, the viscosity of the second bond 9 supplied around the bumped electronic component 1 is reduced, and the second bond 9 further penetrates into the gap between the bumped electronic component 1 and the substrate 7 due to surface tension. As a result, as shown in FIG. 2B, the gap between the bumped electronic component 1 and the substrate 7 is
Filled with bond 9 of.

【0015】この後、図3の範囲Bに示すように、加熱
温度を半田の融点温度(183℃)以上に上昇させる。
これにより、半田バンプ2が溶融し、溶融半田2’は基
板7の電極8に半田付けされる。このとき、半田バンプ
2の下端部には、ロジンや活性剤を含有する第1のボン
ド5が塗布されているので、半田バンプ2の表面の酸化
膜は還元され良好な半田付けを行うことができる。ま
た、第1のボンドには溶剤が含まれていないので、半田
接合部周囲での加熱による溶剤の発泡が発生せず、発泡
による接合不良が生じない。
After that, as shown in a range B of FIG. 3, the heating temperature is raised to the melting point temperature of the solder (183 ° C.) or higher.
As a result, the solder bumps 2 are melted and the molten solder 2 ′ is soldered to the electrodes 8 of the substrate 7. At this time, since the first bond 5 containing rosin and an activator is applied to the lower end portion of the solder bump 2, the oxide film on the surface of the solder bump 2 is reduced and good soldering can be performed. it can. In addition, since the first bond does not contain a solvent, the solvent does not foam around the solder joint portion due to heating, and a joint failure due to foaming does not occur.

【0016】この後、加熱温度は図3の範囲Cに示すよ
うに更に上昇し、第1のボンド5、第2のボンド9の硬
化開始温度(200±10℃)より高くなる。これによ
り第1のボンド5、第2のボンド9は熱硬化を開始し、
所定時間加熱を継続することにより第1のボンド5、第
2のボンド9は硬化して接合部を固定し、バンプ付電子
部品1の実装が完了する。
After that, the heating temperature further rises as shown in the range C of FIG. 3, and becomes higher than the curing start temperature (200 ± 10 ° C.) of the first bond 5 and the second bond 9. As a result, the first bond 5 and the second bond 9 start thermosetting,
By continuing the heating for a predetermined time, the first bond 5 and the second bond 9 are hardened to fix the bonding portion, and the mounting of the electronic component with bump 1 is completed.

【0017】ここで、半田バンプ2の電極8への半田付
け後には、第1のボンド5中のロジンや活性剤など、酸
化膜の還元に作用しなかった余分な活性成分は第1のボ
ンド5のエポキシ樹脂と反応することにより活性を失
い、電極7や基板1上面の配線回路面を腐食する作用を
失う。しかも第1のボンド5中のエポキシ樹脂と結合し
た状態で硬化する。したがって、通常のフラックスを使
用する場合に半田付け後に行われる洗浄を必要とせず
に、実装後の信頼性を確保することができる。
Here, after soldering the solder bumps 2 to the electrodes 8, extra active components such as rosin and activator in the first bond 5 that did not affect the reduction of the oxide film are in the first bond 5. When it reacts with the epoxy resin of No. 5, it loses its activity and loses the effect of corroding the electrode 7 and the wiring circuit surface of the upper surface of the substrate 1. Moreover, the epoxy resin in the first bond 5 is cured in a state of being bonded to the epoxy resin. Therefore, it is possible to secure reliability after mounting without requiring cleaning performed after soldering when using a normal flux.

【0018】また加熱工程として、半田付けと、アンダ
ーフィル樹脂としての第1のボンド5、第2のボンド9
の熱硬化を同一のリフロー工程で行うようにしているの
で、実装工程を簡略化することができる。さらにリフロ
ー炉による加熱を用いることにより、多数の電子部品を
一括して実装することができ、圧着ツールなどによる各
電子部品個別の実装方法と比較して、実装時の生産効率
を格段に向上させることができる。
As the heating step, soldering and the first bond 5 and the second bond 9 as the underfill resin are performed.
Since the heat curing is performed in the same reflow process, the mounting process can be simplified. Furthermore, by using heating with a reflow furnace, it is possible to mount a large number of electronic components at once, and significantly improve the production efficiency during mounting compared to the individual mounting method for each electronic component using a crimping tool. be able to.

【0019】本発明は上記実施の形態に限定されないの
であって、例えば上記実施例では、バンプ付電子部品1
の搭載後に第2のボンド9を供給するようにしている
が、予め基板7上に第2のボンド9を供給した後にバン
プ付き電子部品1を搭載するようにしてもよい。
The present invention is not limited to the above-mentioned embodiment. For example, in the above-mentioned embodiment, the bumped electronic component 1 is used.
Although the second bond 9 is supplied after mounting the electronic component 1, the bumped electronic component 1 may be mounted after the second bond 9 is supplied on the substrate 7 in advance.

【0020】[0020]

【発明の効果】本発明によれば、半田融点温度より高い
温度で硬化を開始しかつ活性作用を有する第1のボンド
を半田接合部に塗布し、さらに封止樹脂を構成する第2
のボンドを塗布した後にバンプ付き電子部品を加熱して
半田接合するようにしたので、半田接合後には第1のボ
ンド中の活性成分は第1のボンド中のエポキシ樹脂と反
応して活性を失い、したがって実装後の洗浄を必要とせ
ずに信頼性を確保することができる。また半田付けと封
止樹脂の熱硬化を同一のリフロー工程で行うようにして
いるので工程を簡略化するとともに多数の電子部品を一
括して加熱することができ、生産効率を向上させること
ができる。
According to the present invention, the first bond which starts the curing at a temperature higher than the melting point of the solder and has an active action is applied to the solder joint portion, and the second resin which constitutes the sealing resin.
Since the electronic component with bumps is heated to be solder-bonded after applying the bond, the active component in the first bond reacts with the epoxy resin in the first bond and loses its activity after solder bonding. Therefore, reliability can be ensured without requiring cleaning after mounting. Further, since the soldering and the thermosetting of the sealing resin are performed in the same reflow process, the process can be simplified and a large number of electronic components can be collectively heated, so that the production efficiency can be improved. .

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)本発明の一実施の形態のバンプ付電子部
品の実装方法の工程説明図 (b)本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図 (c)本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図
FIG. 1A is a process explanatory diagram of a mounting method for an electronic component with bumps according to an embodiment of the present invention. FIG. 1B is a process explanatory diagram of a mounting method for an electronic component with bumps according to an embodiment of the present invention. ) Process explanatory drawing of mounting method of electronic component with bump of one embodiment of the present invention

【図2】(a)本発明の一実施の形態のバンプ付電子部
品の実装方法の工程説明図 (b)本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図 (c)本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図 (d)本発明の一実施の形態のバンプ付電子部品の実装
方法の工程説明図
FIG. 2A is a process explanatory diagram of a mounting method for an electronic component with bumps according to an embodiment of the present invention. FIG. 2B is a process explanatory diagram of a mounting method for an electronic component with bumps according to an embodiment of the present invention. ) Process explanatory drawing of mounting method of bumped electronic component according to one embodiment of the present invention (d) Process explanatory drawing of mounting method of bumped electronic component according to one embodiment of the present invention

【図3】本発明の一実施の形態のバンプ付電子部品の実
装方法の加熱プロファイルを示す図
FIG. 3 is a diagram showing a heating profile of a mounting method for electronic components with bumps according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 バンプ付電子部品 2 半田バンプ 2’ 溶融半田 3 圧着ツール 5 第1のボンド 7 基板 8 電極 9 第2のボンド 1 Electronic components with bumps 2 Solder bump 2'molten solder 3 Crimping tool 5 First Bond 7 substrate 8 electrodes 9 Second Bond

フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 H01L 21/92 H05K 3/34 Front page continuation (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 21/60 H01L 21/92 H05K 3/34

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】半田バンプが形成されたバンプ付電子部品
を基板に搭載し、加熱することにより半田バンプを溶融
させて基板の電極に半田付けするとともにバンプ付電子
部品と基板の隙間を封止樹脂により封止するバンプ付電
子部品の実装方法であって、前記バンプ付電子部品の半
田バンプまたは前記基板の電極に、前記封止樹脂の一部
を構成し、エポキシ樹脂、半田の融点温度よりも高い融
点温度の硬化剤および有機酸よりなる活性剤を含有して
活性作用を有する第1のボンドを塗布する工程と、第1
のボンド塗布後に前記バンプ付き電子部品を前記基板上
に搭載する工程と、前記封止樹脂を構成し、エポキシ樹
脂および半田の融点温度より高い融点温度の硬化剤を含
む第2のボンドを基板に搭載したバンプ付き電子部品の
側方に供給する工程と、加熱によって半田バンプを溶融
させ、次いで第1のボンドおよび第2のボンドを熱硬化
させる工程とを含むことを特徴とするバンプ付電子部品
の実装方法。
1. An electronic component with bumps on which solder bumps are formed is mounted on a substrate, and the solder bumps are melted by heating and soldered to electrodes on the substrate, and a gap between the electronic component with bumps and the substrate is sealed. A method of mounting an electronic component with bumps sealed by a resin, wherein a part of the sealing resin is formed on a solder bump of the electronic component with bumps or an electrode of the substrate, and the melting point temperature of epoxy resin or solder A step of applying a first bond having an activating effect by containing a curing agent having a high melting point temperature and an activator composed of an organic acid;
Of mounting the electronic component with bumps on the substrate after applying the bond, and forming a second resin on the substrate, the second resin containing the curing agent having a melting point temperature higher than the melting point temperature of the epoxy resin and the solder. An electronic component with bumps, comprising: a step of laterally supplying the mounted electronic component with bumps; a step of melting the solder bumps by heating, and then thermosetting the first bond and the second bond. How to implement.
【請求項2】半田バンプが形成されたバンプ付電子部品
を基板に搭載し、加熱することにより半田バンプを溶融
させて基板の電極に半田付けするとともにバンプ付電子
部品と基板の隙間を封止樹脂により封止するバンプ付電
子部品の実装方法であって、前記バンプ付電子部品の半
田バンプまたは前記基板の電極に、前記封止樹脂の一部
を構成し、エポキシ樹脂、半田の融点温度よりも高い融
点温度の硬化剤および有機酸よりなる活性剤を含有して
活性作用を有する第1のボンドを塗布する工程と、前記
封止樹脂を構成し、エポキシ樹脂および半田の融点温度
より高い融点温度の硬化剤を含む第2のボンドを基板上
に供給する工程と、第2のボンド供給後に前記バンプ付
き電子部品を前記基板上に搭載する工程と、加熱によっ
て半田バンプを溶融させ、次いで第1のボンドおよび第
2のボンドを熱硬化させる工程とを含むことを特徴とす
るバンプ付電子部品の実装方法。
2. An electronic component with bumps on which solder bumps are formed is mounted on a substrate, and the solder bumps are melted by heating and soldered to electrodes on the substrate, and a gap between the electronic component with bumps and the substrate is sealed. A method of mounting an electronic component with bumps sealed by a resin, wherein a part of the sealing resin is formed on a solder bump of the electronic component with bumps or an electrode of the substrate, and the melting point temperature of epoxy resin or solder A step of applying a first bond having an active action by containing a curing agent having a high melting point temperature and an activator composed of an organic acid, and a melting point higher than the melting point temperatures of the epoxy resin and the solder constituting the sealing resin. A step of supplying a second bond containing a curing agent at a temperature onto the substrate, a step of mounting the electronic component with bumps on the board after the second bond is supplied, and a step of heating to melt the solder bump. It is allowed, then mounting method of the electronic component with bumps, which comprises a step of thermally curing the first bond and the second bond.
JP00201598A 1998-01-08 1998-01-08 How to mount electronic components with bumps Expired - Fee Related JP3417281B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP00201598A JP3417281B2 (en) 1998-01-08 1998-01-08 How to mount electronic components with bumps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP00201598A JP3417281B2 (en) 1998-01-08 1998-01-08 How to mount electronic components with bumps

Publications (2)

Publication Number Publication Date
JPH11204568A JPH11204568A (en) 1999-07-30
JP3417281B2 true JP3417281B2 (en) 2003-06-16

Family

ID=11517536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP00201598A Expired - Fee Related JP3417281B2 (en) 1998-01-08 1998-01-08 How to mount electronic components with bumps

Country Status (1)

Country Link
JP (1) JP3417281B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5503830B2 (en) * 2005-07-07 2014-05-28 積水化学工業株式会社 Epoxy adhesive composition and bonding method
WO2010122757A1 (en) 2009-04-24 2010-10-28 パナソニック株式会社 Method for mounting semiconductor package component, and structure having semiconductor package component mounted therein
WO2012160817A1 (en) * 2011-05-26 2012-11-29 パナソニック株式会社 Method for mounting electronic component, device for mounting electronic component, and system for mounting electronic component
JP6260814B2 (en) * 2011-06-02 2018-01-17 パナソニックIpマネジメント株式会社 Electronic component mounting method, electronic component mounting apparatus, and electronic component mounting system

Also Published As

Publication number Publication date
JPH11204568A (en) 1999-07-30

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