JP3493999B2 - Solder bump forming method and solder bump mounting method - Google Patents

Solder bump forming method and solder bump mounting method

Info

Publication number
JP3493999B2
JP3493999B2 JP06659198A JP6659198A JP3493999B2 JP 3493999 B2 JP3493999 B2 JP 3493999B2 JP 06659198 A JP06659198 A JP 06659198A JP 6659198 A JP6659198 A JP 6659198A JP 3493999 B2 JP3493999 B2 JP 3493999B2
Authority
JP
Japan
Prior art keywords
solder
circuit electrode
solder bump
bump
particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP06659198A
Other languages
Japanese (ja)
Other versions
JPH11266072A (en
Inventor
憲 前田
忠彦 境
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP06659198A priority Critical patent/JP3493999B2/en
Publication of JPH11266072A publication Critical patent/JPH11266072A/en
Application granted granted Critical
Publication of JP3493999B2 publication Critical patent/JP3493999B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品や基板の
回路電極上に半田バンプを形成する半田バンプの形成方
法および半田バンプを電子部品や基板に実装する半田バ
ンプの実装方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solder bump forming method for forming a solder bump on a circuit electrode of an electronic component or a substrate and a solder bump mounting method for mounting the solder bump on an electronic component or a substrate. .

【0002】[0002]

【従来の技術】電子部品の実装方法として半田バンプを
用いる方法が知られている。この方法は電子部品の回路
電極上に予め半田の突出電極である半田バンプを形成
し、この半田バンプを基板などの回路電極に半田接合す
るものである。半田バンプを形成する方法として、従来
より半田ボールを電子部品などの回路電極上に搭載する
方法が知られている。
2. Description of the Related Art A method using solder bumps is known as a method for mounting electronic components. In this method, solder bumps, which are protruding electrodes of solder, are previously formed on the circuit electrodes of the electronic component, and the solder bumps are solder-bonded to the circuit electrodes such as a substrate. As a method of forming a solder bump, a method of mounting a solder ball on a circuit electrode of an electronic component or the like has been conventionally known.

【0003】ところでCSP(Chip Size P
ackage)などでは、回路電極が形成される面と半
田バンプが形成される面が基板の同一面でない場合があ
る。すなわちパッケージを構成するテープ状の基板の片
側の面に回路電極が形成され、この回路電極が形成され
た面の反対側に半田ボールが搭載される。そしてこの半
田ボールを溶融させ、回路電極位置に設けられた基板の
貫通孔を介して溶融半田を回路電極に導通させて半田バ
ンプが形成される。ここで、電子部品の小型化に伴う回
路電極のファインピッチ化により前孔の貫通孔も小径化
し、搭載される半田ボールの径よりも小さい貫通孔を用
いる場合が増加している。
By the way, CSP (Chip Size P)
In some cases, the surface on which the circuit electrodes are formed and the surface on which the solder bumps are formed may not be the same surface of the substrate. That is, a circuit electrode is formed on one surface of a tape-shaped substrate that constitutes a package, and a solder ball is mounted on the opposite side of the surface on which the circuit electrode is formed. Then, the solder balls are melted, and the molten solder is conducted to the circuit electrodes through the through holes of the substrate provided at the circuit electrode positions to form solder bumps. Here, due to the fine pitch of the circuit electrodes accompanying the miniaturization of electronic components, the through holes of the front holes are also reduced in diameter, and the number of cases of using the through holes smaller than the diameter of the solder balls to be mounted is increasing.

【0004】以下、このような場合の従来の半田バンプ
形成方法について図面を参照して説明する。図3
(a),(b),(c)は従来のテープ状基板の部分断
面図である。図3(a)において、テープ状基板1の下
面には回路電極2が形成されている。基板1の回路電極
2の位置には貫通孔3が設けられており、貫通孔3内に
は30μm以下の粉径の半田粒子とフラックスの混合物
であるクリーム半田4が供給されている。この後、図3
(b)に示すように貫通孔3上には半田ボール5が搭載
される。ここで貫通孔3の径は半田ボール5の径よりも
小さく、したがって半田ボール5は貫通孔3の内部に完
全には入り込まず、半田ボール5と回路電極2の表面は
接触せず隙間が生じた形となっている。
A conventional solder bump forming method in such a case will be described below with reference to the drawings. Figure 3
(A), (b), (c) is a partial cross-sectional view of a conventional tape-shaped substrate. In FIG. 3A, the circuit electrode 2 is formed on the lower surface of the tape-shaped substrate 1. A through hole 3 is provided at the position of the circuit electrode 2 on the substrate 1, and cream solder 4, which is a mixture of solder particles having a powder diameter of 30 μm or less and flux, is supplied into the through hole 3. After this,
Solder balls 5 are mounted on the through holes 3 as shown in FIG. Here, the diameter of the through hole 3 is smaller than the diameter of the solder ball 5. Therefore, the solder ball 5 does not completely enter the inside of the through hole 3, and the solder ball 5 and the surface of the circuit electrode 2 do not come into contact with each other to form a gap. It has become a shape.

【0005】この後基板1をリフロー工程に送り加熱す
ることにより、クリーム半田4および半田ボール5が加
熱されて溶融し、半田ボール5およびクリーム半田4中
の半田粒子がそれぞれ溶融することによって生じる溶融
半田が一体化して回路電極2の表面に半田接合され半田
バンプが形成される。
After that, by feeding the substrate 1 to a reflow process and heating it, the cream solder 4 and the solder balls 5 are heated and melted, and the solder balls 5 and the solder particles in the cream solder 4 are melted by melting. The solder is integrated and solder-bonded to the surface of the circuit electrode 2 to form a solder bump.

【0006】[0006]

【発明が解決しようとする課題】このとき、クリーム半
田4中の半田粒子は粒径が小さいため、溶融の過程では
半田ボール5または回路電極2のいずれかの側に引き寄
せられ、図3(c)に示すように半田ボール5に吸収さ
れる部分と、回路電極2の表面に溶着する部分4’とに
分離する場合がある。このように溶融半田が一旦完全に
分離した場合には、その後に一体化させることは困難
で、半田ボール5は電極2に半田接合されないまま半田
バンプの欠落となる。半田バンプの欠落が生じた電子部
品は不良品として廃却処分されるため、製品歩留まりを
低下させる要因となる。
At this time, since the solder particles in the cream solder 4 have a small particle diameter, they are attracted to either side of the solder ball 5 or the circuit electrode 2 in the process of melting, as shown in FIG. In some cases, the portion absorbed by the solder ball 5 and the portion 4'welded to the surface of the circuit electrode 2 are separated as shown in FIG. In this way, once the molten solder has been completely separated, it is difficult to integrate the molten solder after that, and the solder ball 5 is not soldered to the electrode 2 and a solder bump is missing. The electronic component with the missing solder bump is discarded as a defective product, which causes a reduction in product yield.

【0007】このように従来の半田バンプ形成方法で
は、クリーム半田の溶融時の挙動に起因して確実に半田
バンプを形成することができないという問題点があっ
た。また、この問題は球状の半田バンプを有する電子部
品を回路電極に実装する場合、すなわち回路電極を覆っ
たレジストに半田バンプの径よりも小さい貫通孔を設
け、この貫通孔内にクリーム半田を供給してこの貫通孔
を介して球状の半田バンプを実装する場合にも共通する
ものであった。
As described above, the conventional solder bump forming method has a problem that the solder bumps cannot be reliably formed due to the behavior of the cream solder during melting. Also, this problem is that when mounting an electronic component having a spherical solder bump on a circuit electrode, that is, a through hole smaller than the diameter of the solder bump is provided in the resist covering the circuit electrode, and cream solder is supplied into this through hole. This is also common when mounting spherical solder bumps through the through holes.

【0008】そこで本発明は、確実に半田バンプを形成
し、また半田バンプを実装することができる半田バンプ
の形成方法および半田バンプの実装方法を提供すること
を目的とする。
Therefore, an object of the present invention is to provide a solder bump forming method and a solder bump mounting method capable of surely forming solder bumps and mounting the solder bumps.

【0009】[0009]

【課題を解決するための手段】請求項1記載の半田バン
プの形成方法は、絶縁基板に設けられた貫通孔を介して
半田ボールを回路電極と半田接合させて前記絶縁基板の
回路電極の反対面に半田バンプを形成する半田バンプの
形成方法であって、前記半田ボールより小さい径で設け
られた前記貫通孔内に、前記半田ボールがこの貫通孔上
に搭載された状態でこの半田ボールと前記回路電極表面
の双方に同時に接触する大きさの半田粒子を含んだ半田
接合材料を供給する工程と、この半田接合材料が供給さ
れた貫通孔上に半田ボールを搭載する工程と、前記絶縁
基板を加熱して前記半田ボールおよび前記半田接合材料
中の半田粒子を溶融させることにより、この半田ボール
と半田粒子を構造的に一体化して前記回路電極表面に半
田接合する工程とを含む。
According to a first aspect of the present invention, there is provided a method of forming a solder bump, wherein a solder ball is solder-bonded to a circuit electrode through a through hole provided in the insulating substrate, and the solder ball is opposite to the circuit electrode of the insulating substrate. A method of forming a solder bump in which a solder bump is formed on a surface, wherein the solder ball is mounted on the through hole in the through hole having a diameter smaller than that of the solder ball. Supplying a solder bonding material containing solder particles of a size that can simultaneously contact both of the circuit electrode surfaces; mounting a solder ball on the through hole to which the solder bonding material is supplied; Heating the solder balls and melting the solder particles in the solder bonding material to structurally integrate the solder balls and the solder particles and solder bond them to the surface of the circuit electrode. Including.

【0010】請求項2記載の半田バンプの実装方法は、
電子部品に形成された半田バンプを基板の回路電極を覆
う絶縁膜に設けられた貫通孔を介して前記回路電極に半
田接合して前記半田バンプを基板に実装する半田バンプ
の実装方法であって、前記半田バンプより小さい径で設
けられた前記貫通孔内に、前記半田バンプがこの貫通孔
上に搭載された状態でこの半田バンプと前記回路電極表
面の双方に同時に接触する大きさの半田粒子を含んだ半
田接合材料を供給する工程と、この半田接合材料が供給
された前記貫通孔上に半田バンプを搭載する工程と、前
記基板を加熱して前記半田バンプおよび前記半田接合材
料中の半田粒子を溶融させることにより、この半田バン
プと半田粒子を構造的に一体化して前記回路電極表面に
半田接合する工程とを含む。
The solder bump mounting method according to claim 2 is
A solder bump mounting method for solder-bonding a solder bump formed on an electronic component to the circuit electrode through a through hole provided in an insulating film covering a circuit electrode of the substrate to mount the solder bump on the substrate. A solder particle having a size smaller than the solder bump and having a diameter smaller than that of the solder bump and simultaneously contacting both the solder bump and the circuit electrode surface in a state where the solder bump is mounted on the through hole. A step of supplying a solder bonding material containing the solder bonding material, a step of mounting a solder bump on the through hole to which the solder bonding material is supplied, and a step of heating the substrate to solder in the solder bump and the solder bonding material. Melting the particles to structurally integrate the solder bumps and the solder particles and solder-bond them to the surface of the circuit electrode.

【0011】各請求項記載の発明によれば、回路電極上
に形成された貫通孔内に、半田ボールもしくは半田バン
プと回路電極表面の双方に同時に接触する大きさの半田
粒子を含んだ半田接合材料を供給することにより、加熱
過程ではこの半田粒子が半田ボールもしくは半田バンプ
と回路電極表面をつなぐブリッジの役割を果たし、溶融
半田が分離するのを防止することができる。
According to the invention described in each of the claims, the solder joint containing the solder particles having a size capable of simultaneously contacting both the solder ball or the solder bump and the surface of the circuit electrode is provided in the through hole formed on the circuit electrode. By supplying the material, the solder particles serve as a bridge connecting the solder ball or the solder bump and the circuit electrode surface in the heating process, and the molten solder can be prevented from separating.

【0012】[0012]

【発明の実施の形態】(実施の形態1)図1(a),
(b),(c),(d),(e)は本発明の実施の形態
1の半田バンプの形成方法の工程説明図であり、半田バ
ンプの形成方法を工程順に示すものである。図1(a)
において、絶縁基板11はポリイミドテープやガラエポ
樹脂などの絶縁材料から成り、絶縁基板11には回路電
極12が形成されている。絶縁基板11の回路電極12
に対応する位置には貫通孔13が設けられている。貫通
孔13は、絶縁基板11の回路電極12の反対面に、半
田バンプを形成するためのものである。
BEST MODE FOR CARRYING OUT THE INVENTION (Embodiment 1) FIG.
(B), (c), (d), (e) is a process explanatory view of the solder bump forming method of the first embodiment of the present invention, showing the solder bump forming method in the order of processes. Figure 1 (a)
In, the insulating substrate 11 is made of an insulating material such as polyimide tape or glass epoxy resin, and the circuit electrode 12 is formed on the insulating substrate 11. Circuit electrode 12 of insulating substrate 11
Through holes 13 are provided at positions corresponding to. The through holes 13 are for forming solder bumps on the surface of the insulating substrate 11 opposite to the circuit electrodes 12.

【0013】図1(b)に示すように、貫通孔13内に
はクリーム半田14が供給される。クリーム半田14は
半田粒子14aとフラックスを混合したものである。半
田粒子14aの粒径は、このクリーム半田14が供給さ
れた貫通孔13上に半田ボールが搭載された状態で、こ
の半田ボールと回路電極12表面の双方に半田粒子14
aのうち少なくとも1個が同時に接触する大きさとなる
ように設定される。すなわち本実施の形態の例(75μ
mの厚さの絶縁基板11に200μmの径の貫通孔13
を設け、この上に300μmの直径の半田ボールを搭載
する例)では、粒径40μm〜70μmの半田粒子が体
積比で5〜30%の範囲(好ましくは20%)で含有さ
れたクリーム半田14を用いる。
As shown in FIG. 1B, cream solder 14 is supplied into the through hole 13. The cream solder 14 is a mixture of solder particles 14a and flux. The particle size of the solder particles 14a is such that the solder balls 14 are provided on both the solder balls and the surface of the circuit electrode 12 when the solder balls are mounted on the through holes 13 to which the cream solder 14 is supplied.
The size is set so that at least one of a is in contact with at the same time. That is, the example of the present embodiment (75 μ
through hole 13 with a diameter of 200 μm in insulating substrate 11 with a thickness of m
In an example in which a solder ball having a diameter of 300 μm is mounted thereon, the solder paste having a particle diameter of 40 μm to 70 μm in a volume ratio of 5 to 30% (preferably 20%) is contained in the cream solder 14 To use.

【0014】次に図1(c)に示すように、クリーム半
田14が供給された貫通孔13上に半田ボール15が搭
載される。このとき、前述のような大きさの粒径の半田
粒子14aが含まれているので、クリーム半田14中の
半田粒子14aうち、少なくとも1個は半田ボール15
および回路電極12表面の双方に同時に接触した状態と
なっている。
Next, as shown in FIG. 1C, solder balls 15 are mounted on the through holes 13 to which the cream solder 14 is supplied. At this time, since the solder particles 14a having the particle size as described above are included, at least one of the solder particles 14a in the cream solder 14 is the solder ball 15
And both surfaces of the circuit electrode 12 are simultaneously in contact with each other.

【0015】この後絶縁基板11はリフロー工程に送ら
れ加熱される。これにより半田粒子14aおよび半田ボ
ール15が溶融を開始する。このとき、半田粒子14a
のうち半田ボール15および回路電極12表面の双方と
接触している半田粒子14aが半田ボール15とともに
溶融することにより、図1(d)に示すように半田ボー
ル15が溶融した溶融半田15’は、半田粒子14aが
溶融した溶融半田14’aによって速やかに回路電極1
2表面につなぎ止められる。半田相互、および半田と回
路電極12表面とは濡れ性が良好であるため溶融半田1
4’は即座に溶融半田15’と一体化し、また回路電極
12表面に溶着するからである。
After that, the insulating substrate 11 is sent to a reflow process and heated. This causes the solder particles 14a and the solder balls 15 to start melting. At this time, the solder particles 14a
Of the solder balls 15 and the surfaces of the circuit electrodes 12, the solder particles 14a that are in contact with each other are melted together with the solder balls 15 to melt the solder balls 15 as shown in FIG. , The molten solder 14'a in which the solder particles 14a are melted quickly to the circuit electrode 1
2 It is fixed on the surface. Since the wettability between the solders and between the solder and the surface of the circuit electrode 12 is good, the molten solder 1
This is because 4'is immediately integrated with the molten solder 15 'and also fused to the surface of the circuit electrode 12.

【0016】したがって、加熱過程においてクリーム半
田14中の半田粒子14aが溶融して半田ボール15側
と回路電極12側に上下に分離することがなく、半田ボ
ール15の溶融半田15’はクリーム半田14中の半田
粒子の溶融半田14a’と確実に一体化する。そして溶
融半田の固化後には、回路電極12上に半田接合されて
図1(e)に示すように半田バンプ16が形成される。
Therefore, in the heating process, the solder particles 14a in the cream solder 14 are not melted and separated vertically into the solder ball 15 side and the circuit electrode 12 side, and the molten solder 15 'of the solder ball 15 is the cream solder 14'. It surely integrates with the molten solder 14a 'of the solder particles inside. After the molten solder is solidified, the solder bumps 16 are formed on the circuit electrodes 12 by soldering, as shown in FIG.

【0017】(実施の形態2)図2(a),(b),
(c),(d),(e)は本発明の実施の形態2の半田
バンプの実装方法の工程説明図であり、半田バンプの実
装方法を工程順に示している。
(Embodiment 2) FIGS. 2 (a), 2 (b),
(C), (d), (e) is process explanatory drawing of the mounting method of the solder bump of Embodiment 2 of this invention, and has shown the mounting method of a solder bump in process order.

【0018】図2(a)において、基板21の表面には
回路電極22が形成されている。基板21および回路電
極22を覆ってエポキシやアクリル樹脂などから成る絶
縁膜としてのソルダレジスト23が形成されている。ソ
ルダレジスト23の回路電極22に対応する位置には、
貫通孔24が設けられている。ここで貫通孔24の径は
この貫通孔24上に実装される半田バンプの径よりも小
さいものとなっている。次に図2(b)に示すように、
貫通孔24内にクリーム半田25が供給される。クリー
ム半田25は実施の形態1におけるクリーム半田14と
同様のものである。
In FIG. 2A, the circuit electrode 22 is formed on the surface of the substrate 21. A solder resist 23 as an insulating film made of epoxy or acrylic resin is formed so as to cover the substrate 21 and the circuit electrodes 22. At the position corresponding to the circuit electrode 22 of the solder resist 23,
A through hole 24 is provided. Here, the diameter of the through hole 24 is smaller than the diameter of the solder bump mounted on the through hole 24. Next, as shown in FIG.
Cream solder 25 is supplied into the through holes 24. Cream solder 25 is similar to cream solder 14 in the first embodiment.

【0019】次に図2(c)に示すように、基板21上
に球状の半田バンプ26が形成された電子部品27を搭
載する。この後基板21はリフロー工程に送られ加熱さ
れる。これによりクリーム半田25中の半田粒子と半田
バンプ26が溶融を開始するが、このとき実施の形態1
と同様に、クリーム半田25中の半田粒子のうち、半田
バンプ26と回路電極22表面の双方に接触している半
田粒子が溶融することにより、図2(d)に示すように
半田バンプ26が溶融した溶融半田26’は回路電極2
2表面につなぎ止められる。したがって加熱過程におい
てクリーム半田25中の半田粒子が上下に分離すること
なく、溶融半田の固化後には、図2(e)に示すように
半田バンプ26は、確実に回路電極22に半田接合によ
り実装される。
Next, as shown in FIG. 2C, an electronic component 27 having spherical solder bumps 26 formed thereon is mounted on the substrate 21. After this, the substrate 21 is sent to the reflow process and heated. As a result, the solder particles in the cream solder 25 and the solder bumps 26 start melting, but at this time, the first embodiment
Similarly, among the solder particles in the cream solder 25, the solder particles in contact with both the solder bumps 26 and the surface of the circuit electrode 22 are melted, so that the solder bumps 26 are formed as shown in FIG. 2D. The molten molten solder 26 'is the circuit electrode 2
2 It is fixed on the surface. Therefore, in the heating process, the solder particles in the cream solder 25 are not separated into upper and lower parts, and after the molten solder is solidified, the solder bumps 26 are surely mounted on the circuit electrodes 22 by soldering as shown in FIG. To be done.

【0020】[0020]

【発明の効果】本発明によれば、回路電極上に形成され
た貫通孔内に、半田ボールもしくは半田バンプと回路電
極表面の双方に同時に接触する大きさの半田粒子を含ん
だ半田接合材料を供給するようにしたので、加熱過程で
はこの半田粒子が半田ボールもしくは半田バンプと回路
電極表面をつなぐブリッジの役割を果たし、溶融半田が
上下に分離するのを防止して、確実に半田バンプの形成
もしくは半田バンプの実装を行うことができる。
According to the present invention, there is provided a solder bonding material containing solder particles having a size such that the through holes formed on the circuit electrodes simultaneously contact both the solder balls or the solder bumps and the surface of the circuit electrodes. In the heating process, the solder particles play a role of a bridge that connects the solder balls or solder bumps to the circuit electrode surface, and prevent the molten solder from being separated into upper and lower parts to reliably form the solder bumps. Alternatively, solder bumps can be mounted.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)本発明の実施の形態1の半田バンプの形
成方法の工程説明図 (b)本発明の実施の形態1の半田バンプの形成方法の
工程説明図 (c)本発明の実施の形態1の半田バンプの形成方法の
工程説明図 (d)本発明の実施の形態1の半田バンプの形成方法の
工程説明図 (e)本発明の実施の形態1の半田バンプの形成方法の
工程説明図
1A is a process explanatory diagram of a solder bump forming method according to a first embodiment of the present invention. FIG. 1B is a process explanatory diagram of a solder bump forming method according to a first embodiment of the present invention. Process explanatory drawing of the solder bump formation method of Embodiment 1 (d) Process explanatory drawing of the solder bump formation method of Embodiment 1 of this invention (e) Solder bump formation method of Embodiment 1 of this invention Process explanatory drawing of

【図2】(a)本発明の実施の形態2の半田バンプの実
装方法の工程説明図 (b)本発明の実施の形態2の半田バンプの実装方法の
工程説明図 (c)本発明の実施の形態2の半田バンプの実装方法の
工程説明図 (d)本発明の実施の形態2の半田バンプの実装方法の
工程説明図 (e)本発明の実施の形態2の半田バンプの実装方法の
工程説明図
FIG. 2A is a process explanatory view of a solder bump mounting method according to a second embodiment of the present invention. FIG. 2B is a process explanatory view of a solder bump mounting method according to a second embodiment of the present invention. Process explanatory drawing of the solder bump mounting method of Embodiment 2 (d) Process explanatory drawing of the solder bump mounting method of Embodiment 2 of this invention (e) Solder bump mounting method of Embodiment 2 of this invention Process explanatory drawing of

【図3】(a)従来のテープ状基板の部分断面図 (b)従来のテープ状基板の部分断面図 (c)従来のテープ状基板の部分断面図FIG. 3A is a partial cross-sectional view of a conventional tape-shaped substrate. (B) Partial cross-sectional view of a conventional tape-shaped substrate (C) Partial cross-sectional view of a conventional tape-shaped substrate

【符号の説明】[Explanation of symbols]

1、11 絶縁基板 2、12、22 回路電極 3、13、24 貫通孔 4、14、25 クリーム半田 14a 半田粒子 5、15 半田ボール 15’、26’ 溶融半田 16、26 半田バンプ 21 基板 1, 11 Insulation board 2, 12, 22 circuit electrodes 3, 13, 24 through holes 4,14,25 Cream solder 14a Solder particles 5,15 solder balls 15 ', 26' molten solder 16, 26 Solder bump 21 board

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H05K 3/34 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H05K 3/34

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】絶縁基板に設けられた貫通孔を介して半田
ボールを回路電極と半田接合させて前記絶縁基板の回路
電極の反対面に半田バンプを形成する半田バンプの形成
方法であって、前記半田ボールより小さい径で設けられ
た前記貫通孔内に、前記半田ボールがこの貫通孔上に搭
載された状態でこの半田ボールと前記回路電極表面の双
方に同時に接触する大きさの半田粒子を含んだ半田接合
材料を供給する工程と、この半田接合材料が供給された
貫通孔上に半田ボールを搭載する工程と、前記絶縁基板
を加熱して前記半田ボールおよび前記半田接合材料中の
半田粒子を溶融させることにより、この半田ボールと半
田粒子を構造的に一体化して前記回路電極表面に半田接
合する工程とを含むことを特徴とする半田バンプの形成
方法。
1. A method of forming a solder bump, comprising solder-bonding a solder ball to a circuit electrode through a through hole provided in an insulating substrate to form a solder bump on the surface of the insulating substrate opposite to the circuit electrode. In the through hole provided with a diameter smaller than that of the solder ball, solder particles having a size that simultaneously contacts both the solder ball and the surface of the circuit electrode when the solder ball is mounted on the through hole. A step of supplying the solder bonding material containing the solder ball, a step of mounting a solder ball on the through hole to which the solder bonding material is supplied, a step of heating the insulating substrate, and solder particles in the solder ball and the solder bonding material. A step of melting the solder balls and the solder particles structurally so as to be joined to the surface of the circuit electrode by soldering.
【請求項2】電子部品に形成された半田バンプを基板の
回路電極を覆う絶縁膜に設けられた貫通孔を介して前記
回路電極に半田接合して前記半田バンプを基板に実装す
る半田バンプの実装方法であって、前記半田バンプより
小さい径で設けられた前記貫通孔内に、前記半田バンプ
がこの貫通孔上に搭載された状態でこの半田バンプと前
記回路電極表面の双方に同時に接触する大きさの半田粒
子を含んだ半田接合材料を供給する工程と、この半田接
合材料が供給された前記貫通孔上に半田バンプを搭載す
る工程と、前記基板を加熱して前記半田バンプおよび前
記半田接合材料中の半田粒子を溶融させることにより、
この半田バンプと半田粒子を構造的に一体化して前記回
路電極表面に半田接合する工程とを含むことを特徴とす
る半田バンプの実装方法。
2. A solder bump in which a solder bump formed on an electronic component is solder-bonded to the circuit electrode through a through hole provided in an insulating film covering the circuit electrode of the substrate to mount the solder bump on the substrate. A mounting method, in which the solder bump and the surface of the circuit electrode are simultaneously contacted in the through hole provided with a diameter smaller than that of the solder bump, with the solder bump mounted on the through hole. Supplying a solder bonding material containing solder particles of a size; mounting a solder bump on the through hole to which the solder bonding material is supplied; heating the substrate; By melting the solder particles in the bonding material,
A method of mounting a solder bump, comprising the step of structurally integrating the solder bump and solder particles and solder-bonding to the surface of the circuit electrode.
JP06659198A 1998-03-17 1998-03-17 Solder bump forming method and solder bump mounting method Expired - Fee Related JP3493999B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP06659198A JP3493999B2 (en) 1998-03-17 1998-03-17 Solder bump forming method and solder bump mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06659198A JP3493999B2 (en) 1998-03-17 1998-03-17 Solder bump forming method and solder bump mounting method

Publications (2)

Publication Number Publication Date
JPH11266072A JPH11266072A (en) 1999-09-28
JP3493999B2 true JP3493999B2 (en) 2004-02-03

Family

ID=13320340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP06659198A Expired - Fee Related JP3493999B2 (en) 1998-03-17 1998-03-17 Solder bump forming method and solder bump mounting method

Country Status (1)

Country Link
JP (1) JP3493999B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006294725A (en) 2005-04-07 2006-10-26 Fujikura Ltd Wiring board, multilayered wiring board, and manufacturing method of these

Also Published As

Publication number Publication date
JPH11266072A (en) 1999-09-28

Similar Documents

Publication Publication Date Title
JP3565047B2 (en) Solder bump forming method and solder bump mounting method
KR101140518B1 (en) Wiring b0ard and semic0nduct0r device
US20100090334A1 (en) Electronic Part Manufacturing Method
JP3381601B2 (en) How to mount electronic components with bumps
US8410604B2 (en) Lead-free structures in a semiconductor device
JP4356581B2 (en) Electronic component mounting method
KR100636364B1 (en) Bonding method for solder-pad in flip-chip package
JP2001332583A (en) Method of mounting semiconductor chip
US20040180527A1 (en) Method of manufacturing semiconductor device
WO2006016650A1 (en) Electrode substrate
JP3381593B2 (en) How to mount electronic components with bumps
JP3493999B2 (en) Solder bump forming method and solder bump mounting method
JP2008288490A (en) Process for producing built-in chip substrate
JP3367413B2 (en) Solder bump forming method and solder bump mounting method
JP3705152B2 (en) Method of forming solder bump
KR100746365B1 (en) Method for Manufacturing substrate used to mount flip chip
JP3367416B2 (en) Solder bump forming method, solder bump mounting method, and solder joint structure
JP2000151086A (en) Printed circuit unit and its manufacture
JP4259431B2 (en) Solder paste and solder joining method
JP3304854B2 (en) Solder bump formation method
JPH11243274A (en) Formation of solder bump and mask for solder bump formation
JP2741611B2 (en) Substrate for flip chip bonding
JP3013682B2 (en) Solder bump and connection structure and method for electronic component using the same
JP2004259886A (en) Semiconductor device, electronic device, electronic equipment, manufacturing method of semiconductor device, and manufacturing method of electronic device
JP3604001B2 (en) Method for manufacturing semiconductor device

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071121

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081121

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091121

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091121

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101121

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111121

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121121

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121121

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131121

Year of fee payment: 10

LAPS Cancellation because of no payment of annual fees