JP3269738B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having a crystalline silicon film obtained by crystallizing an amorphous silicon film as an active region and a method of manufacturing the same. In particular, the present invention is effective for a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate, and can be applied to an active matrix liquid crystal display device, a contact image sensor, a three-dimensional IC, and the like.

[0002]

2. Description of the Related Art In recent years, large and high resolution liquid crystal display devices have been developed.
High-speed, high-resolution contact image sensor, 3D IC
In order to realize such a technique, attempts have been made to form a high-performance semiconductor element on an insulating substrate such as glass or an insulating film. In general, a thin-film silicon semiconductor layer is used for a semiconductor element used in these devices.

[0003] The silicon semiconductor layer in the form of a thin film is roughly classified into two types: a layer composed of an amorphous silicon semiconductor (a-Si) and a layer composed of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low production temperature, can be relatively easily produced by a gas phase method, and have high mass productivity. Inferior to silicon semiconductors. Therefore, in order to obtain higher-speed characteristics in the future, it is strongly required to establish a method for manufacturing a semiconductor device made of a crystalline silicon semiconductor. Note that as the silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known.

As a method for obtaining a silicon semiconductor layer in the form of a thin film having crystallinity, (1) a semiconductor film is formed while imparting crystallinity to the semiconductor film, and (2) an amorphous semiconductor film is formed. Forming a film and then making the semiconductor film crystalline by the energy of laser light. (3) forming an amorphous semiconductor film and then applying heat energy to the semiconductor film Has crystallinity,
Such a method is known.

However, in the method (1), the crystallization proceeds simultaneously with the film formation step, so that it is necessary to increase the thickness of the silicon film in order to obtain crystalline silicon having a large grain size. It is technically difficult to uniformly form a film having the above on the substrate over the entire surface. Further, in this method, since the film forming temperature is as high as 600 ° C. or more, there is a problem in terms of cost that an inexpensive glass substrate cannot be used.

In the method (2), the crystallization phenomenon in the melting and solidification process is used, so that the grain boundaries are satisfactorily processed in spite of the small grain size, and a high-quality crystalline silicon film can be obtained. Taking an excimer laser, which is most commonly used, as an example, the first problem is that the laser light irradiation area is small and the throughput is low. In addition, the crystallization treatment using laser light does not have sufficient laser stability to uniformly treat the entire surface of a large-area substrate, and has a strong sense of a next-generation technology.

The method (3) has an advantage that it can cope with a large area as compared with the methods (1) and (2). However, the crystallization requires a heat treatment at a high temperature of 600 ° C. or more for several tens of hours. is necessary. On the other hand, considering the use of an inexpensive glass substrate and the improvement of throughput, it is necessary to lower the heating temperature and crystallize in a shorter time. Therefore, in the method (3), it is necessary to simultaneously solve the above conflicting problems.

In the method (3), since the solid phase crystallization phenomenon is used, the crystal grains spread in parallel to the substrate surface and have a size of several μm.
However, since the grown crystal grains collide with each other to form a grain boundary, the grain boundary acts as a trap level for carriers, which is a major cause of lowering the mobility of the TFT. Would.

A method for solving the above-mentioned problem of the crystal grain boundary by using the above method (3) is disclosed in Japanese Patent Application Laid-Open No. 5-55142.
Or Japanese Patent Application Laid-Open No. 5-136048. In these methods, a foreign substance serving as a nucleus for crystal growth is introduced into an amorphous silicon film, and then a heat treatment is performed to obtain a crystalline silicon film having a large particle diameter using the foreign substance as a nucleus.

In the former, silicon (Si.sup. ⁺ ) Is introduced into an amorphous silicon film by an ion implantation method, and then a polycrystalline silicon film having crystal grains having a grain size of several .mu.m is obtained by heat treatment.
In the latter, growth nuclei are formed by blowing Si particles having a particle size of 10 to 100 nm together with high-pressure nitrogen gas onto an amorphous silicon film. In both cases, a semiconductor element is formed using a high-quality crystalline silicon film obtained by selectively introducing foreign matter into an amorphous silicon film and using the nucleus as a nucleus to grow a crystal.

However, in these techniques proposed in Japanese Patent Application Laid-Open No. 5-55142 or Japanese Patent Application Laid-Open No. 5-136048, the introduced foreign matter acts only as a growth nucleus. Although effective for controlling nucleation and the direction of crystal growth, the above-mentioned problems in the heat treatment step for crystallization still remain.

In Japanese Patent Application Laid-Open No. 5-55142, a temperature of 6
Crystallization is performed by a heat treatment at 00 ° C. for 40 hours. In Japanese Patent Application Laid-Open No. Hei 5-136048, a heat treatment at a heating temperature of 650 ° C. or higher is performed. Therefore, these technologies are used for SOI (Silicon-On-Insulator) substrates and SOS
(Silicon-On-Sapphire) Although it is an effective technique for a substrate, it is difficult to form a crystalline silicon film on an inexpensive glass substrate to form a semiconductor element using these techniques. For example, Corning 7059 (trade name of Corning) used for an active matrix type liquid crystal display device
Glass has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of the substrate.

In order to solve the above-mentioned various problems, the present inventors have realized both reduction of the temperature required for crystallization and shortening of the processing time, and furthermore, the influence of the grain boundaries has been minimized. A method for producing a crystalline silicon thin film that has been limited to a minimum has been found.

According to the study of the present inventors, a trace amount of a metal element such as nickel, palladium, and lead is introduced into the surface of an amorphous silicon film, and then the surface is heated.
It has been found that crystallization can be performed at 50 ° C. for about 4 hours. It is understood that this mechanism is that crystal nucleus generation with a metal element as a nucleus occurs at an early stage of the heat treatment, and then the metal element serves as a catalyst to promote crystal growth, and crystallization proceeds rapidly. In this sense, these metal elements are hereinafter referred to as catalyst elements. Crystallized silicon film grown by the promotion of crystallization by these catalyst elements,
While the amorphous silicon film crystallized by the ordinary solid phase growth method has a twin structure, it is composed of a number of needle-like crystals or columnar crystals. Is in an ideal single crystal state.

When a TFT is manufactured using such a crystalline silicon film as an active region, the field-effect mobility is 1.2 times higher than when a crystalline silicon film formed by an ordinary solid phase growth method is used. To a degree. Further, after the crystallization treatment using the above catalyst element, irradiation with laser light or intense light to promote the crystallinity thereof makes the difference in the field effect mobility more remarkable.

That is, when the crystalline silicon film is irradiated with laser light or strong light, the crystal grain boundary is intensively treated due to the difference in melting point between the crystalline silicon film and the amorphous silicon film. However, in a crystalline silicon film formed by an ordinary solid-phase growth method, since the crystal structure is in a twin state, the inside of a crystal grain boundary remains as a twin defect even after laser irradiation. In comparison, a crystalline silicon film crystallized by introducing a catalytic element,
It is made of needle-like crystals or columnar crystals, and the inside is in a single crystal state. Therefore, when the crystal grain boundary part is processed by irradiation of laser light or strong light, good quality near the single crystal state is obtained over the entire substrate. A crystalline silicon film is obtained.

[0017]

In order to introduce a small amount of the catalyst element as described above, a plasma treatment, ion implantation, or a method of applying a solution or compound containing the catalyst element may be used. Here, the plasma treatment is a method in which a material containing a catalytic element is used as an electrode in a plasma CVD apparatus, and plasma is generated in an atmosphere such as nitrogen or hydrogen to add the catalytic element to the amorphous silicon film. is there.

However, the presence of a large amount of such elements in semiconductors impairs the reliability and electrical stability of devices using these semiconductors, and is not preferable.

That is, the above-mentioned catalytic element for promoting crystallization, such as nickel, is necessary when crystallizing the amorphous silicon region, but it is necessary to minimize the inclusion in the crystallized silicon region. Is preferred. In order to achieve this goal, select a catalyst element that has a strong tendency to be inactive in the crystalline silicon region, and at the same time minimize the amount of the catalyst element necessary for crystallization, Needs to be done. For that purpose, it is necessary to precisely control and introduce the amount of the catalyst element to be added. In addition, the uniformity of the amount of the catalyst element in the substrate in the treatment method and the stability between the substrates (reproduction) ), That is, it is impossible to ensure that the variation between the substrates to be processed is small.

In the case where nickel is used as a catalytic element, the crystallization process in the process of forming an amorphous silicon film and adding nickel by a plasma treatment method to produce a crystalline silicon film was examined in detail. However, the following matters were found.

(1) When nickel is introduced onto an amorphous silicon film by plasma treatment, nickel has already penetrated to a considerable depth in the amorphous silicon film before heat treatment.

(2) The initial nucleus of the crystal is generated from the surface of the region into which nickel has been introduced.

(3) When the crystalline silicon film crystallized by introducing nickel onto the amorphous silicon film by the plasma treatment is irradiated with laser light, excessive nickel precipitates on the surface of the crystalline silicon film.

From these facts, it is concluded that all the nickel introduced by the plasma treatment is not functioning effectively. That is, it is considered that some nickel does not function sufficiently even if a large amount of nickel is introduced. From this, it is considered that a contact portion or a contact surface portion where nickel and silicon are in contact functions at the time of low-temperature crystallization. It is concluded that it is necessary for nickel to be dispersed as finely as possible. That is, it is concluded that "what is necessary is to introduce nickel in the vicinity of the surface of the amorphous silicon film in the form of a low-temperature crystallization and as low a concentration as possible in the form of atoms in an atomic state". Is done.

Therefore, a method of introducing a trace amount of nickel only near the surface of the amorphous silicon film, in other words,
As a method of introducing a trace amount of a catalyst element that promotes crystallization only near the surface of the amorphous silicon film, there is a method of dissolving and holding the catalyst element in a solvent or a compound so as to be in contact with the amorphous silicon film. In this method, by controlling the nickel concentration in the solution or compound, the amount of nickel introduced into the amorphous silicon film can be easily controlled, and the minimum amount of catalyst element necessary for crystallization can be added. Becomes possible.
Further, when a crystalline silicon film crystallized by using this method is irradiated with a laser beam, nickel does not precipitate and a high-quality crystalline silicon film can be obtained.

However, the above-described method of applying a solvent or a compound in which a catalytic element is dissolved to an amorphous silicon film has a problem that the uniformity of the amount of nickel added in the substrate is not good. As a method of the above application,
A method of uniformly applying a solution or the like with a spinner and drying, and a method of directly dipping a substrate into a solution and then drying with an air knife have been tried. Variations were seen.

If the non-uniformity of the amount of added nickel in the substrate is large, a region where crystal growth does not occur due to a locally insufficient amount of nickel or a region where nickel is contained in a large amount so as to affect the semiconductor element appears. Therefore, it is difficult to uniformly manufacture hundreds of thousands of TFTs on one substrate as in the process of manufacturing an active matrix substrate of a liquid crystal display device. It was difficult. At present, due to demands for lower cost and larger area of the device, there is a demand for a semiconductor device having excellent TFT uniformity and reproducibility and a method of manufacturing the same so as to support a glass substrate of 400 mm square or more.

The present invention has been made in order to solve the above problems, and requires a minimum amount of a catalyst element.
The addition amount can be precisely controlled, and can be introduced into the amorphous silicon film with good in-plane uniformity and good reproducibility between substrates, and even higher than the crystallinity obtained by ordinary heat treatment. An object of the present invention is to provide a semiconductor device capable of forming a crystalline silicon film having crystallinity with good productivity by low-temperature heat treatment at 600 ° C. or lower and a method for manufacturing the same.

[0029]

(1) A semiconductor device according to the present invention comprises: a substrate having an insulating surface; and an active device formed on the insulating surface of the substrate by crystallizing an amorphous silicon film. Area. The active region contains a catalyst element that promotes crystallization of the amorphous silicon film by heat treatment or heat treatment and irradiation with laser light or strong light. The catalytic element contained in the active region is provided between a thin film having a uniform thickness containing the catalytic element and the amorphous silicon film.
Through the diffusion preventing film for the catalyst element
It is introduced into the amorphous silicon film by thermal diffusion from the film . Thereby, the above object is achieved.

(2) A semiconductor device according to the present invention includes a substrate having an insulating surface, and an active region formed on the insulating surface of the substrate and formed by crystallizing an amorphous silicon film. . The active region is a part of a lateral crystal growth region in which crystal grains are formed in a substantially single crystal state, with crystal growth progressing from a nearby crystallization region in a direction parallel to the substrate surface. . The crystallization region contains a catalyst element that promotes crystallization of the amorphous silicon film by heat treatment or heat treatment and irradiation with laser light or strong light. The catalyst element contained in the crystallization region is provided between a thin film having a uniform thickness containing the catalyst element and an amorphous silicon film.
Through the diffusion preventing film for the catalyst element,
And introduced into the amorphous silicon film by thermal diffusion . Thereby, the above object is achieved.

(3) In the present invention, the diffusion prevention film for the catalyst element preferably has a diffusion coefficient for the catalyst element of 1/10 or less as compared with the amorphous silicon film.

(4) In the present invention, the diffusion prevention film for the catalyst element is preferably a silicon oxide film or a silicon nitride film.

(5) In the present invention, Ni, Co, Pd, Pt, Cu, Ag, Au, I
It is preferable to use one or more elements selected from n, Sn, Al, P, As, and Sb.

(6) In the present invention, the concentration of the catalytic element in the active region is 1 × 10 ¹⁵ atoms / c.
It is preferably m ³ to 1 × 10 ¹⁹ atoms / cm ³ .

(7) In the method of manufacturing a semiconductor device according to the present invention, a step of forming an amorphous silicon film on a substrate and a step of forming a diffusion prevention film for a catalytic element that promotes crystallization of the amorphous silicon film are performed. And a uniform step containing the catalyst element.
A step of forming a thin film having a thickness , and a step of performing a heat treatment to diffuse the catalyst element in the thin film into the amorphous silicon film through the diffusion prevention film and crystallizing the amorphous silicon. The purpose is thereby achieved.

(8) In the method of manufacturing a semiconductor device according to the present invention, a step of forming an amorphous silicon film on a substrate and a step of forming a diffusion prevention film for a catalytic element that promotes crystallization of the amorphous silicon film are performed. And a uniform step containing the catalyst element.
A step of forming a thin film having a thickness, and a heat treatment for selectively diffusing a catalyst element in the thin film into the amorphous silicon film through the diffusion preventing film, and selectively depositing the amorphous silicon film. A step of crystallizing, and a step of performing crystal growth in a direction substantially parallel to the substrate surface from the crystallized portion by a subsequent heat treatment to form a lateral crystal growth region in the amorphous silicon film. The purpose is thereby achieved.

(9) In the present invention, after the amorphous silicon film is crystallized by the heat treatment, the amorphous silicon film is irradiated with laser light or intense light to process the crystal. Is preferred.

(10) In the present invention, it is preferable to form a silicon oxide film or a silicon nitride film as the diffusion preventing film.

(11) In the present invention, it is preferable that the silicon oxide film or the silicon nitride film as the diffusion preventing film is formed by oxidizing or nitriding the surface of the amorphous silicon film.

(12) In the present invention, the thin film containing the catalyst element is preferably formed by a vapor deposition method.

(13) In the present invention, Ni, Co, Pd, Pt, Cu, Ag, Au,
It is preferable to use one or more elements selected from In, Sn, Al, P, As, and Sb. further,
The thin film containing the catalyst element is formed by a vapor deposition method or a low power spa.
It is preferably formed by a sputtering method.

[0042]

In the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film by heating. The crystalline silicon film constituting the active region, which is obtained by crystallization of the film, can have higher crystallinity than that obtained by a usual solid phase growth method.

Since the crystallization of the amorphous silicon film by heating is promoted by the catalyst element, a high-quality crystalline silicon film can be formed with high productivity. Moreover, at this time, the heating temperature required for crystallization can be suppressed to 600 ° C. or less, so that an inexpensive glass substrate can be used.

The concentration of the catalyst element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , this catalytic element can function effectively when the amorphous silicon film is crystallized.

In the method of manufacturing a semiconductor device according to the present invention, a thin film containing a catalyst element for promoting crystallization of an amorphous silicon film is formed on the amorphous silicon film, and the catalyst is thermally diffused from the thin film. Since the element is introduced into the amorphous silicon film,
Variations in the amount of the catalyst element added in the plane of the substrate can be reduced.

Further, since the introduction of the catalyst element into the amorphous silicon film is carried out via the diffusion prevention film, most of the catalyst element is transferred from the thin film to the amorphous silicon film. , And the catalyst element can be introduced in a necessary minimum amount. Further, even when the concentration of the catalyst element in the thin film varies, the variation is reduced when the catalyst element diffuses in the diffusion preventing film.

In the method of manufacturing a semiconductor device according to the present invention, the catalyst element in the thin film is selectively diffused into the amorphous silicon film via the diffusion preventing film by heat treatment, and the amorphous silicon is removed. By selectively crystallizing and subsequent heat treatment, crystal growth is performed from this crystallized portion in a direction substantially parallel to the substrate surface to form a lateral crystal growth region in the amorphous silicon film. A crystallized region having much better crystallinity can be obtained as compared with the region into which the catalytic element has been introduced.

[0048]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the basic principle of the present invention will be described.

In the present invention, as a method for introducing a catalytic element for promoting crystallization of an amorphous silicon film, a thin film containing the catalytic element is formed, and the catalytic element is non-diffused through a diffusion preventing film for the catalytic element. A method of diffusing into a crystalline silicon film is used. In this method, the catalyst element is introduced into the amorphous silicon film by forming a thin film containing the catalyst element,
Compared with the above-described method of applying a solution or compound in which the catalyst element is dissolved, the variation in the addition amount of the catalyst element in the substrate can be reduced. In the experiments of the present inventors, the value was within ± 5% for a 127 mm square substrate. As a method of forming a thin film in this case, a substantially completed technique such as a vapor deposition method, a sputtering method, or a plating method, which is conventionally used, can be used. That is, the property can be directly reflected on the uniformity of the added amount of the catalyst element. Further, even when the substrate has a larger area, it can be almost coped with by increasing the size of the film forming apparatus, and the substantial variation in the amount of the catalyst element added at that time is substantially different from the result of the current 127 mm square substrate. Seems not.

However, simply forming the catalyst element in a thin film state on the amorphous silicon film and diffusing the catalyst element therefrom and introducing the catalyst element into the amorphous silicon film, the concentration of the catalyst element in the substrate surface is reduced. Even though the uniformity can be improved, it is difficult to control the introduction amount of the catalyst element to another minimum amount necessary for crystallization, which is another object of the present invention. That is, the amount of the catalyst element required in the present invention is an extremely thin film (several nm or less) that cannot be visually confirmed as a thin film, and it is almost impossible to control the film thickness by a method of forming a thin film. This is because they are close to each other.

To solve this problem, in the present invention,
The introduction of the catalytic element through the diffusion preventing film for the catalytic element is performed. That is, in the present invention, in order for the catalyst element formed in a thin film to reach the amorphous silicon film, the catalyst element first diffuses in the diffusion prevention film. This diffusion prevention film needs to have a smaller diffusion coefficient with respect to a catalyst element such as a metal element than a silicon film, and literally acts as a diffusion prevention film or a buffer film.

Therefore, even if the catalyst element is added to the surface of the diffusion preventing film to a certain extent, a large number of elements are trapped in the diffusion preventing film, so that the amount of the catalyst element introduced into the amorphous silicon film is extremely small. It can be controlled to a very small amount. Further, even if the concentration of the catalytic element film formed on the surface of the diffusion preventing film locally varies, the variation is reduced when the catalyst element film diffuses in the diffusion preventing film. Furthermore, since the catalyst element reaches the surface of the amorphous silicon film in a state of being dispersed in a fine atomic state by diffusing in the diffusion prevention film, all the catalyst elements introduced into the amorphous silicon film are efficiently used. Function. Therefore, by using the present invention, the problem of introducing a catalytic element from a thin film state to an amorphous silicon film can be solved, and the catalytic element can be uniformly introduced over the entire surface of the substrate and in a necessary minimum amount. Becomes possible. Therefore, in the case of using the present invention, even if irradiation with laser light or intense light is performed after crystallization by heating, precipitation of the catalytic element does not occur, and uniformity and stability mounted on a large-area substrate are excellent. A high-performance semiconductor device can be realized.

It is desirable that the diffusion preventing film in the present invention has a diffusion coefficient for a catalytic element of at least 1/10 or less of that of an amorphous silicon film. This is because the amount of the catalytic element introduced into the amorphous silicon film is determined by the diffusion coefficient of the diffusion prevention film.

FIG. 6 shows the relationship between the diffusion coefficient of the diffusion preventing film and the amount of the catalyst element introduced into the amorphous silicon film. this is,
The data are for the case where nickel as a catalyst element is excessively introduced on the diffusion prevention film and heated at a temperature of 550 ° C., the horizontal axis is the ratio of the diffusion coefficient of the amorphous silicon film / diffusion prevention film to nickel, and the vertical axis is the vertical axis. Indicates the amount of nickel introduced into the amorphous silicon film via the diffusion prevention film. From FIG. 6, when the diffusion coefficient ratio with respect to the amorphous silicon film is about 1/10 or less, the amount of the catalyst element introduced into the amorphous silicon film is 10 ¹⁹ atoms / c.
It can be seen that it can be made m ³ or less. The amount of the catalytic element introduced into the amorphous silicon film is 10 ¹⁹ atoms /
cm ³ or less, so that the diffusion prevention film of the present invention desirably has a diffusion coefficient ratio to an amorphous silicon film of 1/10 or less.

The diffusion barrier film of the present invention most preferably has the above diffusion coefficient and does not adversely affect the amorphous silicon film which will later become the active region. Specifically, a silicon oxide film or a silicon nitride film, which is the same silicon-based material, satisfies this condition. Therefore, when these films are used as the diffusion prevention film of the present invention, the best results can be obtained.

As a method of forming the silicon oxide film and the silicon nitride film in the present invention, there is no problem with a deposition method such as a CVD method or a sputtering method, but the required thickness of the silicon oxide film or the silicon nitride film is about several nm. Considering that an extremely thin thin film is sufficient and that the uniformity of the thickness of the silicon oxide film or the silicon nitride film is indispensable for the uniform introduction of the catalytic element, the silicon oxide film and the silicon nitride film are not suitable. It is most effective to form the amorphous silicon film by a thin film oxidation method or a thin film nitridation method.

As the thin film oxidation method for the surface of the amorphous silicon film, a thermal oxidation method in which the surface is oxidized by heat treatment in an oxidizing atmosphere such as oxygen or water vapor, a mixed solution of sulfuric acid and hydrogen peroxide, etc. There is a chemical oxidation method in which the surface is oxidized by immersing the oxidizing solution in the substrate, and the effect of the present invention can be obtained by using any method.

As a method for forming a thin film containing a catalyst element in the present invention, a vacuum deposition method is most effective. That is, the points at the time of forming the catalytic element are as follows:
This is because the catalyst element is desired to be present only on the surface of the diffusion prevention film without entering the diffusion prevention film as much as possible.
However, it is possible to cope with a low power in the sputtering method, and it is also possible to cope with other methods.

As an application example of the present invention, a catalyst element is selectively introduced into a part of the amorphous silicon film and heated, so that a crystal grows in a lateral direction (a direction parallel to the substrate) from the introduction region. There is a way to make it happen. This lateral crystal growth region
In the inside, needle-like crystals and columnar crystals whose growth directions are aligned in one direction are crowded, and the crystallinity is much better than the region where the catalyst element is directly introduced and crystal nuclei occur randomly. Area.

When this lateral crystal growth region is irradiated with laser light or strong light, the crystal grain boundaries between the needle-like crystals or columnar crystals are treated, and a crystalline silicon film almost close to a single crystal is obtained. Also in this case, by using the present invention as a method for introducing a catalyst element, lateral crystal growth can be performed efficiently. Here, the catalyst element contributing to crystallization exists at the tips of the needle-like crystals and columnar crystals, that is, at the tips of crystal growth.
In other words, if the catalytic element is functioning efficiently for crystallization, the catalytic element is present only at the crystal growth tip where crystallization is performed, and is almost absent in the already crystallized lateral crystal growth region. Become. Actually, when nickel is used as a catalyst element, the nickel concentration in the lateral crystal growth region is 1 × 10 ^{18 to} 5 × 1 in the plasma processing method.
0 ¹⁸ atoms / cm ³ , whereas 1 × 10 ^{16 to} 5 × 10 ¹⁶ atoms when the method of the present invention was used.
/ Cm ³ , a value as small as about two digits.

The concentration of the catalytic element introduced into the amorphous silicon film is preferably as low as possible, but if it is too low, it does not function to promote crystallization of the amorphous silicon film. As a result of investigations by the present inventors, the minimum concentration of a catalytic element at which crystallization occurs is 1 × 10 ¹⁵ atoms / cm ³ , and at a concentration lower than this, crystal growth by the catalytic element does not occur.

Further, when the concentration of the catalytic element is high, the influence on the device becomes a problem. As a phenomenon that occurs when the concentration of the catalytic element is high, there is an increase in leak current mainly in an off region of the TFT. This is understood to be due to the influence of the impurity level formed in the silicon film by the catalytic element, which is caused by the tunnel current through the level. As a result of examination by the present inventors,
The maximum concentration of the catalytic element that can suppress the influence on the element is 1 × 10 ¹⁹ atoms / cm ³ . Therefore, the concentration of the catalyst element in the film is 1 × 10 ^{15 to} 5 × 10 ^19.
With atoms / cm ³ , the catalytic element functions most effectively.

In the present invention, the most remarkable effect can be obtained when Ni is used as a catalyst element, but other usable catalyst elements include Co, Pd,
Pt, Cu, Ag, Au, In, Sn, Al, P, A
s and Sb can be used. One or a plurality of elements selected from these elements have an effect of promoting crystallization in a small amount, and therefore have little effect on the semiconductor element.

Hereinafter, embodiments of the present invention will be described. [Embodiment 1] FIG. 1 is a cross-sectional view for explaining a thin film transistor and a method of manufacturing the same according to a first embodiment of the present invention, and FIGS.
The manufacturing method of T is shown in the order of steps.

In the figure, reference numeral 100 denotes a semiconductor device having an N-type thin film transistor (TFT) 10.
Is formed on a glass substrate 101 via an insulating base film 102 such as a silicon oxide film. The insulating base film 10
On 2, an island-shaped crystalline silicon film 103 i constituting the TFT is formed. This crystalline silicon film 103
The central portion of i is a channel region 111, and the two side portions are source and drain regions 112 and 113. An aluminum gate electrode 109 is provided on the channel region 111 with a gate insulating film 108 interposed therebetween. The surface of the gate electrode 109 is covered with an oxide layer 110. The entire surface of the TFT 10 is covered with an interlayer insulating film 114, and contact holes 114a are formed in portions of the interlayer insulating film 114 corresponding to the source / drain regions 112 and 113. The source / drain regions 112 and 113 are connected to the electrode wiring 115, via the contact hole 114a.
116.

In this embodiment, the crystalline silicon film 103i contains a catalytic element (Ni) that promotes crystallization of the amorphous silicon film by heat treatment, and the crystal grains in this film are substantially in a single crystal state. Are made of needle-like crystals or columnar crystals.

The TFT 10 of this embodiment can of course be used as a driver circuit of an active matrix type liquid crystal display device or as an element constituting a pixel portion.
CPU mounted on the same substrate as these circuits and pixel parts
Can also be used as an element constituting. Note that T
The application range of FT is not limited to liquid crystal display devices,
Needless to say, it can be used for a thin film integrated circuit generally called.

Next, the manufacturing method will be described. First, a base film 102 made of silicon oxide and having a thickness of about 200 nm is formed on a glass substrate 101 by, for example, a sputtering method. This silicon oxide film is provided to prevent diffusion of impurities from the glass substrate. Next, the thickness is 25 to 100 n by a low pressure CVD method or a plasma CVD method.
An intrinsic (I-type) amorphous silicon film (a-Si film) 103 having a thickness of m, for example, 80 nm is formed.

Next, as shown in FIG. 1A, the surface of the a-Si film is thinly oxidized to form a silicon oxide film 105. In this case, the natural oxide film on the a-Si surface is first removed by hydrofluoric acid cleaning, and then the surface of the a-Si film 103 is immersed in a mixed solution of sulfuric acid and hydrogen peroxide at about 80 ° C. for 10 minutes. The oxide film 105 is thus formed. The thickness of the oxide film 105 thus formed is about 1 to 2 nm. The formation of the oxide film 105 allows the a-Si film 103 to be formed.
Is reduced by 1 n in the case of the present embodiment.
m or less, which is negligible compared to the initially set film thickness.

Subsequently, a nickel thin film 106 is formed by, for example, a vacuum evaporation method. An appropriate film thickness at this time is about 1 nm to 10 nm. Actually, a-Si film 103
The amount of Ni that contributes to the crystallization of
In the present invention, the control is performed not by the thickness of the nickel thin film but by the oxide film 1 serving as a buffer film.
It is characterized in that it is performed with a film thickness of 05.

Then, this is annealed in a hydrogen reducing atmosphere or an inert atmosphere at a heating temperature of 520 to 580 ° C. for several hours to several tens of hours, for example, at 550 ° C. for 8 hours to crystallize. At this time, the nickel thin film 106 deposited on the surface is
Diffuses in the oxide film 105 and is dispersed in an atomic state, and only a part of the atoms reach the surface of the a-Si film 103. Then a
-The nickel that has reached the Si surface becomes a nucleus, and the substrate 101
The crystallization of the amorphous silicon film 103 occurs in a direction perpendicular to the direction. At the same time as the crystallization, diffusion of nickel into the film occurs. As a result, the nickel concentration in the crystalline silicon film 103a is about 5 × 10 ¹⁷ atoms / cm ³ .

Subsequently, after the silicon oxide film 105 is removed, as shown in FIG.
By irradiating a laser beam on the substrate, its crystallinity is promoted.
At this time, a XeCl excimer laser (wavelength 308 nm, pulse width 40 nsec) is used as the laser light. Irradiation of laser light is performed when the substrate
It is held so as to be heated to 0 ° C., for example, 400 ° C., and has an energy density of 200 to 400 mj / cm ² , for example, 300
Perform at mj / cm ² .

Next, as shown in FIG. 1C, an unnecessary portion of the crystalline silicon film 103a is removed to perform element isolation, and thereafter, an active region (source / drain region, channel region) of the TFT is formed. An island-shaped crystalline silicon film 103i is formed.

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 108 so as to cover the crystalline silicon film 103 i to be the active region. Here, TEO is used for forming the silicon oxide film.
Using S (Tetra Ethoxy Ortho Silicate) as a raw material, a substrate temperature of 150 to 600 ° C., preferably 300, with oxygen.
Decomposed and deposited by RF plasma CVD at ~ 450 ° C. Alternatively, the substrate may be formed at a substrate temperature of 350 to 650 ° C., preferably 400 to 550 ° C. by a low pressure CVD method or a normal pressure CVD method using TEOS as a raw material together with an ozone gas. After the film formation, in order to improve the bulk characteristics of the gate insulating film itself and the interface characteristics between the crystalline silicon film and the gate insulating film, 400 to 6 times in an inert gas atmosphere.
Anneal at 00 ° C. for 30 to 60 minutes.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 to 800 nm, for example, 600 nm is formed. Then, the gate electrode 109 is formed by patterning the aluminum film. Further, the surface of the aluminum electrode is anodized to form an oxide layer 110 on the surface (FIG. 1D). Here, the anodic oxidation is performed in an ethylene glycol solution containing tartaric acid at 1 to 5%, the voltage is first increased to 220 V at a constant current, and the state is maintained for 1 hour to complete the treatment. The thickness of the obtained oxide layer 110 is 200 nm. Note that the thickness of the oxide layer 110 has a length that defines the offset gate region in a later ion doping process, and thus the length of the offset gate region can be determined in the above-described anodic oxidation process.

Next, impurities (phosphorus) are implanted into the active region by ion doping using the gate electrode 109 and the oxide layer 110 around the gate electrode 109 as a mask. Phosphine (PH ₃ ) is used as the doping gas, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and the dose is 1 × 10 4
¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 2 × 10 ¹⁵ cm ⁻² . By this step, the regions 112 and 113 into which the impurities are implanted later become the source and drain regions of the TFT, and the region 111 which is masked by the gate electrode 109 and the surrounding oxide layer 110 and into which the impurities are not implanted becomes the channel region of the TFT later. Become.

Thereafter, as shown in FIG. 1D, annealing is performed by irradiating a laser beam to activate the ion-implanted impurities, and at the same time, the crystal of the portion whose crystallinity has been degraded in the above-described impurity introduction step. Improve sex. On this occasion,
XeCl excimer laser (wavelength 308 nm, pulse width 40 nsec) is used as a laser to be used, and irradiation is performed at an energy density of 150 to 400 mj / cm ² , preferably 200 to 250 mj / cm ² . The sheet resistance of the N-type impurity (phosphorus) regions 112 and 113 thus formed is 200 to 800 Ω / □.

Subsequently, a silicon oxide film or a silicon nitride film having a thickness of about 600 nm is formed as the interlayer insulating film 114. In the case of using a silicon oxide film, if TEOS is used as a raw material and formed by plasma CVD with oxygen or by low pressure CVD or atmospheric pressure with ozone, excellent step coverage can be obtained. An interlayer insulating film is obtained. Further, if a silicon nitride film formed by a plasma CVD method using SiH ₄ and NH ₃ as source gases is used,
By supplying hydrogen atoms to the interface between the active region and the gate insulating film, T
This has the effect of reducing dangling bonds that degrade FT characteristics.

Next, a contact hole 114a is formed in the interlayer insulating film 114, and a metal material, for example, a two-layer film of titanium nitride and aluminum is used to form the electrode wiring 11 of the TFT.
5, 116 are formed. At this time, the titanium nitride film is provided as a barrier film for preventing aluminum from diffusing into the semiconductor layer. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm.
Is completed.

When this TFT is used as an element for switching a pixel electrode, the electrode 115 or
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used for a thin film integrated circuit, a contact hole may be formed also on the gate electrode 109 and a necessary wiring may be provided.

The NTF manufactured according to the above embodiment
T is a field-effect mobility of 120 to 150 cm ² / Vs,
The S value exhibited good characteristics of 0.2 to 0.4 V / digit and a threshold voltage of 2 to 3 V. Here, the S value is a rise coefficient in a subthreshold region of the TFT. In the graph showing the relationship between the gate voltage and the drain current, the slope of the graph at the point where the drain current rises steeply is expressed by 1 This is shown by the change in gate voltage when the number of digits increases. The variation in TFT characteristics within the substrate is as follows:
The field effect mobility was within ± 12% and the threshold voltage was within ± 8%.

As described above, in this embodiment, the active region 103i formed on the surface of the insulating base film 102 of the substrate 101 is formed.
Has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film 103 by heating, so that the crystalline silicon film 103a constituting the active region, which is obtained by crystallization of the amorphous silicon film, There is an effect that the material can have higher crystallinity than that obtained by a normal solid phase growth method.

Further, since the crystallization of the amorphous silicon film 103 by heating is promoted by the catalyst element, a high-quality crystalline silicon film 103a can be formed with high productivity. Since the temperature can be suppressed to 600 ° C. or lower, there is an effect that an inexpensive glass substrate can be used.

Since the crystalline silicon film 103i obtained by the heat treatment of the amorphous silicon film 103 is subjected to a laser beam irradiation treatment, the silicon film 10 constituting the active region is formed.
This has the effect of further improving the crystallinity of 3i and further improving the field effect mobility of carriers in the active region.

The concentration of the catalyst element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
atoms / cm ³ , the amorphous silicon film 1
In the case of crystallization of 03, there is an effect that this catalytic element can function effectively.

Further, a thin film 106 containing a catalyst element for promoting crystallization of the amorphous silicon film 103 is formed on the amorphous silicon film 103, and the catalyst element is converted from the thin film 106 by thermal diffusion. Since it is introduced into the silicon film 103, there is an effect that the variation in the addition amount of the catalyst element in the plane of the substrate can be reduced.

The amorphous silicon film 10 of the catalyst element
3 is introduced via the diffusion preventing film 105, so that most of the catalyst element is transferred from the thin film 106 to the amorphous silicon film 1.
On the way to 03, the trapping is carried out by the diffusion preventing film 105, so that the introduction of the catalytic element can be carried out in a necessary minimum amount. The thin film 10
Even when there is a variation in the concentration of the catalyst element in 6, the variation is reduced when the catalyst element diffuses in the diffusion prevention film 105.

[Embodiment 2] FIGS. 2A and 2B are plan views for explaining a thin film transistor and a method of manufacturing the same according to a second embodiment of the present invention, and FIG. −
FIG. 3A to FIG. 3F are cross-sectional views corresponding to the line A ′, and FIG. 3A to FIG. 3F show a method of manufacturing the TFT of this embodiment in the order of steps.

In the figure, reference numeral 200 denotes a semiconductor device having a P-type thin film transistor (TFT) 20.
Is an N-type TFT in the semiconductor device of the first embodiment.
10 has exactly the same cross-sectional structure. In FIGS. 2 and 3, the components of this embodiment denoted by reference numerals in the 200's are the same as those in the 100's in the first embodiment shown in FIG. 1 except for the mask 204 made of a silicon nitride film or the like. These correspond to the components denoted by reference numerals. However, in this embodiment, the crystalline silicon film 203i is formed from the crystallized silicon region 203a in the vicinity thereof so that the crystal growth proceeds in a direction parallel to the substrate surface.
3b. The crystallized silicon region 203a and the lateral crystal region 203b contain a catalyst element (Ni) that promotes crystallization of the amorphous silicon film by heat treatment, and the crystal grains in the film are substantially in a single crystal state. It consists of crystals or columnar crystals.

Next, the manufacturing method will be described. First, a base film 202 made of silicon oxide having a thickness of about 200 nm is formed on a glass substrate 201 by, for example, a sputtering method. Next, an intrinsic (I-type) amorphous silicon film (a-Si film) 203 having a thickness of 25 to 100 nm, for example, 50 nm is formed by a low pressure CVD method or a plasma CVD method.

Next, on the amorphous silicon film 203, a mask layer 204 made of a silicon oxide film, a silicon nitride film or the like and having a mask opening 204a at a predetermined position is formed.
In the opening 204a of the mask 204, the a-Si film 203 is exposed in a slit shape. That is, when the state of FIG. 3A is viewed from above, the a-Si film 203 is exposed in a slit shape in the region 200a, and the other portions are in a masked state. Here, as shown in FIG.
The TFT 20 is manufactured so that the source and drain regions 212 and 213 are arranged in the lateral crystal growth direction 207. As shown in FIG. 2B, the source and drain regions 212 and 213 are formed.
Even if TFTs 3 are arranged in a direction perpendicular to the direction 207, a TFT can be manufactured without any problem by the same method.

After forming the mask 204, FIG.
As shown in (b), an oxide film 205 is formed in a region 200a where the surface of the a-Si film 203 is exposed. Oxide film 2
The method of forming 05 was the same as in Example 1, using a mixed solution of sulfuric acid and hydrogen peroxide solution under the same conditions. Subsequently, a nickel thin film 206 is formed. At this time, the thickness of nickel is set to 1 nm to 10 nm. In this embodiment, the thickness is set to about 5 nm. Then, this is heated in an inert atmosphere, for example, at a heating temperature of 550 ° C.
Annealing for 16 hours with the amorphous silicon film 203
Is crystallized.

At this time, in the region 200a, the nickel thin film 206 diffuses in the oxide film 205 and a part of the nickel thin film 206 reaches the surface of the a-Si film 203. Then, a-Si
The substrate 201 is formed by using nickel reaching the surface of the film 203 as a nucleus.
Crystallization of the silicon film 203 occurs in a direction perpendicular to
A crystalline silicon film 203a is formed. At the same time as the crystallization, nickel diffuses into the film. As a result, the nickel concentration in the crystalline silicon film 203a is 1 × 10 ¹⁸ atom
ms / cm ³ . At this time, nickel is in region 2
The portion other than 00 a is blocked by the mask film 204 and cannot reach the lower a-Si film 203. And
In the peripheral region of the region 200a, as shown by an arrow 207 in FIG. 3C, crystal growth is performed in a lateral direction (a direction parallel to the substrate) from the region 200a, and the crystalline silicon film 203b having the lateral crystal growth is formed. Is formed. The other region of the amorphous silicon film 203 remains as the amorphous silicon film region 203c. The nickel concentration in the laterally grown crystalline silicon film 203b is 5 × 10 ¹⁶ at.
oms / cm ^3, which is also referred to as the seed region.
The value is at least one digit smaller than that of 3a. In the above crystal growth, the distance of crystal growth in a direction parallel to the substrate indicated by arrow 207 is about 80 μm.

Thereafter, the mask 204 and the oxide film 205
Is removed, and unnecessary portions of the silicon film 203 are removed to perform element isolation. Through the above steps, an island-shaped crystalline silicon film 203i to be an active region (source / drain region and channel region) of the TFT later is formed (FIG. 3).
(D)).

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 208 so as to cover the crystalline silicon film 203i to be the active region. In this embodiment, a sputtering method is used as a method for forming the gate insulating film 208. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 200 to 400 ° C., for example, 350 ° C.
C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1 or less.

Subsequently, by a sputtering method,
A 400-nm-thick aluminum film is formed. Then, after patterning the aluminum film to form the gate electrode 209, the gate electrode 2 is formed by ion doping.
Using the mask 09 as a mask, an impurity (boron) is implanted into the active region. Diborane (B ₂ H ₆ ) is used as a doping gas, the acceleration voltage is set to 40 kV to 80 kV, for example, 65 kV, and the dose is set to 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . I do. By this step, the regions 212 and 213 into which the impurities are implanted are later formed into the source of the TFT,
A region 211 which becomes a drain region and is masked by the gate electrode 209 and into which impurities are not implanted will later become a channel region of the TFT.

Thereafter, as shown in FIG. 3E, annealing is performed by irradiating a laser beam to activate the ion-implanted impurities, and at the same time, the crystal of the portion where the crystallinity is deteriorated in the above-described impurity introducing step is increased. Improve sex. On this occasion,
As a laser to be used, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) is used, and the energy density is 150 to 400 mj / cm ² , preferably 20
Irradiation was performed at 0 to 250 mj / cm ² . The sheet resistance of the P-type impurity (boron) regions 212 and 213 thus formed was 500 to 900 Ω / □.

Subsequently, a silicon oxide film having a thickness of about 600 nm is formed as the interlayer insulating film 214. In the case of using a silicon oxide film, TEOS is used as a raw material and a plasma CVD method using the same and oxygen or a reduced pressure C using the same and ozone.
When formed by the VD method or the normal pressure CVD method, a good interlayer insulating film having excellent step coverage can be obtained.

Next, a contact hole 214a is formed in the interlayer insulating film 214, and a metal material such as a two-layer film of titanium nitride and aluminum is used to form the electrode wiring 21 of the TFT.
5, 216 are formed. Then, finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen plasma atmosphere, and FIG.
The TFT 20 shown in (f) is completed.

When the present TFT is used as an element for switching a pixel electrode, the electrode 215 or 216 is connected to
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used for a thin film integrated circuit, a contact hole may be formed also on the gate electrode 209 and a necessary wiring may be provided.

The PTF manufactured according to the above embodiment
T exhibited good characteristics such as a field effect mobility of 35 to 50 cm ² / Vs, an S value of 0.9 to 1.2 V / digit, and a threshold voltage of -5 to -6 V. Variations in TFT characteristics within the substrate are ± 10% in field effect mobility and approximately ± 5 in threshold voltage.
%.

In this embodiment, in addition to the effects of the above embodiment, the catalyst element in the thin film 206 is selectively diffused into the amorphous silicon film 203 via the diffusion preventing film 205 by heat treatment. Then, the amorphous silicon 203 is selectively crystallized, and by subsequent heat treatment, crystal growth is performed from the crystallized portion 203a in a direction 207 substantially parallel to the substrate surface. Since the lateral crystal growth region 203b is formed, there is an effect that a crystallized region 203b having much better crystallinity can be obtained as compared with the region 203a into which the catalytic element is introduced.

[Embodiment 3] FIG. 4 is a plan view for explaining a thin film transistor and a method of manufacturing the same according to a third embodiment of the present invention, and FIG. 5 is a cross-sectional view corresponding to the line BB 'in FIG. 5 (a) to 5 (e) show a method of manufacturing a TFT of this embodiment in the order of steps.

In the figure, reference numeral 300 denotes a semiconductor device of this embodiment, which includes a peripheral drive circuit of an active matrix type liquid crystal display device and a CMOS circuit 30 which forms a general thin film integrated circuit. The circuit of this CMOS configuration is
An N-type TFT 31 and a P-type TFT 32 are connected so that they perform complementary operations, and are formed on a glass substrate 301.

The N-type TFT 31 and the P-type TFT 32 are formed on a glass substrate 301 via an insulating base film 302 such as a silicon oxide film. The insulating base film 3
On the surface 02, island-shaped crystalline silicon films 303n and 303p constituting the TFTs 31 and 32 are formed adjacent to each other. The central portions of the crystalline silicon films 303n and 303p are an N channel region 311 and a P channel region 312, respectively. Both sides of the crystalline silicon film 303n are N-type source / drain regions 31 of an N-type TFT.
3, 314, and both sides of the crystalline silicon film 303p are P-type source / drain regions 315, 316 of a P-type TFT.
It has become.

On the N channel region 311 and the P channel region 312, aluminum gate electrodes 309 and 310 are provided via a gate insulating film 308.
The entire surface of the TFTs 31 and 32 is an interlayer insulating film 317.
N-type TF of the interlayer insulating film 317
A contact hole 317n is formed in a portion corresponding to the source and drain regions 313 and 314 of T31, and a contact hole 317p is formed in a portion of the interlayer insulating film 317 corresponding to the source and drain regions 315 and 316 of the P-type TFT 32. Is formed. And the N-type TFT 31
Are connected to the electrode wirings 318 and 319 through the contact holes 317n. The source and drain regions 315 and 316 of the P-type TFT 32 are connected to the contact holes 317.
They are connected to the electrode wirings 319 and 320 via p.

In this embodiment, the crystalline silicon films 303n and 303p are formed in one catalyst element added region 303.
This is a part of the laterally grown crystalline silicon film 303b on both sides that has been laterally crystal-grown from a.

Next, the manufacturing method will be described. First, a base film 302 made of silicon oxide having a thickness of about 100 nm is formed on a glass substrate 301 by, for example, a sputtering method. Next, by a low pressure CVD method, a thickness of
An intrinsic (I-type) amorphous silicon film (a-Si film) 303 having a thickness of 0 nm, for example, 50 nm is formed.

Next, a mask layer 304 made of a silicon oxide film or a silicon nitride film having a thickness of about 50 nm is formed on the amorphous silicon film 303. The mask layer 304 is selectively removed to form a catalyst element injection opening 304a.

In this opening 304a, a
-The Si film 303 is exposed. That is, when the state of FIG. 5A is viewed from above, the a-Si film 303 is exposed in a slit shape in the region 300a, and the other portions are in a masked state.

After the formation of the mask 304, FIG.
As shown in (b), an oxide film 305 is formed in a region 300a where the surface of the a-Si film 303 is exposed. Oxide film 3
As a method for forming 05, a thermal oxidation method in which a substrate is held in a steam atmosphere and a heat treatment at a temperature of about 600 ° C. is performed is used. With this method, it takes about 3 minutes to process in about 30 minutes.
An oxide film of about nm is formed. Subsequently, a nickel thin film 306 is formed thereon. At this time, the thickness of the nickel thin film 306 is set to be 1 nm to 10 nm.
In this embodiment, the thickness is set to, for example, about 5 nm. Then, under an inert atmosphere, for example, at a heating temperature of 550
Annealing at 16 ° C. for 16 hours to form an amorphous silicon film 30
3 is crystallized.

At this time, in the region 300a, nickel diffuses in the oxide film 305, and
The film reaches the surface of the film 303. Then, crystallization of the silicon film 303 occurs in the direction perpendicular to the substrate 301 with nickel as a nucleus reaching the surface of the a-Si film 303, and a crystalline silicon film 303a is formed. At the same time as the crystallization, nickel diffuses into the film. As a result, the crystalline silicon film 30
The nickel concentration in 3a is 5 × 10 ¹⁷ atoms / cm ³
About. At this time, nickel is blocked by the mask film 304 in a portion other than the region 300 and the underlying a-Si film 30 is formed.
3 cannot be reached. In a peripheral region of the region 300a, as shown by an arrow 307 in FIG. 5B, crystal growth is performed in a lateral direction (a direction parallel to the substrate) from the region 300a, and the crystalline silicon film having the lateral crystal growth is formed. 303b are formed. Other amorphous silicon film 30
Region 3 remains as an amorphous silicon film region 303c.

The crystalline silicon film 3 grown by the lateral crystal growth
The nickel concentration in 03b is 1 × 10 ¹⁶ atoms / cm
It is about ³ and compared to the crystalline silicon film 303a grown by crystal growth by directly adding nickel, which can be called the seed region.
After all, it is smaller than one digit. In the above crystal growth, the distance that crystal growth proceeds in a direction parallel to the substrate indicated by arrow 307 is about 80 μm.

Subsequently, the mask 304 and the oxide film 3
05 is removed, and irradiation with a laser beam promotes the crystallinity of the crystalline silicon film 303b. The laser light at this time was a XeCl excimer laser (wavelength 308 n).
m, pulse width 40 nsec). Irradiation of the laser beam is performed when the substrate is irradiated at 200 to 450 ° C., for example, 400 ° C.
C. and maintained at an energy density of 200-4
The process is performed at 00 mj / cm ² , for example, 300 mj / cm ² .

Thereafter, as shown in FIG.
The crystalline silicon films to be the active regions (element regions) 303n and 303p of the FT are left, and the other regions are removed by etching to separate elements.

Next, a 100 nm-thick film is formed so as to cover the crystalline silicon films 303n and 303p serving as the active regions.
Is formed as a gate insulating film 308.
In this embodiment, as the method for forming the gate insulating film 308, T
Using EOS as a raw material, with oxygen at a substrate temperature of 350 ° C.
Decomposed and deposited by RF plasma CVD.

Subsequently, as shown in FIG. 5D, aluminum (containing 0.1 to 2% of silicon) having a thickness of 400 to 800 nm, for example, 500 nm is formed by a sputtering method, and the aluminum film is patterned. Thus, gate electrodes 309 and 310 are formed.

Next, impurities (phosphorus and boron) are implanted into the active regions 303n and 303p using the gate electrodes 309 and 310 as a mask by ion doping. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas. In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV.
40 kV to 80 kV, for example, 65 kV, the dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, phosphorus is 2 × 10
¹⁵ cm ^-2 and boron are set to 5 × 10 ¹⁵ cm ^-2 . By this step, a region which is masked by the gate electrodes 309 and 310 and into which impurities are not implanted is later formed into the channel region 31 of the TFT.
1, 312. At the time of doping, selective doping of each element is performed by covering a region where doping is unnecessary with a photoresist. As a result,
N-type impurity regions 313 and 314, P-type impurity region 3
15 and 316 are formed, and an N-channel TFT (NTFT) and a P-channel TFT (P
TFT).

Thereafter, as shown in FIG. 5D, annealing is performed by irradiation with a laser beam to activate the ion-implanted impurities. As a laser beam, a XeCl excimer laser (wavelength 308 nm, pulse width 40 ns)
As for the irradiation condition of the laser beam using c), two shots were irradiated at one place at an energy density of 250 mj / cm ² .

Subsequently, as shown in FIG.
A 00 nm silicon oxide film is formed as an interlayer insulating film 317 by a plasma CVD method, and contact holes 317n and 317p are formed in the silicon oxide film, and a metal material, for example, a two-layer film of titanium nitride and aluminum is used to form a TFT electrode wiring 318, 319 and 320 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete the TFTs 31 and 32.

The CMO manufactured according to the above embodiment
In the S structure circuit, the field effect mobility of each TFT is 150 to 180 cm ² / Vs for NTFT and PTFT
Is as high as 120 to 140 cm ² / Vs, and the threshold voltage is NT.
Very good characteristics of 1.5 to 2 V for FT and -2 to -3 V for PTFT.

The third embodiment having such a structure has the same effect as the second embodiment.

Although the third embodiment according to the present invention has been specifically described above, the present invention is not limited to the above-described embodiment, and various modifications based on the technical idea of the present invention are possible. is there.

For example, in the above three embodiments,
As a method for introducing nickel, a method of oxidizing a thin film of the surface of an amorphous silicon film and forming a nickel thin film thereon by a vapor deposition method to add a small amount of nickel and perform crystal growth is employed. However, the oxide film formed on the surface of the amorphous silicon film may be formed not only by the thin film oxidation method described above but also by a normal deposition method. Also, as a method of forming a nickel thin film, not only the above-described vapor deposition method,
A plating method, a low-power sputtering method, or a CVD method depending on the type of the catalyst element can be used.
Before the formation of the amorphous silicon film, a nickel ultra-thin film and a thin oxide film may be formed on a base film, and nickel may be diffused from a lower layer for crystal growth. That is, crystal growth may be performed from the upper surface side or the lower surface side of the amorphous silicon film.

Further, the same effect can be obtained by using cobalt, palladium, platinum, copper, silver, gold, indium, tin, aluminum, phosphorus, arsenic, and antimony in addition to nickel as the impurity metal element that promotes crystallization. can get.

In this embodiment, as a means for promoting the crystallinity of the crystalline silicon film, a heating method by irradiating an excimer laser which is a pulse laser is used. However, other lasers (for example, a continuous oscillation Ar laser) may be used. Similar processing is possible. In addition, the sample is heated to 1000 to 1200 ° C. (temperature of a silicon monitor) in a short time by using infrared light or light emitted from a flash lamp (so-called strong light) instead of laser light to heat the sample.
TA (rapid thermal annealing) or RT
A heat treatment also called P (rapid thermal process) may be used.

Further, as an application of the present invention, in addition to an active matrix type substrate for liquid crystal display, for example, a contact type image sensor, a thermal head with a built-in driver, an organic EL (Electroluminescence) element or the like is used as a light emitting element. An optical writing element or display element with a built-in driver, a three-dimensional IC, or the like can be considered. Here, the organic EL device is an electroluminescent device using an organic material as a light emitting material.
By using the present invention, high performance such as high speed and high resolution of these elements can be realized.

Further, the present invention is not limited to the MOS type transistors described in the above embodiments, but is widely applied to all semiconductor processes of devices such as bipolar transistors and electrostatic induction transistors using a crystalline semiconductor as a device material. can do.

[0129]

As described above, according to the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate is
Since the structure containing a catalytic element that promotes crystallization of the amorphous silicon film by heating, obtained by crystallization of the amorphous silicon film, the crystalline silicon film constituting the active region,
There is an effect that the material can have higher crystallinity than that obtained by a normal solid phase growth method.

Further, since the crystallization of the amorphous silicon film by heating is promoted by the catalytic element, a high-quality crystalline silicon film can be formed with high productivity. Moreover, at this time, the heating temperature required for crystallization can be suppressed to 600 ° C. or less, so that there is an effect that an inexpensive glass substrate can be used.

The concentration of the catalytic element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , there is an effect that this catalyst element can function effectively when the amorphous silicon film is crystallized.

According to the method of manufacturing a semiconductor device according to the present invention, a thin film containing a catalyst element for promoting crystallization of an amorphous silicon film is formed on the amorphous silicon film, and the thin film is thermally diffused from the thin film. Since the above-mentioned catalyst element is introduced into the amorphous silicon film, there is an effect that variation in the addition amount of the catalyst element in the substrate surface can be reduced.

Further, since the introduction of the catalyst element into the amorphous silicon film is carried out via the diffusion preventing film, most of the catalyst element is transferred from the thin film to the amorphous silicon film during the diffusion preventing film. , And the catalyst element can be introduced in a necessary minimum amount. Further, even when the concentration of the catalytic element in the thin film varies, the variation is reduced when the catalytic element diffuses in the diffusion preventing film.

According to the method of manufacturing a semiconductor device of the present invention, the catalyst element in the thin film is selectively diffused into the amorphous silicon film through the diffusion preventing film by heat treatment, By selectively crystallizing silicon, and subsequent heat treatment, crystal growth is performed from the crystallized portion in a direction substantially parallel to the substrate surface to form a lateral crystal growth region in the amorphous silicon film. Therefore, there is an effect that a crystallized region having much better crystallinity can be obtained as compared with the region into which the catalytic element is introduced.

Thus, by using the present invention,
A semiconductor device having a high-performance thin film transistor having uniform and stable characteristics over a large-area substrate can be obtained by a simple manufacturing process. In particular, in a liquid crystal display device, pixel switching TF required for an active matrix substrate
A driver monolithic active matrix substrate having an active matrix section and a peripheral drive circuit section on the same substrate can be realized while simultaneously satisfying the uniformity of T characteristics and the high performance required for the TFTs constituting the peripheral drive circuit section. ,
There is an effect that the module can be reduced in size, performance, and cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention.

FIG. 2 is a plan view illustrating a semiconductor device and a method of manufacturing the same according to a second embodiment of the present invention.

FIG. 3 is a sectional view illustrating a method of manufacturing the semiconductor device according to the second embodiment in the order of steps;

FIG. 4 is a plan view illustrating a semiconductor device and a method of manufacturing the same according to a third embodiment of the present invention.

FIG. 5 is a sectional view illustrating a method of manufacturing the semiconductor device according to the third embodiment in the order of steps.

FIG. 6 is a graph showing the relationship between the diffusion coefficient of a diffusion prevention film and the amount of a catalyst element introduced into an amorphous silicon film.

[Explanation of symbols]

10, 20, 31 N-type TFT 30 CMOS circuit 32 P-type TFT 100, 200, 300 Semiconductor device 200a, 300a Nickel trace addition region 101, 201, 301 Glass substrate 102, 202, 302 Base insulating film 103, 203, 303 Non Amorphous silicon film 103a, 203a, 303a Crystalline silicon film 103i, 203i, 303n, 303p Active region 105, 205, 305 Oxide film 106, 206, 306 Catalyst element thin film 207, 307 Crystal growth direction 108, 208, 308 Gate insulation Films 109, 209, 309, 310 Gate electrode 110 Anodized layer 111, 211, 311, 312 Channel region 112, 113, 212, 213, 313, 314, 3
15, 316 Source / drain regions 114, 214, 317 Interlayer insulators 114a, 214a, 317n, 317p Contact holes 115, 116, 215, 216, 318, 319, 3
20 Electrode wiring 203b, 303b Lateral crystal growth region 204, 304 Mask

──────────────────────────────────────────────────続 き Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/20

Claims (12)

(57) [Claims] A substrate having an insulating surface; and an active region formed on the insulating surface of the substrate and formed by crystallizing an amorphous silicon film, wherein the active region is subjected to heat treatment or heating. A catalyst element that promotes crystallization of the amorphous silicon film by the treatment and irradiation of laser light or intense light. The catalyst element contained in the crystallized region has a uniform thickness including the catalyst element. A thin film containing the catalytic element, which is introduced into the amorphous silicon film by thermal diffusion from the thin film through a diffusion preventing film for the catalytic element provided between the thin film and the amorphous silicon film. But evaporation method or low power spa
A semiconductor device formed by a sputtering method . 2. A semiconductor device comprising: a substrate having an insulating surface; and an active region formed on the insulating surface of the substrate, the active region being formed by crystallizing an amorphous silicon film. The crystal growth is part of a lateral crystal growth region in which crystal growth proceeds in a direction parallel to the substrate surface from the region, and the crystal grains are substantially in a single crystal state. Alternatively, a catalyst element which promotes crystallization of the amorphous silicon film by heat treatment and laser light or intense light irradiation treatment is contained, and the catalyst element contained in the crystallized region is a uniform catalyst element containing the catalyst element. through diffusion preventing film for said catalytic element disposed between the thickness of the thin film and the amorphous silicon film by thermal diffusion from the film, which has introduced into the amorphous silicon film, the catalytic element Including thin film, evaporation method or low power Path
A semiconductor device formed by a sputtering method . 3. The semiconductor device according to claim 1, wherein the diffusion prevention film for the catalyst element has a diffusion coefficient of 1/10 or less for the catalyst element as compared with the amorphous silicon. 4. The semiconductor device according to claim 1, wherein the diffusion prevention film for the catalyst element is a silicon oxide film or a silicon nitride film. 5. The semiconductor device according to claim 1, wherein the catalyst element is Ni, Co, Pd, Pt, Cu,
A semiconductor device using one or more elements selected from Ag, Au, In, Sn, Al, P, As, and Sb. 6. The semiconductor device according to claim 1, wherein the concentration of the catalyst element in the active region is 1 × 10 ^15.
A semiconductor device having an atom / cm ^{3 of} 1 × 10 ¹⁹ atoms / cm ³ . 7. A step of forming an amorphous silicon film on a substrate, a step of forming a diffusion prevention film for a catalyst element that promotes crystallization of the amorphous silicon film, and a step of forming a uniform film containing the catalyst element. Evaporation of thin film
A step of forming by a low power sputtering method ; and a step of diffusing a catalyst element in the thin film into the amorphous silicon film through the diffusion preventing film by heat treatment, and crystallizing the amorphous silicon. And a method for manufacturing a semiconductor device. 8. A step of forming an amorphous silicon film on a substrate, a step of forming an anti-diffusion film for a catalyst element that promotes crystallization of the amorphous silicon film, and a step of forming a uniform film containing the catalyst element. Evaporation of thin film
The step of forming by a low power sputtering method and the heat treatment for forming the thin film containing the catalyst element selectively diffuse the catalyst element in the thin film into the amorphous silicon film via the diffusion preventing film. At the same time, a step of selectively crystallizing the amorphous silicon film, and a subsequent heat treatment, a crystal is grown from the crystallized portion in a direction substantially parallel to the substrate surface, and is formed in the amorphous silicon film. Forming a lateral crystal growth region. 9. The method for manufacturing a semiconductor device according to claim 7, wherein after the amorphous silicon film is crystallized by the heat treatment, laser light or strong light is applied to the amorphous silicon film. A method for manufacturing a semiconductor device, comprising a step of irradiating a crystal to irradiate the crystal. 10. The method for manufacturing a semiconductor device according to claim 7, wherein a silicon oxide film or a silicon nitride film is formed as the diffusion preventing film. 11. The method for manufacturing a semiconductor device according to claim 10, wherein the silicon oxide film or the silicon nitride film as the diffusion preventing film is formed by thin-film oxidation or thin-film nitridation of the surface of the amorphous silicon film. A method for manufacturing a semiconductor device. 12. The method for manufacturing a semiconductor device according to claim 7, wherein the catalyst element is Ni, Co, Pd, Pt, Cu,
A method for manufacturing a semiconductor device using one or more elements selected from Ag, Au, In, Sn, Al, P, As, and Sb.