JPH08148425A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE: To simultaneously enhance the performance of a semiconductor element and the reduction of metallic element amount in its active region by crystallizing amorphous silicon film by heat treating with the metal silicide film in contact with the amorphous silicon film as the catalyst of crystalline growth. CONSTITUTION: An insular crystalline silicon film 103i for forming a TFT is formed on an insulating base film 102. The center of the film 103i becomes a channel region 110. Its both side parts become source and drain regions 111, 112. The film 103i is crystallized at the amorphous silicon film by heat treating with the metal silicide film 105 in contact with amorphous silicon film 103 as the catalyst of crystalline grown.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a crystalline silicon film obtained by crystallizing an amorphous silicon film as an active region and a manufacturing method thereof. In particular, the present invention is effective for a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate, and can be applied to an active matrix type liquid crystal display device, a contact image sensor, a three-dimensional IC and the like.

[0002]

2. Description of the Related Art In recent years, large-sized, high-resolution liquid crystal display devices,
High-speed, high-resolution contact image sensor, three-dimensional IC
In order to realize the above, an attempt has been made to form a high-performance semiconductor element on an insulating substrate such as glass or on an insulating film. A thin film silicon semiconductor layer is generally used for a semiconductor element used in these devices.

The thin-film silicon semiconductor layer is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low fabrication temperature, can be fabricated relatively easily by the vapor phase method, and have high mass productivity. It is inferior to the silicon semiconductors it has. Therefore, in order to obtain higher speed characteristics in the future, there is a strong demand for establishment of a method for manufacturing a semiconductor device made of a crystalline silicon semiconductor. Known crystalline silicon semiconductors include polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, and semi-amorphous silicon having an intermediate state between crystalline and amorphous.

As a method for obtaining these thin film silicon semiconductor layers having crystallinity, (1) a semiconductor film is formed while the semiconductor film has crystallinity (2) an amorphous semiconductor A film is formed, and then the semiconductor film is made crystalline by the energy of laser light. (3) An amorphous semiconductor film is formed, and then thermal energy is applied to the semiconductor film. To have crystallinity,
Such methods are known.

However, in the method (1), crystallization progresses at the same time as the film forming step. Therefore, in order to obtain crystalline silicon having a large grain size, it is indispensable to increase the thickness of the silicon film. It is technically difficult to uniformly form a film having a film on the entire surface of the substrate. Further, in this method, since the film forming temperature is as high as 600 ° C. or higher, there is a cost problem that an inexpensive glass substrate cannot be used.

Further, in the method (2), since the crystallization phenomenon in the melting and solidification process is utilized, the grain boundaries are favorably processed with a small grain size, and a high quality crystalline silicon film can be obtained. Taking the most commonly used excimer laser as an example, there is a problem that the irradiation area of laser light is small and throughput is low. In addition, the crystallization treatment with laser light is not sufficient in the stability of the laser for uniformly treating the entire surface of a large-area substrate, and is strongly regarded as a next-generation technology.

The method (3) has an advantage that it can be applied to a large area as compared with the methods (1) and (2), but heat treatment for several tens of hours at a high temperature of 600 ° C. or more is required for crystallization. is necessary. On the other hand, considering the use of an inexpensive glass substrate and the improvement of throughput, it is necessary to lower the heating temperature and crystallize it in a shorter time. Therefore, in the method (3), it is necessary to simultaneously solve the above-mentioned conflicting problems.

Further, in the method (3), since the solid phase crystallization phenomenon is utilized, the crystal grains spread parallel to the substrate surface and are several μm.
Although even those with a grain size of 1 appear, the grown crystal grains collide with each other to form a grain boundary, and the grain boundary acts as a trap level for carriers, which is a major cause of lowering the mobility of the TFT. Will end up.

A method for solving the above-mentioned problem of grain boundaries by utilizing the method (3) is disclosed in Japanese Patent Laid-Open No. 5-55142.
Japanese Patent Laid-Open Publication No. 5-136048. In these methods, a foreign particle serving as a nucleus for crystal growth is introduced into the amorphous silicon film, and then a heat treatment is performed to obtain a large-grain crystalline silicon film having the foreign particle as a nucleus.

In the former case, silicon (Si ⁺ ) is introduced into the amorphous silicon film by an ion implantation method, and then a heat treatment is performed to obtain a polycrystalline silicon film having crystal grains with a grain size of several μm.
In the latter, Si particles having a particle diameter of 10 to 100 nm are blown onto the amorphous silicon film together with a high pressure nitrogen gas to form a growth nucleus. It is the same in both cases that a semiconductor element is formed using a high-quality crystalline silicon film in which a foreign substance is selectively introduced into an amorphous silicon film and crystal growth is performed using the foreign substance as a nucleus.

However, in these techniques proposed in Japanese Patent Application Laid-Open No. 5-55142 or Japanese Patent Application Laid-Open No. 5-136048, the introduced foreign matter acts only as growth nuclei, so that the crystal grows. Although it is effective for controlling nucleation and crystal growth direction, the above-mentioned problems in the heat treatment step for crystallization still remain.

In JP-A-5-55142, a temperature of 6
Crystallization is performed by heat treatment at 00 ° C. for 40 hours. Further, in Japanese Patent Laid-Open No. 5-136048, heat treatment is performed at a heating temperature of 650 ° C. or higher. Therefore, these technologies are applied to SOI (Silicon-On-Insulator) substrates and SOS.
Although this is an effective technique for a (Silicon-On-Sapphire) substrate, it is difficult to form a crystalline silicon film on an inexpensive glass substrate to form a semiconductor device using these techniques. For example, Corning 7059 (trade name of Corning Incorporated) used for an active matrix type liquid crystal display device.
Glass has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of the substrate.

In order to solve the above-mentioned various problems, the present inventors have made it possible to lower the temperature required for crystallization and shorten the processing time, and to minimize the influence of grain boundaries. We have found a method for producing a crystalline silicon thin film that is limited to the above.

According to the research conducted by the present inventors, a trace amount of a metal element such as nickel or palladium is introduced into the surface of the amorphous silicon film, and then heating is performed at 550 ° C. for about 4 hours. It has been found that crystallization can be performed by. It is understood that this mechanism is that crystal nucleation with a metal element as a nucleus occurs at an early stage of the heat treatment, and then the metal element serves as a catalyst to promote crystal growth and crystallization rapidly progresses. The crystalline silicon film, which is crystallized by the crystallization promoted by these metal elements, has a twin structure while the amorphous silicon film crystallized by the usual solid phase growth method has a twin crystal structure. Each of the needle-shaped crystals or the columnar crystals is in an ideal single crystal state.

When a TFT is manufactured by using such a crystalline silicon film in the active region, the field effect mobility is 1.2 times that in the case of using the crystalline silicon film formed by the usual solid phase growth method. The present inventors have confirmed that the degree of improvement is improved.

Further, the present inventors selectively introduce a metal element into a part of the amorphous silicon film and heat-treat it, so that the part where the metal element is not introduced becomes a part of the amorphous silicon film. It was found that only the region where the metal element was introduced can be selectively crystallized while remaining as a state. further,
It has been discovered that, by extending the heat treatment time, crystal growth is performed in the lateral direction, that is, in the direction substantially parallel to the substrate surface, from the region where the metal element is selectively introduced.

Inside this lateral crystal growth region, needle-like crystals or columnar crystals whose growth directions are substantially aligned in one direction are crowded together, and metal nuclei are directly introduced into regions where crystal nuclei are randomly generated. In comparison, the crystallinity is good. At this time, the metal element that contributes to crystallization exists at the tip of the needle crystal or the columnar crystal, that is, the tip of crystal growth.

That is, if the metal element functions efficiently for crystallization, the metal element exists only in the crystal growth tip portion where crystallization is performed, and almost exists in the already crystallized lateral crystal growth region. Will not do. Therefore, the concentration of the metal element in the laterally grown crystalline silicon film is about one digit or more smaller than that in the region where the metal element is directly introduced and crystallized. From this point of view, the merit of using this lateral crystal growth region as the active region of the semiconductor element is great.

[0019]

The above-mentioned crystal growth method discovered by the present inventors is a very effective technique, but has two problems.

The first problem is that the crystalline silicon film formed by the above-mentioned crystal growth technique has significantly better crystallinity than the crystalline silicon film formed by the conventional solid phase crystallization. Although it is available, it is hard to say that it has sufficient crystallinity for application to thin film integrated circuits.

FIG. 5 shows a block diagram of an electro-optical system of a liquid crystal display device including a display, a CPU and a memory as one application example of the crystal growth technique.

In the figure, reference numeral 50 denotes a liquid crystal display device, which is a display section 51 for displaying an image by liquid crystal, an X decoder / driver 52 and a Y decoder / driver 5 for driving the display section.
3 and other peripheral drive circuits. Further, the liquid crystal display device 50 is equipped with a memory 56 for storing image information and an auxiliary memory 57, and a CPU 54 for controlling these memories and the X decoder / driver 52 and the Y decoder / driver 53. In addition, 58 is C
An XY branching device for branching the image signal from the PU 54, 55 is an input port for an external signal, and 59 is a backlight.

By the way, a crystalline silicon film region formed by selectively introducing a metal element and growing crystals in the lateral direction is referred to as T
When used in the active region of FT, N-channel type is 80 to 1
00 cm ² / Vs, P-channel type 60 to 80 cm ²
A mobility of about / Vs is obtained.

When this TFT is used in the liquid crystal display device 50 of FIG. 5, in addition to the switching elements in the active matrix region which is the display section, elements of the peripheral drive circuit such as the X decoder / driver and the Y decoder / driver, that is, in FIG. It becomes possible to fabricate the element in the region shown by the alternate long and short dash line on the same substrate in the same step.

However, if a higher degree of integration is realized and all the electro-optical system shown in FIG. 5 can be constructed on one substrate, the cost of the product can be reduced, the module can be made compact, and the mounting process can be simplified. By the way, the CPU
The semiconductor element forming 54 requires higher speed than the semiconductor element forming the peripheral drive circuit.
In the above technique, the CPU cannot be formed on the same substrate together with the active matrix region.

Therefore, at present, an IC chip formed of a single crystal silicon substrate is mounted on an active matrix substrate to deal with it. That is, if a crystalline silicon film having a higher mobility can be formed on a transparent insulating substrate such as glass, not only can the performance of the peripheral drive circuit for driving the active matrix portion be significantly improved, but also one sheet It is possible to form a display device including a display, a CPU, and a memory on a substrate, and to add functions such as an image sensor and a touch operation, but in the conventional method, such a high mobility TFT is used.
No crystalline silicon film having good crystallinity capable of constituting the above has been obtained.

Another problem is the action of the metal element used as a catalyst for crystal growth on the semiconductor element. As a matter of course, the presence of a large amount of the above-mentioned elements in the semiconductor impairs the reliability and electrical stability of the device using these semiconductors and is not preferable. That is, the above metal element that promotes crystallization is necessary when crystallizing amorphous silicon,
It is desirable that the crystallized silicon be contained as little as possible. In order to achieve this purpose, a metal element having a strong tendency to be inactive in crystalline silicon is selected, and at the same time, the amount of the metal element necessary for crystallization is reduced as much as possible.
Although it is necessary to perform crystallization with a minimum amount, it is actually very difficult to control a very small amount of low concentration. Further, these metal elements hardly exist inside the needle-like crystals or columnar crystals, but are ubiquitous in the crystal grain boundaries. Therefore, phenomena such as an increase in leak current in the off region of the TFT and variations in characteristics between the TFTs appear.

The present invention has been made in order to solve the above-mentioned problems, and the crystallization of an amorphous silicon film by a low temperature heat treatment at 600 ° C. or lower using a metal element that promotes the crystallization is performed on the substrate surface. It is possible to improve the performance of semiconductor devices by forming a crystalline silicon film that can be performed with good uniformity within the substrate and reproducibility between substrates, and that has crystallinity better than that obtained by ordinary heat treatment. It is an object of the present invention to obtain a semiconductor device and a method for manufacturing the same, which can simultaneously reduce the amount of metal elements in the active region.

[0029]

The present invention solves the above-mentioned problems and provides a means for satisfying the above-mentioned object, and is stable and uniform on a substrate having an insulating surface such as glass. A high-performance semiconductor device having characteristics is realized. More specifically, the present invention has the following features.

(1) In the semiconductor device according to the present invention, a substrate having an insulating surface and a metal silicide film provided on the insulating surface of the substrate and in contact with the amorphous silicon film are used as a catalyst for crystal growth. And an active region formed by crystallizing the amorphous silicon film by heat treatment, whereby the above object is achieved.

(2) A semiconductor device according to the present invention includes a substrate having an insulating surface, and a metal silicide film provided on the insulating surface of the substrate to promote crystallization of an amorphous silicon film. And an active region formed by performing crystal growth by heat treatment from a portion in contact with the peripheral region, thereby achieving the above object.

(3) In the semiconductor device according to the present invention, the metal silicide film contains N as a constituent metal element.
i, Co, Pd, Pt, Cu, Ag, Au, In, S
It is preferable to contain one or more kinds of elements selected from n, Al and Sb.

(4) In the above semiconductor device according to the present invention, it is preferable that the metal silicide film has a fluorite structure as its crystal structure.

(5) In the above semiconductor device according to the present invention, it is preferable that the metal silicide film is made of NiSi ₂ .

(6) In the method of manufacturing a semiconductor device according to the present invention, an amorphous silicon film and a metal silicide film for promoting crystallization of the amorphous silicon film are formed on the substrate so that they are in contact with each other. It includes a step and a step of crystallizing the amorphous silicon film by heating, whereby the above object is achieved.

(7) In the method of manufacturing a semiconductor device according to the present invention, an amorphous silicon film and a metal silicide film for promoting crystallization of the amorphous silicon film are formed on the substrate. A step of forming the metal silicide film in contact with a part thereof;
A step of selectively crystallizing a region of the amorphous silicon film in contact with the metal silicide film by heat treatment, and continuing the heat treatment to selectively crystallize the amorphous silicon film. The step of growing a crystal from the crystallized region to its peripheral region in a direction substantially parallel to the substrate surface, thereby achieving the above object.

(8) In the method for manufacturing a semiconductor device according to the present invention, the metal silicide film contains Ni, Co, Pd, Pt, Cu, Ag, Au and I as constituent metal elements.
It is preferable to contain one or more kinds of elements selected from n, Sn, Al, and Sb.

(9) In the method for manufacturing a semiconductor device according to the present invention, it is preferable that the metal silicide film has a fluorite structure as its crystal structure.

(10) In the method for manufacturing a semiconductor device according to the present invention, it is preferable that the metal silicide film is made of NiSi ₂ .

[0040]

In the semiconductor device of the present invention, since the active region formed on the insulating surface of the substrate is a region obtained by crystallizing the amorphous silicon film using the metal silicide as a catalyst, the active region is formed. The crystalline silicon film has a crystallinity higher than that obtained by a usual solid phase growth method.

Further, since the metal silicide is in contact with the amorphous silicon film in a thin film state, the crystallization of the amorphous silicon film should be performed uniformly from the part in contact with the metal silicide. Therefore, the crystallinity of the crystalline silicon film forming the active region becomes very good.

Since crystallization of the amorphous silicon film by heating is promoted by the metal silicide, a high quality crystalline silicon film can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower,
Inexpensive glass substrates can be used.

In the present invention, by using a metal silicide film having a fluorite structure as its crystal structure, the crystalline silicon film forming the active region has an ideal diamond structure. Will be close to.

In the present invention, by using a NiSi ₂ film as the metal silicide film, the crystalline structure of the crystalline silicon film forming the active region becomes close to an ideal diamond structure. , Its lattice constant is also very close to that of diamond structure.

In the method of manufacturing a semiconductor device of the present invention, a metal silicide that promotes crystallization of the amorphous silicon film is added.
Since the film is directly formed so as to be in contact with the amorphous silicon film, the region serving as a catalyst for crystallization of the amorphous silicon film can be formed easily and with a uniform composition.

Further, in the method of introducing the metal element into the amorphous silicon film in order to promote the crystallization of the amorphous silicon film, after the silicidation of the metal element is performed, the crystal of the amorphous silicon film is formed by this silicide. In the present invention, since the silicide film is formed so as to be in direct contact with the amorphous silicon film, the step of silicidation of the metal element is omitted, and the silicide region The problem of compositional variation is eliminated. As a result, the subsequent crystal growth becomes stable, the crystal grain size becomes larger than in the conventional method, and dislocations and crystal defects are eliminated in the grains. As a result, a high quality crystalline silicon film is obtained. Due to such improvement in crystallinity, the number of crystal grain boundaries is reduced, the amount of metal elements concentrated in the crystal grain boundaries is reduced, and the amount of metal elements in the active region can be reduced.

Further, as such a metal silicide, Ni, Co, Pd, Pt, Cu, A as its constituent metal elements are used.
By using a material containing one or more kinds of elements selected from g, Au, In, Sn, Al and Sb, the effect of promoting crystallization can be obtained in a small amount.

In the method of manufacturing a semiconductor device according to the present invention, the insulating surface of the substrate is heated by heat treatment from a portion of the amorphous silicon film in contact with the metal silicide film that promotes crystallization thereof to a peripheral region thereof. Since the active region is formed by crystal growth, the active region becomes a region in which the crystal growth direction is aligned in one direction and the crystallinity is remarkably good, and the amount of metal element contained in the active region is further reduced. Become.

[0049]

EXAMPLES The basic principle of the present invention will be described below.

In the conventional method, as a method of introducing a trace amount of a metal element, a method of forming a desired metal element as an extremely thin film (film thickness of 1 nm or less) on the surface of an amorphous silicon film by a vacuum deposition method or a sputtering method, or an ion method The method of introducing into the amorphous silicon film by the injection method and the method of applying a solution containing a metal element are used. In each case, the metal element itself is introduced into the amorphous silicon film. However, as a result of repeated experiments conducted by the present inventors on a daily basis, it is found that the metal contributing to the crystallization of the amorphous silicon film is metal. Not the element itself,
It has been found that the amorphous silicon film and the metal element are metal silicide (silicide) generated by the reaction during the heat treatment step for crystallization.

That is, in the crystallization process of the amorphous silicon film by introducing the metal element, the silicide is formed by the reaction between the metal element and the amorphous silicon film, and the amorphous silicon film is formed by the formed silicide. It is divided into two steps with the crystal growth action. In particular, determining the crystallinity is the first
In the step of forming the silicide in the step, if the silicide is unevenly formed on the surface of the amorphous silicon film, good crystallinity cannot be expected in the crystalline silicon film to be crystal-grown thereafter. In the conventional method, since silicide is formed by heat treatment, silicides having various compositions such as M ₂ Si, MSi, and MSi ₂ (M; metal element) are mixed, and the silicide is locally formed. There was a great variation in the formation of the silicide, such as a region that was not formed. This variation in silicide has a great influence on the crystallinity, causing crystal defects such as dislocations and limiting the crystal grain size.

The present invention is characterized in that the metal silicide (silicide) is formed as a thin film by the direct film forming method. That is, the crystal growth process using a metal element, which has conventionally been two steps, can be simplified to one step by directly forming a silicide film, and the variation of the silicide, which has been a serious problem in the conventional method, can be eliminated. is there. As the film forming method at this time, a vacuum vapor deposition method, a sputtering method, or the like can be used, but in any case, since the composition of the silicide is determined by the source material of the film formation, various compositions such as the conventional method can be used. Silicide is not mixed. Therefore, the subsequent crystal growth becomes stable. In addition, since a continuous silicide film is formed uniformly over the entire surface of the substrate, the crystal grain size becomes larger than in the conventional method, and dislocations and crystal defects are eliminated in the grains. As a result, a high quality crystalline silicon film is obtained.

In the present invention, the most remarkable effect can be obtained when Ni is used as the metal element, but other types of metal elements that can be used include Co, Pd,
Examples thereof include Pt, Cu, Ag, Au, In, Sn, Al and Sb. A single element or a plurality of elements selected from these elements have a small amount of the effect of promoting crystallization, and therefore have little effect on the semiconductor element.

Further, as the silicide film used in the present invention, one having a fluorite type crystal structure is more preferable. The reason for this is largely related to the crystal growth process of the amorphous silicon film. Although the mechanism is still not well understood, it is speculated that when the silicide crystallizes the amorphous silicon film, the silicide acts as a kind of template for crystallization of the amorphous silicon film. ing. In fact, the crystal structure of the crystalline silicon film after crystal growth greatly changes depending on the crystal structure of the silicide. The ideal crystal structure of the crystalline silicon film is a diamond structure as shown in FIG. 4A, and in order to grow such a crystal structure, a silicide having a crystal structure close to the diamond structure is used as a template. is necessary. The crystal structure of the silicide considered at present, which is the closest to the diamond structure, is the fluorite structure shown in FIG. 4B, and NiS is used as the silicide having the crystal structure.
i ₂ and CoSi ₂ . Therefore, when an amorphous silicon film is crystallized using a silicide having such a crystal structure, a crystalline silicon film exhibiting higher crystallinity than when a silicide having another crystal structure is used can be obtained.

Among the silicides having a fluorite type crystal structure, NiSi ₂ has a lattice constant a of 5.406 angstroms, which is very high in the lattice constant (a = 5.430 angstrom) in the diamond structure of crystalline silicon. Has a value close to. Therefore, NiSi ₂ is the best template for crystallizing the amorphous silicon film, and the crystalline silicon film crystallized by NiSi ₂ has a higher crystallinity than that of other silicides. It is possible to obtain a crystalline silicon film having

[Embodiment 1] FIG. 1 is a cross-sectional view for explaining a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention, and FIGS. The manufacturing method of the TFT of the example is shown in the order of steps.

In the figure, reference numeral 100 denotes a semiconductor device having an N-type thin film transistor (TFT) 10.
Is formed on a glass substrate 101 with an insulating base film 102 such as a silicon oxide film interposed therebetween. The insulating base film 10
An island-shaped crystalline silicon film 103i forming the above TFT is formed on the TFT 2. This crystalline silicon film 103
A central portion of i is a channel region 110, and both side portions thereof are source and drain regions 111 and 112. An aluminum gate electrode 108 is provided on the channel region 110 via a gate insulating film 107. The surface of the gate electrode 108 is covered with the oxide layer 109. The entire surface of the TFT 10 is covered with an interlayer insulating film 113, and a contact hole 113a is formed in a portion of the interlayer insulating film 113 corresponding to the source / drain regions 111 and 112. The source / drain regions 111 and 112 are provided with electrode wirings 114, through the contact holes 113a.
It is connected to 115.

In this embodiment, the crystalline silicon film 103i is formed by crystallizing the amorphous silicon film by heat treatment using the metal silicide film 105 in contact with the amorphous silicon film 103 as a catalyst for crystal growth. The crystal grains in this film are needle crystals or columnar crystals in a substantially single crystal state.

Of course, the TFT 10 of this embodiment can be used as an element forming a driver circuit or a pixel portion of an active matrix type liquid crystal display device.
CPU mounted on the same substrate as these circuits and pixel parts
It can also be used as an element constituting the. In addition, T
The application range of FT is not limited to liquid crystal display devices,
It goes without saying that it can be applied to a thin film integrated circuit generally called.

Next, the manufacturing method will be described. First, a base film 102 made of silicon oxide and having a thickness of about 200 nm is formed on a glass substrate 101 by, for example, a sputtering method. This silicon oxide film is provided to prevent the diffusion of impurities from the glass substrate. Next, a thickness of 25 to 100 n is obtained by a low pressure CVD method or a plasma CVD method
An intrinsic (I-type) amorphous silicon film (a-Si film) 103 having a thickness of, for example, 80 nm is formed.

Next, as shown in FIG. 1A, a thin film 105 of NiSi ₂ is formed on the surface of the a-Si film 103 by, for example, a vacuum evaporation method. The appropriate film thickness at this time is 1 nm to
It is about 10 nm, and is 3 nm in this embodiment.

Then, this is annealed in a hydrogen reducing atmosphere or an inert atmosphere at a heating temperature of 520 to 580 ° C. for several hours to several tens of hours, for example, at 550 ° C. for 4 hours to be crystallized. At this time, as shown in FIG. 1B, the NiSi ₂ film 105 deposited on the surface of the amorphous silicon film 103 serves as nuclei, and the crystal of the amorphous silicon film 103 is perpendicular to the substrate 101 in the direction 106. Of the crystalline silicon film 10
3a is formed.

Next, as shown in FIG. 1C, unnecessary portions of the crystalline silicon film 103a are removed to perform element isolation, and then the active regions (source / drain regions, channel regions) of the TFT are formed. The island-shaped crystalline silicon film 103i is formed.

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 107 so as to cover the crystalline silicon film 103i to be the active region. Here, the silicon oxide film is formed by TEOS.
(Tetra Ethoxy Ortho Silica
te) as a raw material and this is used together with oxygen at a substrate temperature of
Decomposition and deposition were performed by RF plasma CVD at ˜600 ° C., preferably 300-450 ° C. The silicon oxide film is made of TEOS as a raw material, and this is used together with ozone gas by a low pressure CVD method or a normal pressure CVD method at a substrate temperature of 350 to 650 ° C., preferably 400 to 650 ° C.
It may be formed by processing at 550 ° C. After this film formation, in order to improve the bulk characteristics of the gate insulating film itself and the interface characteristics of the crystalline silicon film / gate insulating film, annealing is performed at 400 to 600 ° C. for 30 to 60 minutes in an inert gas atmosphere.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 to 800 nm, for example 600 nm, is formed. Then, the aluminum film is patterned to form the gate electrode 108. Further, the surface of this aluminum electrode is anodized to form an oxide layer 109 on the surface (FIG. 1 (d)). Here, the anodic oxidation is performed in an ethylene glycol solution containing tartaric acid in an amount of 1 to 5%, the voltage is first increased to 220 V with a constant current, and the state is maintained for 1 hour to complete the treatment. The thickness of the obtained oxide layer 109 is 200 nm. Since the thickness of the oxide layer 109 has a length that defines the offset gate region in the subsequent ion doping process, the length of the offset gate region can be determined in the anodizing process.

Next, an impurity (phosphorus) is implanted into the active region by ion doping using the gate electrode 108 and the oxide layer 109 around it as a mask. Phosphine (PH ₃ ) is used as the doping gas, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and the dose amount is 1 × 10.
^{It is set to 15} to 8 × 10 ¹⁵ cm ^-2 , for example, 2 × 10 ¹⁵ cm ^-2 . By this step, the regions 111 and 112 into which the impurities are implanted will later become the source and drain regions of the TFT, and the region 110 which is masked by the gate electrode 108 and the oxide layer 109 around the gate electrode and into which the impurities are not implanted will later become the channel region of the TFT. Become.

Thereafter, as shown in FIG. 1D, annealing is performed by laser light irradiation to activate the ion-implanted impurities, and at the same time, the crystal of the portion where the crystallinity is deteriorated in the above-mentioned impurity introduction step is performed. Improve sex. On this occasion,
As a laser used, a XeCl excimer laser (wavelength 308 nm, pulse width 40 nsec) is used, and irradiation is performed at an energy density of 150 to 400 mJ / cm ² , preferably 200 to 250 mJ / cm ² . The sheet resistance of the N-type impurity (phosphorus) regions 111 and 112 thus formed is 200 to 800 Ω / □.

Subsequently, a silicon oxide film or a silicon nitride film having a thickness of about 600 nm is formed as the interlayer insulating film 113. When a silicon oxide film is used, if TEOS is used as a raw material and the silicon oxide is formed by a plasma CVD method using this and oxygen, or a low pressure CVD method or an atmospheric pressure CVD method using this and ozone, A good interlayer insulating film having excellent step coverage can be obtained. Also, SiH
_If a silicon nitride film formed by plasma CVD using ₄ and NH ₃ as source gases is used, hydrogen atoms are supplied to the interface of the active region / gate insulating film, reducing dangling bonds that deteriorate TFT characteristics. effective.

Next, a contact hole 113a is formed in the interlayer insulating film 113, and the electrode wiring 11 of the TFT is formed by a two-layer film of a metal material such as titanium nitride and aluminum.
4 and 115 are formed. At this time, the titanium nitride film is provided as a barrier film for preventing aluminum from diffusing into the semiconductor layer. And finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm, and then, as shown in FIG.
The TFT 10 shown in is completed.

When the present TFT is used as an element for switching the pixel electrode, the electrode 114 or 115 is I
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used in a thin film integrated circuit, a contact hole may be formed also on the gate electrode 108 and necessary wiring may be provided.

The N-type TFT 10 manufactured in this example is
The field-effect mobility was 90 to 120 cm ² / Vs, and the threshold voltage was ^{2 to 3} V, which are good characteristics.

As described above, in this embodiment, the active region 103i formed on the insulating surface of the substrate is covered with the amorphous silicon film 1.
Since 03 is a region crystallized using a metal silicide as a catalyst, the crystalline silicon film 103a forming the active region is formed.
However, the crystallinity is higher than that obtained by the usual solid phase growth method.

Since the metal silicide is in contact with the amorphous silicon film 103 in a thin film state, the amorphous silicon film 1
The crystallization of No. 03 is performed uniformly from the portion in contact with the metal silicide, and the crystallinity of the crystalline silicon film forming the active region becomes very good.

Further, since the crystallization of the amorphous silicon film by heating is promoted by the metal silicide, the high quality crystalline silicon film 103a can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower, an inexpensive glass substrate can be used.

Further, as the metal silicide film 105, N
Since iSi ₂ is used, the active region 103i
The crystalline structure of the crystalline silicon film that constitutes the crystal structure is close to the ideal diamond structure, and the lattice constant is very close to the lattice constant of the diamond structure.

In this embodiment, a metal silicide that promotes crystallization of the amorphous silicon film 103 is added to the amorphous silicon film 10.
Since the film is directly formed so as to be in contact with No. 3, it is possible to easily form the region that serves as a catalyst for crystallization of the amorphous silicon film and to make its composition uniform.

Further, since the metal silicide film 105 is directly formed, the step of silicidation of the metal element is omitted, and the problem of variation in composition of the silicide region is eliminated. As a result, the subsequent crystal growth becomes stable, the crystal grain size becomes larger than in the conventional method, and dislocations and crystal defects are eliminated in the grains. As a result, a high quality crystalline silicon film 103a is obtained.
Further, due to such improvement in crystallinity, the number of crystal grain boundaries is reduced, the amount of metal elements concentrated in the crystal grain boundaries is reduced, and the amount of metal elements in the active region can be reduced.

[Embodiment 2] FIG. 2 is a plan view for explaining a semiconductor device and a method for manufacturing the same according to a second embodiment of the present invention, and FIG. 3 is a cross-sectional view corresponding to a portion taken along the line AA ′ of FIG. 3 (a) to 3 (e) are TF of this embodiment.
The manufacturing method of T is shown in the order of steps.

In the figure, reference numeral 200 denotes a semiconductor device of this embodiment, which has a peripheral drive circuit of an active matrix type liquid crystal display device and a circuit 20 of CMOS structure which constitutes a general thin film integrated circuit. This CMOS circuit is
The N-type TFT 21 and the P-type TFT 22 are connected so that they perform complementary operations, and are formed on the glass substrate 201.

The N-type TFT 21 and the P-type TFT 22 are formed on a glass substrate 201 with an insulating base film 202 such as a silicon oxide film interposed therebetween. The insulating base film 2
On 02, island-shaped crystalline silicon films 203n and 203p forming the TFTs 21 and 22 are formed adjacent to each other. Central portions of the crystalline silicon films 203n and 203p are an N channel region 210 and a P channel region 211, respectively. Both sides of the crystalline silicon film 203n are N-type source / drain regions 21 of an N-type TFT.
2, 213, both side portions of the crystalline silicon film 203p are P-type source / drain regions 214, 215 of a P-type TFT.
Has become.

Aluminum gate electrodes 208 and 209 are provided on the N-channel region 210 and the P-channel region 211 with a gate insulating film 207 interposed therebetween.
The entire surfaces of the TFTs 21 and 22 are the interlayer insulating film 216.
N-type TF of the interlayer insulating film 216
A contact hole 216n is formed in a portion corresponding to the source / drain regions 212 and 213 of T21, and a contact hole 216p is formed in a portion of the interlayer insulating film 216 corresponding to the source / drain regions 214 and 215 of the P-type TFT 22. Has been formed. The N-type TFT 21
The source / drain regions 212 and 213 are connected to the electrode wirings 217 and 218 through the contact holes 216n. The source / drain regions 214 and 215 of the P-type TFT 22 have the contact holes 216.
It is connected to the electrode wirings 218 and 219 via p.

In this embodiment, the crystalline silicon films 203n and 203p are the portions 20 in contact with the amorphous silicon film 203 and the metal silicide film 205 which promotes the crystallization thereof.
It is a part of the laterally grown crystalline silicon film 203b formed by laterally growing crystals from 0a to its peripheral region by heat treatment.

Next, the manufacturing method will be described. First, a base film 202 made of silicon oxide and having a thickness of about 100 nm is formed on the glass substrate 201 by, for example, a sputtering method. Next, a thickness of 25 to 10
An intrinsic (I-type) amorphous silicon film (a-Si film) 203 having a thickness of 0 nm, for example, 50 nm is formed.

Next, a mask layer 204 made of a silicon oxide film, a silicon nitride film or the like and having a mask opening 204a at a predetermined position is formed on the amorphous silicon film 203. In the opening 204a of the mask 204, a slit-like a
-Si layer 203 is exposed. That is, when the state of FIG. 3A is viewed from the top, the a-Si layer 203 is exposed in a slit shape in the region 200a, and the other portions are masked.

After forming the mask 204 in this way, a NiSi ₂ film 205 is formed by vacuum evaporation, as shown in FIG. 3B. By this step, the a-Si film 2
03 is NiS in the area 200a where the surface is exposed.
It comes into selective contact with the i ₂ film 205. NiS above
The i ₂ film has a thickness of 1 nm to 10 nm.
In this embodiment, the thickness is, for example, about 5 nm. Then, under an inert atmosphere, for example, at a heating temperature of 550 ° C., 16
Perform time annealing.

At this time, in the area 200a, a-S
With the NiSi ₂ film 205 in contact with the surface of the i film 203 as a nucleus, the amorphous silicon film 203 is crystallized in the direction perpendicular to the substrate 201 to form a crystalline silicon film 203a. Then, in the peripheral region of the region 200a, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 200a as indicated by an arrow 206 in FIG. 203b is formed. The other regions of the amorphous silicon film 203 remain as the amorphous silicon film regions 203c. The concentration of nickel in the crystalline silicon film 203b that has grown laterally is 1 ×
The value is about 10 ¹⁶ atoms / cm ³ or less, which is a small value as compared with the conventional method of adding nickel, and is a level that causes almost no problem in device characteristics. The reason why the nickel concentration is reduced is that the crystallinity of the crystalline silicon film 203b is improved as compared with the conventional method. In the crystal growth, the distance of crystal growth in the direction parallel to the substrate indicated by arrow 206 is about 80 μm.

Subsequently, the mask 204 is removed, and FIG.
As shown in (c), the region of the crystalline silicon film 203b grown in the lateral direction is patterned to form island-shaped silicon films 203n and 20n which will become active regions (device regions) of TFTs later.
Form 3p.

Next, a 100 nm-thickness is formed so as to cover the crystalline silicon films 203n and 203p which will be the active regions.
Is formed as the gate insulating film 207.
In this embodiment, the gate insulating film 207 is formed by TEOS.
As a raw material, and with oxygen at a substrate temperature of 350 ° C.,
Decomposition and deposition are performed by the RF plasma CVD method.

Subsequently, as shown in FIG. 3D, an aluminum film (containing 0.1 to 2% of silicon) having a thickness of 400 to 800 nm, for example 500 nm, is formed by a sputtering method, and the aluminum film is patterned. Then, the gate electrodes 208 and 209 are formed.

Next, impurities (phosphorus and boron) are implanted into the active regions 203n and 203p by ion doping using the gate electrodes 208 and 209 as masks. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas. In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and in the latter case,
The dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , and phosphorus is 2 × 10, for example.
¹⁵ cm ^-2 and boron is 5 x 10 ¹⁵ cm ^-2 . By this step, the regions which are masked by the gate electrodes 208 and 209 and into which the impurities are not implanted will be the channel region 21 of the TFT later.
0 and 211. At the time of doping, a region where doping is unnecessary is covered with a photoresist, thereby selectively doping each element. As a result,
N-type impurity regions 212 and 213, P-type impurity region 2
14 and 215 are formed, and as shown in FIG. 3D, an N channel type TFT (N type TFT) 21 and a P channel type TF are formed.
T (P-type TFT) 22 can be formed.

Thereafter, as shown in FIG. 3D, annealing is performed by irradiation with laser light to activate the ion-implanted impurities. As the laser light, an XeCl excimer laser (wavelength 308 nm, pulse width 40 nse
Using c), the laser beam was irradiated under the condition of energy density of 250 mJ / cm ² for 2 shots at one place.

Subsequently, as shown in FIG. 3E, the thickness 6
A silicon oxide film having a thickness of 00 nm is formed as an interlayer insulating film 216 by a plasma CVD method, contact holes 216n and 216p are formed in the film, and a two-layer film of a metal material such as titanium nitride and aluminum is used to form a TFT electrode wiring 217. 218 and 219 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete the TFTs 21 and 22.

In the circuit having the CMOS structure manufactured in this embodiment, the field effect mobility of each TFT is N type T.
In FT21, 130-160 cm ² / Vs, P-type TFT
22 is as high as 90 to 110 cm ² / Vs, the threshold voltage is 1.5 to ² V for the N-type TFT 21 and -3 to -4 V for the P-type TFT 22, and the circuit having the above-mentioned CMOS configuration has very good characteristics. Show.

In this embodiment, in addition to the effects of the above-described embodiment, from the portion of the amorphous silicon film 203, which is in contact with the metal silicide film 205 that promotes its crystallization, on the surface of the insulating base layer 202 of the substrate. Since crystal growth was performed on the peripheral region by heat treatment to form an active region, the active region 203
n and 203p are regions in which the crystal growth directions are aligned in one direction and have extremely good crystallinity, and the amount of metal element contained in the active region is further reduced.

Although the second embodiment of the present invention has been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention. is there.

For example, in the above two examples,
As a method of introducing nickel, a method of forming a NiSi ₂ film on the surface of the amorphous silicon film by vacuum vapor deposition and performing crystal growth was adopted. However, a method of forming a NiSi ₂ film on the base film and diffusing nickel from the lower layer to perform crystal growth may be used before forming the amorphous silicon film. That is,
Crystal growth may be performed from the upper surface side or the lower surface side of the amorphous silicon film. Further, the deposition method of the NiSi ₂ film is not limited to the vacuum vapor deposition method, and other deposition methods such as the sputtering method can be used. Further, as the impurity metal element that promotes crystallization, cobalt, palladium, platinum, copper, silver, gold, indium, tin, aluminum, or antimony can be used in addition to nickel, and similar effects can be obtained as low-temperature crystallization. . In addition, as a silicide film having a fluorite type crystal structure other than NiSi ₂ , CoS is used.
Even if the i ₂ film is used, a good quality crystalline silicon film can be obtained.

When a TFT with higher performance is required, the crystallinity of the crystalline silicon film is further promoted by irradiating laser light or intense light after performing crystal growth as in this embodiment. Good. As a means, XeCl or K
Excimer laser or continuous wave Ar using rF as an oscillation source
A laser can be used. Also, instead of laser light, infrared light or a flash lamp (strong light equivalent to so-called laser light) is used in a short time at 1000 to 1200 ° C.
So-called RTA (Rapid Thermal Annealing) to heat the sample by raising it to (silicon monitor temperature)
Alternatively, a heat treatment called RTP (Rapid Thermal Process) may be used.

Further, as an application of the present invention, in addition to the active matrix type substrate for liquid crystal display, for example, a contact type image sensor, a thermal head having a built-in driver, an organic EL (Electroluminescence) element or the like is used as a light emitting element. A driver-incorporated optical writing element, a display element, a three-dimensional IC, or the like can be considered. Here, the organic EL element is an electroluminescent element using an organic material as a light emitting material.
Further, by using the present invention, high performance such as high speed and high resolution of these elements can be realized.

Furthermore, the present invention is not limited to the MOS type transistors described in the above embodiments, but is widely applied to all semiconductor processes for devices such as bipolar transistors and static induction transistors using a crystalline semiconductor as an element material. can do.

[0100]

As described above, according to the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate is
Since the amorphous silicon film is a region crystallized using a metal silicide as a catalyst, the crystalline silicon film forming the active region has a crystallinity higher than that obtained by a usual solid phase growth method. Can be something.

Further, since the metal silicide is in contact with the amorphous silicon film in a thin film state, the crystallization of the amorphous silicon film should be performed uniformly from the part in contact with the metal silicide. Therefore, the crystallinity of the crystalline silicon film forming the active region becomes very good.

Further, since the crystallization of the amorphous silicon film by heating is promoted by the metal silicide, a high quality crystalline silicon film can be formed with good productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower,
Inexpensive glass substrates can be used.

According to the semiconductor device manufacturing method of the present invention, the metal silicide which promotes crystallization of the amorphous silicon film is directly formed so as to be in contact with the amorphous silicon film.
The region that serves as a catalyst for crystallization of the amorphous silicon film can be formed easily and with a uniform composition.

Further, since the silicide film is directly formed, the step of siliciding the metal element is omitted, and the problem of variation in composition of the silicide region is eliminated. As a result, the subsequent crystal growth becomes stable, the crystal grain size becomes larger than in the conventional method, and dislocations and crystal defects are eliminated in the grains. As a result, a high quality crystalline silicon film is obtained. Further, such improvement in crystallinity can reduce the amount of metal element in the active region.

According to the method of manufacturing a semiconductor device of the present invention, the active region is formed on the insulating surface of the substrate from the portion of the amorphous silicon film that is in contact with the metal silicide film that promotes its crystallization to the peripheral region thereof. Since the active region is formed by crystal growth by heat treatment, the crystal growth direction is aligned in one direction and the crystallinity is significantly good. Further, the amount of metal element in the active region is further increased. There is a reduction effect.

As described above, by using the present invention, in a semiconductor device using a crystalline silicon film as an active region, a crystalline silicon film of higher quality than in the past can be obtained by a simple manufacturing process, resulting in low cost. And a high-performance semiconductor device can be obtained.

Further, it is possible to manufacture a semiconductor device having a high-performance thin film transistor having uniform and stable characteristics over a large area substrate. Especially in a liquid crystal display device, pixel switching TF required for an active matrix substrate
Realization of a driver monolithic active matrix substrate that configures the active matrix section and the peripheral drive circuit section on the same substrate while simultaneously satisfying the uniform characteristics of T and the high performance required for the TFT that constitutes the peripheral drive circuit section. Not only this, thin film integrated circuits such as CPUs can be manufactured on the same substrate as these, so that the modules can be made compact, high performance, low cost, and systematized.

[Brief description of drawings]

FIG. 1 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention.

FIG. 2 is a plan view illustrating a semiconductor device and a manufacturing method thereof according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment in the order of steps.

FIG. 4 is a diagram for explaining the basic principle of the present invention,
FIG. 4A shows a diamond structure which is an ideal crystal structure of the crystalline silicon film, and FIG. 4B shows a fluorite structure which is the closest to the diamond structure as a silicide crystal structure.

FIG. 5 is a diagram showing a liquid crystal display device in which a display, a CPU, a memory, and the like are formed on one substrate as an application example to which the semiconductor device and the manufacturing method thereof according to the present invention are applied.

[Explanation of symbols]

10, 21 N-type TFT 20 CMOS circuit 22 P-type TFT 100, 200 Semiconductor device 200a Exposed region of amorphous silicon film 101, 201 Glass substrate 102, 202 Base insulating film 103, 203 Amorphous silicon film 103a, 203a Crystal Silicon film 103i, 203n, 203p active region 105, 205 NiSi ₂ thin film 106, 206 crystal growth direction 107, 207 gate insulating film 108, 208, 209 gate electrode 109 anodic oxide layer 110, 210, 211 channel region 111, 112, 212, 213, 214, 215 Source / drain regions 113, 216 Interlayer insulators 113a, 216n, 216p Contact holes 114, 115, 217, 218, 219 Electrode wiring 203b Lateral crystal growth region 204 Mask layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 29/786 21/336 9056-4M H01L 29/78 627 G

Claims (10)

[Claims] 1. A substrate having an insulating surface, and a heat treatment of the amorphous silicon film using a metal silicide film provided on the insulating surface of the substrate and in contact with the amorphous silicon film as a catalyst for crystal growth. A semiconductor device having an active region that is crystallized by. 2. A substrate having an insulating surface, and an amorphous silicon film provided on the insulating surface of the substrate,
A semiconductor device comprising: an active region formed by performing crystal growth by heat treatment from a portion in contact with a metal silicide film that promotes crystallization to a peripheral region thereof. 3. The semiconductor device according to claim 1, wherein the metal silicide film comprises Ni, as a constituent metal element thereof.
Co, Pd, Pt, Cu, Ag, Au, In, Sn, A
A semiconductor device containing one or more kinds of elements selected from l and Sb. 4. The semiconductor device according to claim 1, wherein the metal silicide film has a fluorite structure as its crystal structure. 5. The semiconductor device according to claim 1, wherein the metal silicide film is made of NiSi ₂ . 6. A step of forming an amorphous silicon film and a metal silicide film for promoting crystallization of the amorphous silicon film on a substrate so that they are in contact with each other, and the amorphous silicon film is crystallized by heating. A method of manufacturing a semiconductor device, comprising: 7. An amorphous silicon film and a metal silicide film for promoting crystallization of the amorphous silicon film are formed on a substrate such that the metal silicide film is in contact with a part of the amorphous silicon film. And a step of selectively crystallizing a region of the amorphous silicon film in contact with the metal silicide film by heat treatment, and further continuing the heat treatment to form the amorphous silicon film, A step of growing a crystal from the selectively crystallized region to its peripheral region in a direction substantially parallel to the substrate surface. 8. The method of manufacturing a semiconductor device according to claim 6 or 7, wherein the metal silicide film contains Ni and C as constituent metal elements.
o, Pd, Pt, Cu, Ag, Au, In, Sn, A
1. A method of manufacturing a semiconductor device, which contains one or more kinds of elements selected from l and Sb. 9. The method of manufacturing a semiconductor device according to claim 6, wherein the metal silicide film has a fluorite structure as its crystal structure. 10. The method of manufacturing a semiconductor device according to claim 6 or 7, wherein the metal silicide film is made of NiSi ₂ .