JP3238020B2 - Method for manufacturing active matrix display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device, and more particularly to a method of manufacturing an active matrix liquid crystal display device in which the number of manufacturing steps is reduced, the cost is reduced, and a high yield is realized.

[0002]

2. Description of the Related Art Display devices such as electroluminescence, light emitting diode, plasma, and liquid crystal display devices can be made thinner, and are expected to be developed into display devices such as televisions, measuring instruments, office equipment, and computers. I have. Among them, a liquid crystal display device using a switching element matrix array of thin-film transistors is capable of full color and low power consumption, and is therefore particularly expected to be applied to various uses.

As a material of a switching transistor used in such a liquid crystal display device, crystalline, polycrystalline, amorphous Si, CdSe, Te, CdS and the like are used. Among these, polycrystalline semiconductors and amorphous semiconductors are applicable to thin-film technology of low-temperature processes, so that active matrix elements of switching transistors can be formed on substrates that need to be handled at relatively low temperatures, such as glass substrates. Thus, mass production of a low-cost, large-area display device is enabled.

FIG. 14 shows an example of a method of manufacturing a conventional active matrix liquid crystal display device using an amorphous silicon (a-Si) film for an active layer. First, FIG.
(A), the under-consisting SiO _x or the like on the transparent insulating substrate 101 such as a glass substrate - co - coat layer 10
2 is formed by sputtering, and the undercoat layer 10
The high melting point metal layer such as Cr or Mo-Ta alloy provided on the second electrode 2 is patterned to form the gate electrode 103 and the pad portion 104 serving as a take-out portion. The gate electrode 103 is covered with a gate insulating film 105 of SiN _x , SiO _x or the like.
A Si film is formed, and the ohmic contact layer 107 is further formed.
An n ⁺ a-Si film is laminated and formed in a predetermined pattern (FIG. 14B).

[0005] Next, as shown in FIG. 14 (c), a transparent conductive film such as ITO to be a pixel electrode 108 is formed in a predetermined pattern. Further, as shown in FIG. 14D, the gate insulating film 105 at the portion where the gate electrode 103 is taken out, such as the pad portion 104, is removed by etching. A source electrode 109a and a drain electrode 109b are formed on the n ⁺ a-Si film at a predetermined distance, and the source electrode 109a and the drain electrode 109b are used as masks to form a source electrode 1a.
The n ⁺ a-Si layer between the gate electrode 09a and the drain electrode 109b is removed by etching to form a TFT (FIG. 14).
(E)). In order to further increase the durability, a protective film 110 such as SiN _x is deposited on the TFT, and the protective film at the electrode take-out portion such as the pad portion 104 is removed (FIG. 14F). Complete.

However, in the method of manufacturing an active matrix liquid crystal display device described above, many mask steps (6
Times), a low-cost active matrix liquid crystal display device cannot be provided. In addition, when the n ⁺ a-Si layer 107 is removed by etching, the a-Si layer 106 is also etched, so the thickness of the a-Si layer 106 must be increased. Generally, a-S of about 200 to 300 nm
Although the i-film 106 is used, such a thick film has a problem that the film forming process takes a long time and the productivity is low.
There is a problem that the management of the etching process of the n ⁺ a-Si layer becomes complicated.

On the other hand, there is a method disclosed in Japanese Patent Publication No. 6-18215. According to this method, a gate electrode is selectively formed on an insulating substrate, and a part of a gate electrode take-out portion is masked to form a gate insulating film, an a-Si film, an n ⁺ a-Si film, and a metal film. Are continuously deposited. Next, an a-Si film, an n ⁺ a-Si film, and a metal film are patterned in substantially the same shape, and then a transparent conductive film is deposited on the entire surface, and this transparent electrode is used as a source electrode also serving as a pixel electrode. Then, the metal film and the n ⁺ a-Si film are patterned into a transparent conductive film pattern.
The active matrix liquid crystal display device is completed by selectively removing the masks as a part of the mask.

In such a method of manufacturing an active matrix liquid crystal display device, a gate insulating film, an a-Si film, and an n ⁺ a-
Si film and metal film must be continuously deposited. For this reason, there has been a problem that a film such as a metal mask is peeled off, and the yield is reduced. In particular, when a large number of active matrix liquid crystal display devices are taken out from one substrate, a metal mask must be provided also at the center of the substrate, and the yield has been significantly reduced.

There is also a method of using a resist or the like instead of a metal mask (lift-off).
When depositing the -Si film and the n ⁺ a-Si film, the substrate temperature must be increased, so that a general resist cannot be used.
(130 ° C.) also has a problem in that the yield is reduced, for example, in the lift-off step, the lifted-off film or the like is reattached.

[0010]

As described above, the conventional method of manufacturing an active matrix liquid crystal display device has a problem that the yield is low and a low-cost active matrix liquid crystal display device cannot be provided.

The present invention has been made in consideration of the above circumstances, and has as its object to reduce the number of mask steps.
An object of the present invention is to provide a method of manufacturing an active matrix liquid crystal display device having a high yield and high productivity.

[0012]

According to the present invention, a pixel electrode formed on an insulating substrate is driven by a switching transistor selected by signal lines and scanning lines arranged in a matrix array. A method for manufacturing an active matrix display device, comprising: forming a gate electrode and a gate extraction electrode on the insulating substrate; and sequentially forming an insulating film, a semiconductor thin film, and a metal film on the entire surface; Patterning the metal film by using the first resist pattern as a mask; and forming the semiconductor thin film by using at least one of the first resist pattern and the patterned metal film as a mask. And a step of patterning the insulating film to expose the gate electrode, a step of forming a transparent conductive film on the entire surface, and a second resist pattern. Forming a pixel electrode by patterning the transparent conductive film using the mask as a mask, and forming a metal film pattern using at least one of the second resist pattern and the pixel electrode as a mask. Removing the exposed portion. A method for manufacturing an active matrix display device, comprising:

[0013]

According to the method of the present invention, the metal film is patterned by using the first resist pattern as a mask, and at least one of the first resist pattern and the metal film pattern is subsequently formed. Using as a mask,
The semiconductor thin film and the insulating film are patterned to expose the gate extraction electrode. Therefore, the masking step is
And the number of masking steps can be greatly reduced from six masking steps in the conventional manufacturing process. Thus, according to the present invention,
It is possible to obtain an active matrix liquid crystal display device with good yield and low cost.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Various embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention. First, a SiO _x film 1 is formed on a light-transmitting insulating substrate 11 such as a glass substrate by sputtering or CVD.
Coating 2 Next, after depositing a high melting point metal such as Cr or Mo-Ta alloy, patterning is performed to form a gate electrode 13, an auxiliary capacitance electrode 14, and a gate extraction electrode 1.
5 is formed (FIG. 1A).

Next, a plasma CV is applied on the structure on which these electrodes 13, 14, 15 are formed without breaking vacuum.
A 300 nm thick SiN _x film 16, 300 nm by D method
A-Si film 17 having a thickness of 300 nm and n ⁺ having a thickness of 300 nm
An a-Si film 18 is deposited. The SiNx film 16 may be deposited twice in order to prevent an interlayer short circuit due to a pinhole or the like. Further, the film quality of the upper layer and the lower layer of SiN _x may be changed. Furthermore, a metal film 19 made of Mo or the like
Is deposited by a sputtering method, a resist pattern 20 is formed, and the metal film 19 is patterned using the resist pattern 20 as a mask.
(FIG. 1B).

Subsequently, while the resist pattern 20 is left, the n ⁺ a-Si film 18, the a-Si film 17, and the SiN _x 16 as the gate insulating film are patterned into the same shape. At this time, the n ⁺ a-Si film 18, the a-Si film 17, and the SiNx film 16 serving as the gate insulating film at the gate electrode take-out portion around the pixel portion are also etched away. As a result, the gate take-out electrode 15 are exposed. After that, the resist pattern is removed (FIG. 1C).

Next, a transparent conductive film 21 of ITO or the like is deposited by sputtering to a thickness of 150 nm, and this transparent conductive film 21 is patterned into the shape of a pixel electrode using the resist pattern 22 as a mask (FIG. 2). (A)). Further, the portion of the metal film 19 made of Mo between the source and the drain of the thin film transistor and the n ⁺ a-Si film 18 are selectively formed in substantially the same shape as the pixel electrode while leaving the resist pattern on the pixel electrode. The resist pattern 21 is removed (FIG. 2 (b)), and finally the resist pattern 21 is removed (FIG. 2 (c)).

As described above, an active matrix liquid crystal display device can be obtained in three mask steps. Hereinafter, the main steps of the above manufacturing steps will be described in detail. In the step of continuously patterning the metal film 19 made of Mo or the like, the n ⁺ a-Si film 18, the a-Si film 17, and the SiN _x film 16 serving as a gate insulating film, first, a resist is subjected to predetermined photolithography. Processed into a shape and obtained resist pattern
Using Mo as a mask, the uppermost layer of Mo is phosphoric acid, acetic acid,
Etch with a mixture of nitric acid. At this time, the etching time may be adjusted so that side etching is performed about 1 μm from the end of the resist.

Next, while leaving the same resist pattern,
The region from the n ⁺ a-Si film 18 to the SiN _x film 16 is etched by reactive ion etching (RIE) mainly using CF ₄ -based or SF ₆ -based gas. At this time, the pressure at the time of etching is preferably 5 Pa or less so that side etching does not occur from the resist end. Furthermore, n ⁺
In order to form a taper on the end surface from the a-Si film to the SiN _x film 16, O ₂ or the like may be added to an etching gas and etching may be performed while the resist is ashed back.

Further, in the above embodiment, the etching from the n ⁺ a-Si film 18 to the SiN _x film 16 was performed while the resist pattern 20 was left. May not be completely peeled off, leaving a residue, which may cause a defect. In order to avoid this, as shown in FIG.
After patterning 9, the resist pattern 20 is peeled off and removed, and the Mo film pattern 19 is used as a mask to form n.
^The etching from the ⁺ a-Si film 18 to the SiN _x film 16 may be performed.

At this time, Cr, Ti or the like may be used as the metal in order to avoid the etching of the metal film by RIE. Further, while the resist pattern 20 is left, n ⁺ a
Start the etching process from -Si film 18 until the SiN _x film 16, O ₂ as an etching gas in RIE, for example
In addition, the resist pattern 20 may be simultaneously removed by ashing during the etching.

In the step of patterning the transparent conductive film into the shape of a pixel electrode, and selectively removing the metal film 19 and the n ⁺ a-Si film 18 using the pixel electrode as a part of a mask,
First, the resist applied on the ITO is processed into a predetermined shape by photolithography, and the obtained resist pattern is formed.
Using ITO as a mask, ITO is etched with an aqua regia-based etchant.

Subsequently, the Mo film 19 is removed by etching with a mixed solution of phosphoric acid, acetic acid and nitric acid. Further, while the resist pattern 22 is left, RIE mainly using CF ₄ -based gas is performed.
Thereby etching the n ⁺ a-Si film. At this time, the a-Si film 17 is etched by about 50 nm due to manufacturing restrictions, and the etching is completed. Further, in the above method, when the Mo film 19 is etched,
Since the side surface is etched more than the end of the film 21, by adjusting the aqua regia-based etchant, the ITO film 2 is etched.
1. The Mo film 19 can be continuously etched in a tapered shape. Further, the Mo film 19 and the n ⁺ a-Si film 1
8 may be continuously etched by RIE.

In the above embodiment, the resist pattern 22 is left until the n ⁺ a-Si film 18 is etched.
As with etching from the o film 19 until the SiN _x film 16, as shown in FIG. 4, resist pattern after etching the ITO film 21 - the emissions 22 was removed, using an ITO film 21 as a mask, followed subsequent etching May be
Alternatively, the resist pattern 22 may be removed after the etching of the Mo film 19.

FIGS. 5, 6, 7 and 8 are plan views of the pixel portion of this embodiment. FIG. 5 shows a structure without an auxiliary capacitance, FIG. 6 shows a structure with an auxiliary capacitance electrode, and FIG. 7 shows a structure using a preceding gate electrode as an auxiliary capacitance electrode. As shown in FIG. 7, the mask pattern of the ITO film must be thinner at the intersection with the lower gate line than the mask pattern of the signal line. The pattern may be covered. With such a structure, diffusion of contaminants from the signal line material into the liquid crystal can be reduced. Of course, the ITO pattern may be left on the gate electrode. When the ITO pattern is left on the gate electrode, the metal of the signal line is left on the gate line as shown in FIG. 9 so that the resistance of the gate line can be reduced.

Further, Mo-Ta is used as a gate electrode material.
For example, when a material that is slightly etched at the time of etching the n ⁺ a-Si film 18 is used, a reaction product in the etching of the Mo-Ta film 19 causes the n ⁺ a-Si film 18 to be etched.
The characteristics of the transistor may fluctuate due to fluctuations in the etching rate of the substrate or redeposition of these in the back channel portion. The structure in which the ITO pattern is left on the gate electrode is also effective in solving such a problem.

Next, a second embodiment of the present invention will be described. This embodiment uses a laminated film containing Al as a metal for the purpose of lowering the resistance value of the signal line.
The basic process is not changed, only the process of etching the metal film and the ITO film is changed. Hereinafter, the process will be described.

In this embodiment, a metal film composed of a laminate of Mo, Al and Mo is deposited by a sputtering method. The film thicknesses were 50 nm, 3000 nm, and 50 nm in this order from the top. Mo
/ Al / Mo metal film, n ⁺ a-Si film, a-S
The i film and the SiN _x film as the gate insulating film are continuously etched and patterned into substantially the same shape. In this step, first, the uppermost Mo / Al / Mo film is etched with a mixed solution of phosphoric acid, acetic acid, and nitric acid.

In the step of patterning a transparent conductive film into the shape of a pixel electrode and selectively removing a metal film and an n ⁺ a-Si film using the pixel electrode as a part of a mask, first, an IT
RIE with O film mainly composed of gas such as methane and alcohol
Etching. In wet etching using aqua regia or the like, the potential in the solution of Al and ITO causes
It is known that residues of the TO film and the like are generated, which causes a problem in etching. Subsequently, the Mo / Al / Mo film is phosphoric acid,
Etching is removed with a mixture of acetic acid and nitric acid. Further, the n ⁺ a-Si film is etched using the same resist by RIE mainly using a CF ₄ -based gas. At this time, the etching is completed by etching the a-Si film by about 50 nm due to manufacturing restrictions.

In the above method, when the Mo / Al / Mo film is etched, the Mo / Al / Mo film is side-etched from the end of the ITO film.
RIE using gas mainly composed of CF ₄ , Cl _2, etc.
, It is also possible to perform anisotropic etching. In this case, the n ⁺ a-Si film can be continuously etched.

As described above, by dry-etching the ITO film by RIE, A
1 or the like can be used. Even when Al is used for the gate electrode, it is needless to say that it is similarly desirable to dry-etch the ITO film by RIE. Therefore, according to this embodiment, it is possible to obtain an active matrix liquid crystal display device in which wiring resistance is reduced and signal delay is eliminated.

FIG. 10 is a sectional view showing a manufacturing process of an active matrix liquid crystal display device according to a third embodiment of the present invention. In this embodiment, SiO 2 is used as the gate insulating film.
It is characterized by using _x . SiN _x is CVD
It is a problem that the deposition rate is low and the productivity is low. In the first embodiment described above, PE-CVD is used, and the deposition rate of SiN _x is 10 nm / min. Compared to SiN _x, the SiO _x same PE-CVD
A deposition rate as high as 30 nm / min can be obtained by the method, and a deposition rate that is at least one order of magnitude higher than that of SiN _{x of} PE-CVD can be obtained in normal pressure-CVD. Hereinafter, FIG.
0 will be described.

First, an Al203 film 32 is coated on a light-transmitting insulating substrate 31 such as a glass substrate by a sputtering method or the like. Next, a high-melting-point metal such as Cr or a Mo—Ta alloy is deposited, and is patterned to form a gate electrode 33.
Is formed (FIG. 10A). On the gate electrode 33, 300n is formed by plasma CVD without breaking vacuum.
m-thick SiO _x film 34, 300 nm thick a-S
An i film 35 and an n ⁺ a-Si film 36 having a thickness of 30 nm are sequentially deposited. It goes without saying that the SiO _x film 34 may be deposited twice, for example, every 150 nm. Further, in order to improve the characteristics of the thin film transistor, the upper layer a-
Portion in contact with the Si film 35 may be a SiN _x. Further, about 50 nm of SiN _x may be formed on the SiO _x film 34.

Next, a metal film 36 made of Mo or the like is deposited by a sputtering method. Next, a metal film 37 made of Mo, n
⁺ A-Si film 36, a-Si film 35, patterning the SiO _x film 34 is a gate insulating film in the same mask (Figure 10 (b)). Next, a transparent conductive film 38 of ITO or the like is deposited to a thickness of 150 nm by a sputtering method, and the transparent conductive film 38 is patterned into a shape of a pixel electrode. At this time, the portion of the metal film 37 made of Mo between the source and the drain of the thin film transistor and the n ⁺ a-Si film 36 thereunder are selectively removed using the pixel electrode as a part of the mask (FIG. 10).
(C)).

As described above, an active matrix liquid crystal display device can be obtained by three mask steps. The manufacturing process is almost the same as that of the first embodiment. The difference is that Al203 is used as a coating material under the gate electrode. This is because the use of SiO _x makes it impossible to stop the etching on the surface of the coating material below the gate electrode when etching the gate insulating film, SiO _x . The coating material under the gate electrode may be MgF, CaF, or the like as long as it is a transparent insulating film that is resistant to a CF ₄ or SF ₆ -based etching gas. Then, the portions from the n ⁺ a-Si film 36 to the SiO _x film 34 can be etched by reactive ion etching (RIE) using mainly a CF ₄ -based gas.

[0036] above, in the three embodiments, as in the prior art, because it does not form a protective film made of SiN _x or the like to an active matrix liquid crystal display device on, it is possible to form in the three mask processes ing. When an LCD using such an active matrix liquid crystal display device was tested under special conditions such as high temperature and high humidity, it was newly found that performance could be deteriorated. For example, when used continuously at 80 ° C. for 1000 hours, a problem that the screen becomes white sometimes occurs. When the characteristics of the active matrix liquid crystal display device having such a problem were examined, it was found that the off-resistance of the thin film transistor was increased. The present inventors have found several solutions to this problem. The measures will be described below.

The first countermeasure is that in the first embodiment, n _x a-S
After the i-film is etched, RIE is performed using a gas such as O ₂ or N ₂ . The RIE process may be performed before or after removing the resist pattern. This method uses R
It has been found that other than IE, exposure to plasma is sufficient.

The second measure is without etching the n ⁺ a-Si, the n ⁺ a-Si unit is a method of anodizing in a tartaric acid solution. FIG. 11 shows a cross section of a thin film transistor for explaining the countermeasure. Al is used as the signal line. In this method, since the thickness of the anodic oxide film 49 can be controlled by the formation voltage, the thickness of the a-Si film 45 can be reduced. According to our experiments, a
-Even when the thickness of the Si film 45 was reduced to 300 to 100 nm, an active matrix liquid crystal display device could be formed with good reproducibility.

The thickness of the anodic oxide film 49 is 30 to 100 nm, which is larger than the thickness of the n ⁺ a-Si film 46. The anodizing solution may be other than the above, and depending on the solution used, Ti, Cr or the like may be used for the signal line. Also IT
Anodization may be performed while leaving the resist pattern on the O film 48.

The third measure is also without etching the n ⁺ a-Si film 46, the exposed portions ion implantation of the N or O of n ⁺ a-Si film 46, is a method of high resistance . The ion implantation conditions are as follows: O ₂ and N ₂ are used as the gas to be introduced into the ion source, and the acceleration voltage is 15 to 50 k
V, the ion dose was 10 ¹⁶ to 10 ¹⁸ / cm ² . In this example, mass separation was not performed.

FIG. 12 shows a sectional structure of a thin film transistor when N ₂ is used as an ion source gas. FIG.
As is clear from FIG. 2, the SiN _x layer 50 is formed on the exposed portion of the n ⁺ a-Si film 46. Even with this countermeasure, the depth at which ions are implanted can be controlled by the acceleration voltage, so that the a-Si film 45 can be made thinner. a-Si film 45 having a thickness of 300 to 80 nm, n ⁺ a-S
Sufficient characteristics were obtained when the thickness of the i film 46 was 50 to 10 nm. In order to dope uniformly in the film thickness direction,
The acceleration voltage may be changed during the ion implantation. The direction of change is preferably from high to low acceleration. When the distribution of the implanted N in the depth direction was examined, the a-Si film 4 was observed.
It turned out that it was also driven in 5.

The fourth countermeasure is the same as the third countermeasure, except that B ₂ H ₆ is used as a gas to be introduced into the ion source and B, which is a P-type dopant, is added to the n ⁺ a-Si film 46. The resistance is increased by driving. At this time, it is known that a certain amount is also implanted in the a-Si film 45. Acceleration voltage 15-50kV, dose 10
It was carried out at ^{15 ~10 18} / cm ^2. FIG. 13 shows a cross-sectional structure of a thin film transistor. As it is clear from FIG. 13, n ⁺
On the exposed portion of the a-Si film 46, a boron dopant high resistance layer 51 is formed.

From the above countermeasures, it is conceivable that the off-resistance of the thin-film transistor is increased because the back channel portion of the thin-film transistor is reduced in resistance. Although the detailed cause is not yet known, high-quality semiconductors generally have a remarkable change in resistance and the like due to some compositional changes and potential fluctuations.
It is considered necessary to deteriorate the properties as a semiconductor. In the first to third measures, it is considered that the surface layer is nitrided or oxidized, and the interface is seriously damaged, thereby deteriorating the properties as a semiconductor. In the fourth measure, it is considered that the donor and the acceptor offset each other to increase the resistance, and to some extent transform the semiconductor into a P-type semiconductor. However, the Hall current flowing through the P-type part is
The holes are blocked by the n ⁺ a-Si layer 46. Although the P-type surface is damaged by ions, the damage of the back channel is less likely to reach the channel side than the intrinsic a-Si film 45.

It is apparent that the reliability is further improved by forming a protective film together with the above measures. The present invention can be applied to a liquid crystal display other than the above, for example, a reflection type liquid crystal display in which a pixel electrode is made of metal.

[0045]

As described above, according to the method of the present invention, the patterning of the metal film, the semiconductor thin film and the insulating film is performed continuously and almost equally, and the gate extraction electrode is formed. Since the mask is exposed, the number of mask steps can be greatly reduced, whereby an active matrix liquid crystal display device with low manufacturing cost, high yield, and good productivity can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a manufacturing process of the active matrix liquid crystal display device according to the first embodiment of the present invention.

FIG. 3 is a sectional view showing a manufacturing process of an active matrix liquid crystal display device according to a modification of the first embodiment of the present invention.

FIG. 4 is a sectional view showing a manufacturing process of an active matrix liquid crystal display device according to a modification of the first embodiment of the present invention.

FIG. 5 is a plan view of a pixel of the active matrix liquid crystal display device according to the first embodiment of the present invention.

FIG. 6 is a plan view of a pixel of the active matrix liquid crystal display device according to the first embodiment of the present invention.

FIG. 7 is a plan view of a pixel of the active matrix liquid crystal display device according to the first embodiment of the present invention.

FIG. 8 is a plan view of a pixel of the active matrix liquid crystal display device according to the first embodiment of the present invention.

FIG. 9 is a plan view of a pixel of the active matrix liquid crystal display device according to the first embodiment of the present invention.

FIG. 10 is a sectional view showing a manufacturing process of the active matrix liquid crystal display device according to the third embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating a second measure against performance degradation of the active matrix liquid crystal display device according to the present invention.

FIG. 12 is a cross-sectional view illustrating a third measure against performance degradation of the active matrix liquid crystal display device according to the present invention.

FIG. 13 is a cross-sectional view illustrating a fourth measure against performance degradation of the active matrix liquid crystal display device according to the present invention.

FIG. 14 is a sectional view showing a manufacturing process of a conventional active matrix liquid crystal display device.

[Explanation of symbols]

11, 31, 41, 101 ... glass substrate 12, 32, 42, 102 ... undercoat layer 13, 33, 43, 103 ... gate electrode 14, 34, 44 ... auxiliary capacitance electrode 15, 35, 45 , 104... Gate extraction electrodes 16, 36, 46, 105... Gate insulating films 17, 37, 47, 106... A-Si films 18, 38, 48, 107... N ⁺ a-Si films 19, 39 49, metal film 20, 22, resist pattern 21, transparent conductive film

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP 6-18215 (JP, B2) (58) Fields surveyed (Int. Cl. ⁷ , DB name) G02F 1/1368 G02F 1/13 101 G02F 1 / 1345

Claims (1)

(57) [Claims] 1. A method of manufacturing an active matrix display device in which pixel electrodes formed on an insulating substrate are driven by switching transistors selected by signal lines and scanning lines arranged in a matrix array. A step of forming a gate electrode and a gate extraction electrode, a step of sequentially forming an insulating film, a semiconductor thin film and a metal film on the entire surface, and patterning the metal film using the first resist pattern as a mask. And patterning the semiconductor thin film and the insulating film by using at least one of the first resist pattern and the patterned metal film as a mask to expose the gate extraction electrode. And a step of forming a transparent conductive film on the entire surface, and patterning the transparent conductive film using the second resist pattern as a mask. Forming a pixel electrode by using at least one of the second resist pattern and the pixel electrode as a mask to remove an exposed portion of the metal film pattern. Of manufacturing an active matrix display device.