JP2011118422A - Liquid crystal display device, thin film transistor array substrate for liquid crystal display device, and method for manufacturing the substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transistor substrate for a liquid crystal display device which can manufacture a liquid crystal display device whose performance is enhanced by providing an organic film on the transistor substrate with a smaller number of manufacturing steps to thereby enhance productivity, and to provide a method for manufacturing the substrate. <P>SOLUTION: In the transistor substrate for the liquid crystal display device where a gate electrode 26, a gate insulating film 27, a semiconductor layer 19, a source electrode 20, a drain electrode 21 and a passivation film 28 are layered in this order on a transparent insulating substrate 25 and a counter substrate 12 and the substrate are disposed opposite to each other via a packed liquid crystal layer 30, a semiconductor layer 19 under a data line 18 and the drain electrode 21 and a semiconductor layer 19 under the source electrode 20 are separated. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a transistor substrate for a liquid crystal display device and a manufacturing method thereof, and more particularly to an active matrix transistor substrate for a liquid crystal display device and a manufacturing method thereof.

  2. Description of the Related Art Conventionally, an active matrix liquid crystal display device using a channel etch type amorphous silicon (a-Si) thin film transistor (TFT) as an active element for applying a voltage to a liquid crystal is known.

  FIG. 14 is a plan view of a conventional transistor substrate for an active matrix liquid crystal display device. The figure shows a unit pixel. 15 is a cross-sectional view of the thin film transistor portion of FIG. 14, FIG. 16 shows the terminal portion of FIG. 14, (a) is a cross-sectional view of the gate terminal portion, and (b) is a cross-sectional view of the data terminal portion. It is.

  As shown in FIG. 14, the a-Si TFT 1 is provided for each pixel at the intersection of the XY matrix, and includes a gate electrode 2, and a source electrode 3 and a drain electrode 4 disposed on the gate electrode 2. The gate electrode 2 is connected to the gate wiring 2 a, the source electrode 3 is connected to the source wiring 3 a, and the drain electrode 4 is connected to the pixel electrode 6 through the contact through hole 5.

  As shown in FIG. 15, the gate electrode 2 formed on the transparent insulating substrate 7a is covered with the gate insulating film 7b, and further, at a position overlapping the gate electrode 2 on the gate insulating film 7b. A semiconductor layer 8 is formed. The source electrode 3 and the drain electrode 4 separated above the central portion of the semiconductor layer 8 are connected to the semiconductor layer 8 through the ohmic contact layer 9.

  The ohmic contact layer 9 is formed between the source electrode 3 and the drain electrode 4 and the semiconductor layer 8 by etching away between the source electrode 3 and the drain electrode 4. Further, a passivation film 7 c is formed so as to cover the source electrode 3, the drain electrode 4, the ohmic contact layer 9 and the semiconductor layer 8. The transparent conductive film to be the pixel electrode 6 and the drain electrode 4 are connected through a contact through hole 5 that penetrates the passivation film 7c.

  A switching signal is input to the a-Si TFT 1 through the gate wiring 2 a and the gate electrode 2, and a video signal is input through the source wiring 3 a and the source electrode 3, and writing to the pixel electrode 6 is performed.

  As shown in FIG. 16, the gate terminal portion (see (a)) exposes the pixel electrode 6 connected to the gate electrode 2 on the transparent insulating substrate 7a on the gate insulating film 7b and the passivation film 7c. Thus, a gate terminal 2b is formed. In the data terminal portion (see (b)), the pixel electrode 6 connected to the data line on the gate insulating film 7b is exposed on the passivation film 7c to form the data terminal 4a.

  FIG. 17 is a process diagram showing the method of manufacturing the transistor substrate of FIG. 14 for the thin film transistor portion. As shown in FIG. 17, first, a conductive layer made of, for example, aluminum (Al), molybdenum (Mo), chromium (Cr) or the like is formed on a transparent insulating substrate 7a such as glass by a sputtering apparatus to a thickness of about 100 to 400 nm. Deposit with a thickness of.

  Thereafter, first patterning is performed to form a gate wiring (not shown), a gate electrode 2 and a gate terminal (not shown) by a photolithography process (see (a)). This gate terminal (see FIG. 16A) is connected to an external signal processing substrate for display.

Next, the gate insulating film 7b made of a silicon nitride film or the like, the semiconductor layer 8 made of amorphous silicon, and the ohmic contact layer 9 made of n ⁺ amorphous silicon are respectively formed to a thickness of about 400 nm, 300 nm, and 50 nm by plasma CVD. Laminate continuously. After the lamination, second patterning is performed in which the semiconductor layer 8 and the ohmic contact layer 9 are patterned at once (see (b)).

  Next, a conductive layer such as Mo or Cr is deposited to a thickness of about 100 to 200 nm by a sputtering apparatus so as to cover the gate insulating film 7b and the ohmic contact layer 9. After the deposition, a third patterning for forming the source electrode 3, the source wiring 3a, the drain electrode 4, and the data terminal portion (see FIG. 16B) is performed by a photolithography process. The data terminal of the data terminal unit is connected to an external signal processing board for display.

  Along with the third patterning, unnecessary ohmic contact layers 9 other than the lower portions of the source electrode 3 and the drain electrode 4 that become the channel portion of the a-Si TFT 1 are removed (see (c)).

  Next, an inorganic material such as a silicon nitride film is formed by plasma CVD so as to cover the back channel of the a-Si TFT 1, the source electrode 3, the source wiring (data wiring) 3a, the drain electrode 4, and the data terminal (not shown). A passivation film 7c made of a film is formed with a thickness of about 100 to 200 nm.

  After the film formation, a contact through hole 5 for making contact between the drain electrode 4 and the pixel electrode 6 is formed, and unnecessary passivation film 7c on the data terminal portion (not shown) and unnecessary on the gate terminal (not shown). The fourth patterning is performed to remove the gate insulating film 7b and the passivation film 7c (see (d)).

  Further, a transparent conductive film to be the pixel electrode 6 is formed by a sputtering apparatus, and fifth buttering is performed (see (e)).

  Thus, the active matrix substrate is manufactured through the five patterning steps (see (a) to (e)) described above. A liquid crystal display device is formed by sandwiching liquid crystal between two substrates in which this active matrix substrate and another substrate provided with a color filter layer and electrodes are combined.

  In contrast to this conventional liquid crystal display device, the development of a technique for enhancing the performance of the liquid crystal display device by providing an organic film on an active matrix substrate has recently become active.

  For example, Japanese Patent Laid-Open No. 6-242433 discloses a technique (organic interlayer separation technique) that improves the display performance of liquid crystal by controlling the disclination of liquid crystal by providing a planarization layer of an organic film on an active matrix substrate. It is disclosed.

  Japanese Patent Laid-Open No. 8-122824 discloses a technique (color filter on TFT technique) for increasing the aperture ratio by providing a color filter layer on an active matrix substrate.

  Further, a method of manufacturing a good reflective liquid crystal display device with less reflection by forming irregularities by an organic film on an active matrix substrate and providing a reflective electrode thereon (uneven reflector forming technology) is disclosed in This is disclosed in Japanese Patent No. 5-232465.

  Hereinafter, as an example, a method for manufacturing an active matrix substrate using an organic interlayer separation technique will be described. Japanese Patent Laid-Open No. 6-242433 discloses a technique using polycrystalline silicon (p-Si) as a switching element. Here, for the sake of consistency with the prior art, a channel etch type a as a switching element is disclosed. -The thing using SiTFT is demonstrated.

  In the case of this active matrix substrate, a thick flattening layer is provided on the passivation film 7c, and a transparent conductive film to be the pixel electrode 6 is further provided on the flattening layer. This transparent conductive film is connected to the drain electrode 4 through a contact through hole 5 penetrating the planarizing layer and the passivation film 7c.

  Next, a method for manufacturing an active matrix substrate using an organic interlayer separation technique will be described. The steps up to the fourth patterning (FIG. 17D), which is a passivation film forming step, are the same as those in the prior art described above, and thus the description thereof is omitted.

  After the fourth patterning, a planarization layer is formed. Specifically, after applying a transparent photosensitive resist made of an acrylic resin or the like by spin coating, fifth patterning for opening a planarizing layer for the contact through hole 6 is performed by a photolithography process.

  Finally, as shown in FIG. 17E, a transparent conductive film to be the pixel electrode 6 is formed by a sputtering apparatus, and sixth patterning is performed.

JP-A-6-242433 JP-A-8-122824 JP-A-5-232465

  However, in the manufacturing method of the active matrix substrate by the organic interlayer separation technique, the number of patterning steps is increased by one step for forming the planarization layer. For this reason, the manufacturing process becomes complicated, resulting in an increase in cost and a reduction in productivity is inevitable.

  The same applies to the color filter on TFT technology and the concavo-convex reflector forming technology, and the manufacturing process becomes complicated and the productivity is lowered by the color filter layer, overcoat layer forming step, and concavo-convex layer forming step, respectively. .

  An object of the present invention is to provide a transistor substrate for a liquid crystal display device capable of producing a liquid crystal display device having an improved performance by providing an organic film on the transistor substrate with a smaller number of manufacturing steps and improving productivity. The manufacturing method is provided.

  In order to achieve the above object, a transistor substrate for a liquid crystal display device according to the present invention includes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, and a passivation film stacked on a transparent insulating substrate in the order of description. In the transistor substrate for a liquid crystal display device, which is disposed opposite to the liquid crystal layer between the counter substrate, the semiconductor layer under the data wiring and the drain electrode is separated from the semiconductor layer under the source electrode. It is a feature.

  By having the above structure, a transistor substrate for a liquid crystal display device formed by laminating a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, and a passivation film on a transparent insulating substrate is a data wiring. The semiconductor layer under the drain electrode and the semiconductor layer under the source electrode are separated from each other. As a result, a liquid crystal display device having an improved performance by providing an organic film on the transistor substrate can be manufactured with a smaller number of manufacturing steps, and productivity can be improved.

  Moreover, the transistor substrate for a liquid crystal display device can be realized by the method for manufacturing a transistor substrate for a liquid crystal display device according to the present invention.

1 is a schematic plan view of a display panel of a liquid crystal display device according to a first embodiment of the present invention. It is a top view of the TFT substrate of FIG. 2A and 2B are cross-sectional views taken along the line AA, FIG. 2B is a cross-sectional view taken along the line BB, and FIG. 2C is a cross-sectional view taken along the line CC. ) Is a sectional view taken along line DD. 1A and 1B show cross-sectional structures of the lead-out wiring and the terminal portion of FIG. 1, wherein FIG. 1A is a cross-sectional view of the lead-out wiring, and FIG. 1B is a cross-sectional view of the terminal portion. It is process drawing which shows the manufacturing method of the TFT substrate of FIG. 1 about a thin-film transistor part. It is a top view of the TFT substrate of the liquid crystal display device which concerns on the 2nd Embodiment of this invention. The cross-sectional structure of each part of FIG. 6 is shown, (a) is a cross-sectional view taken along the line AA, and (b) is a cross-sectional view taken along the line BB. It is process drawing which shows the manufacturing method of the TFT substrate of FIG. 6 about a thin-film transistor part. It is a top view of the TFT substrate of the liquid crystal display device which concerns on 3rd Embodiment of this invention. 9 shows a cross-sectional structure of each part of FIG. 9, (a) is a cross-sectional view taken along line AA, and (b) is a cross-sectional view taken along line BB. It is process drawing which shows the manufacturing method of the TFT substrate of FIG. 9 about a thin-film transistor part. It is a top view of the TFT substrate of the liquid crystal display device which concerns on 4th Embodiment of this invention. 12 shows a cross-sectional structure of each part of FIG. 12, (a) is a cross-sectional view taken along line AA, and (b) is a cross-sectional view taken along line BB. FIG. 10 is a plan view of a conventional transistor substrate for an active matrix liquid crystal display device. It is sectional drawing of the thin-film transistor part of FIG. 14 shows the terminal part of FIG. 14, in which (a) is a sectional view of the gate terminal part, and (b) is a sectional view of the data terminal part. It is process drawing which shows the manufacturing method of the transistor substrate of FIG. 14 about a thin-film transistor part.

  Embodiments of the present invention will be described below with reference to the drawings.

(First embodiment)
FIG. 1 is a schematic plan view of a display panel of a liquid crystal display device according to the first embodiment of the present invention. This liquid crystal display device is an active matrix liquid crystal display device in which an amorphous silicon thin film transistor (a-Si TFT) as an active element is provided for each pixel at the intersection of an XY matrix.

  As shown in FIG. 1, the display panel 10 is formed by filling a liquid crystal layer in a gap between a TFT substrate 11 and a counter substrate 12 made of a pair of transparent glass substrates arranged to face each other. An a-Si TFT, a pixel electrode, a flattening layer, and various wirings are provided on the opposite surface side of the TFT substrate 11, and a common electrode, a color filter layer, a light shielding curtain, and the like are provided on the opposite surface side of the opposite substrate 12. It has been.

  The peripheral edge of the TFT substrate 11 is provided with a gate terminal 13 or a data terminal 14, and each terminal 13, 14 is connected to an external signal processing substrate for display (not shown) via a lead wiring 15. The

  Then, by applying an image signal voltage between the pixel electrode of the TFT substrate 11 and the common electrode of the counter substrate 12, the electro-optical state of the liquid crystal layer between the two electrodes is controlled, and the light transmission of the display panel 10 is achieved. The state is changed and a predetermined image is displayed on the display unit 10a.

  FIG. 2 is a plan view of the TFT substrate of FIG. The figure shows a unit pixel. As shown in FIG. 2, the a-Si TFT 16 is provided for each pixel at the intersection of the gate wiring 17 and the data wiring (source wiring) 18 arranged in a lattice pattern, and is provided on the gate electrode (not shown) and the gate electrode. A source electrode 20 and a drain electrode 21 are provided so as to face each other with a semiconductor layer 19 interposed therebetween.

  The drain electrode 21 is formed in an L shape so that almost half of the drain electrode 21 overlaps the storage wiring 22 arranged in parallel with the gate wiring 17. The drain electrode 21 is connected to the pixel electrode 24 through the contact through hole 23, the gate electrode is connected to the gate wiring 17, and the source electrode 20 is connected to the data wiring 18.

  A switching signal is input to the a-Si TFT 16 through the gate wiring 17 and the gate electrode, and a video signal is input through the data wiring 18 and the drain electrode 21, and writing to the pixel electrode 24 is performed.

  3 shows a cross-sectional structure of each part of FIG. 2, wherein (a) is a cross-sectional view taken along the line AA, (b) is a cross-sectional view taken along the line BB, and (c) is a cross-sectional view taken along the line C-C. FIG. 4D is a cross-sectional view taken along line DD.

  As shown in FIG. 3A, a gate electrode 26 is formed on the transparent insulating substrate 25 of the a-Si TFT 16, and the gate insulating film 27 covers the gate electrode 26, and further the gate insulating film 27 is formed. A semiconductor layer 19 is formed thereon.

  On the semiconductor layer 19, a source electrode 20 and a drain electrode 21 are formed that are separated by a back channel of the a-Si TFT 16 provided above the central portion of the semiconductor layer 19. The source electrode 20 and the drain electrode 21 are connected to the semiconductor layer 19 through an ohmic contact layer (not shown). The ohmic contact layer is formed only between the source electrode 20 and the drain electrode 21 and the semiconductor layer 19 by etching away between the source electrode 20 and the drain electrode 21.

  The source electrode 20, the drain electrode 21 and the semiconductor layer 19 are covered with a passivation film 28, and a planarization layer 29 made of a thick organic film is formed on the passivation film 28. On the planarizing layer 29, a transparent conductive film that is to be the pixel electrode 24 is formed above the drain electrode 21.

  A TFT substrate 11 is formed by a layered structure up to the pixel electrode 24 on the transparent insulating substrate 25, and below the transparent insulating substrate 31 facing the liquid crystal layer 30 via the liquid crystal layer 30 between the TFT substrate 11. The counter substrate 12 in which the light shielding layer 32 and the common electrode 33 are stacked in the order of description is formed.

  As shown in FIG. 3B, the semiconductor layer 19, the drain electrode 21, and the passivation film 28 of the a-Si TFT 16 are extended to above the storage (holding capacitor) electrode 34. The storage electrode 34 is formed on the transparent insulating substrate 25 and covered with the gate insulating film 27.

  In the passivation film 28 and the planarization layer 29 that follow the a-Si TFT 16 above the storage electrode 34, contact through holes 23 and 35 are formed so as to penetrate these films. The pixel electrode 24 and the drain electrode 21 are connected through the contact through holes 23 and 35.

  The light shielding layer 32 of the counter substrate 12 is in contact with the color filter layer 36 in front of the storage electrode 34, and the counter substrate 12 above the storage electrode 34 is in common with the color filter layer 36 under the transparent insulating substrate 31. The electrode 33 has a structure in which the electrodes 33 are stacked in the order of description.

  That is, the semiconductor layer 19 and the passivation film 28 are located outside the source electrode 20 and the drain electrode 21 so as to include the source electrode 20 and the drain electrode 21. In addition, a laminated structure including the passivation film 28, the semiconductor layer 19, and the gate insulating film 27 is formed in an upward tapered shape.

  A switching signal is input to the a-Si TFT 16 through the gate wiring 17 and the gate electrode 26, and a video signal is input through the data wiring 18 and the drain electrode 21, and writing to the pixel electrode 24 is performed.

  As shown in FIG. 3C, the data wiring 18 is formed on the transparent insulating substrate 25 by laminating the gate insulating film 27, the semiconductor layer 19, the data wiring 18, and the passivation film 28 in this order. It is covered with the chemical layer 29. As shown in FIG. 3D, the gate wiring 17 is formed on the transparent insulating substrate 25 and covered with the planarization layer 29.

  4A and 4B show cross-sectional structures of the lead-out wiring and the terminal portion of FIG. 1, FIG. 4A is a cross-sectional view of the lead-out wiring, and FIG. 4B is a cross-sectional view of the terminal portion. As shown in FIG. 4A, the lead-out wiring 15 is formed on the transparent insulating substrate 25 by laminating the gate-side lead-out wiring 15a, the gate insulating film 27, the semiconductor layer 19, and the passivation film 28 in this order. Further, on the transparent insulating substrate 25, the gate insulating film 27, the semiconductor layer 19, the data-side lead wiring 15b, and the passivation film 28 are laminated in this order.

  As shown in FIG. 4B, the terminal portion includes a gate terminal 13 formed on a transparent insulating substrate 25, and a gate insulating film 27, a semiconductor layer 19, and a data terminal on the transparent insulating substrate 25. 14 and a passivation film 28 in which the data terminals 14 are partially exposed are stacked in this order.

  FIG. 5 is a process diagram showing a manufacturing method of the TFT substrate of FIG. As shown in FIG. 5, first, a conductive layer made of, for example, aluminum (Al), molybdenum (Mo), chromium (Cr), or the like is formed on a transparent insulating substrate 25 such as glass by a sputtering apparatus to about 100 to 400 nm. Deposit with a thickness of.

  Thereafter, first patterning is performed to form gate wiring (not shown), the gate electrode 26, and the gate terminal 13 by a photolithography process (see (a)).

Next, a gate insulating film 27 made of a silicon nitride film or the like, a semiconductor layer 19 made of amorphous silicon, and an ohmic contact layer (not shown) made of n ⁺ amorphous silicon are respectively formed by plasma CVD at about 400 nm, about 300 nm, and about The layers are continuously stacked with a thickness of about 50 nm. After the lamination, a conductive layer made of Mo, Cr or the like is further deposited with a thickness of about 100 to 200 nm by a sputtering apparatus so as to cover them.

  After the deposition, second patterning for forming the source electrode 20, the source wiring 18, the drain electrode 21, and the data terminal portion (see FIG. 4B) is performed by a photolithography process.

  Along with the second patterning, unnecessary ohmic contact layers other than the lower portions of the source electrode 20 and the drain electrode 21 that become the channel portion of the a-Si TFT 16 are removed (see (b)).

  Next, the back channel of the a-Si TFT 16, the source electrode 20, the source wiring (data wiring) 18, the drain electrode 21, and the data terminal 14 are covered with an inorganic film such as a silicon nitride film by plasma CVD. The passivation film 28 is formed with a thickness of about 100 to 200 nm.

  After the film formation, a contact through hole 23 for making contact between the drain electrode 21 and the pixel electrode 24 is formed, an unnecessary passivation film 28 on the data terminal 14, an unnecessary gate insulating film 27 on the gate terminal 13, and The passivation film 28 is removed.

  Thereafter, an unnecessary semiconductor layer 19 for separating the semiconductor layer 19 under the data wiring 18 and the drain electrode 21 and the semiconductor layer 19 under the source electrode 20 using the same mask without peeling off the resist, The unnecessary semiconductor layer 19 on the gate wiring 17 is removed.

  In this way, the third patterning is performed in which the patterning of the passivation film 28 and the patterning of the semiconductor layer 19 are performed in the same process (see (c)).

  Here, the etching of the passivation film 28 and the semiconductor layer 19 is performed by, for example, using buffered hydrofluoric acid (BHF) to make the passivation film 28 overetched by wet etching, retreating from the resist, and then reacting. The semiconductor layer 19 and the gate insulating film 27 layer are etched by dry etching (RIE). Thereby, a favorable taper shape can be obtained.

  Alternatively, the passivation film 28, the semiconductor film 28, and the gate insulating film 27 may be collectively etched by adjusting the etching conditions and performing dry etching.

  Next, an overcoat layer is formed. Specifically, after applying a transparent photosensitive resist made of acrylic resin or the like by a spin coating method, a contact through hole 35 is opened in the overcoat layer (planarization layer) 29 by a photolithography process. (See (d)).

  Finally, a transparent conductive film to be the pixel electrode 24 is formed on the overcoat layer 29 with a sputtering apparatus, and fifth patterning is performed (see (e)).

  At this time, the gate-side lead wiring 15a and the gate terminal 13 are formed in the first patterning step, and the gate insulating film 27, the semiconductor layer 19, and the data side covering the gate-side lead wiring 15a in the second patterning step. In the third patterning step, the semiconductor layer 19, the data-side lead-out line 15b, and a passivation film 28 that partially exposes the data terminal 14 are formed.

  As described above, in the first embodiment, the passivation film 28 and the semiconductor layer 19 are formed in the same patterning process, thereby manufacturing a conventional organic interlayer separation type active matrix substrate. Compared to the method, the patterning process can be reduced by one process.

  As a result, the manufacturing process can be simplified, and an active matrix liquid crystal display device with good display performance can be manufactured at low cost and high throughput.

  Further, as described above, the overcoat film that also serves as the planarizing layer 29 is formed by batch dry etching, so that the steps of the data wiring 18 and the a-Si TFT 16 can be covered, and the gate wiring 17 is directly protected. be able to. Further, without the overcoat film, the side surface of the semiconductor layer 19 is exposed, and there is a concern about side leaks and the like, but by providing the overcoat film, the side surface of the semiconductor layer 19 can be protected.

  Further, even when the passivation film 28, the semiconductor layer 19, and the gate insulating film 27 do not have a good etching shape by the collective dry etching, the overcoat film flattens them, and thus the etching shape is deteriorated. However, there is little production failure.

  In the first embodiment, a photosensitive acrylic film is used as the overcoat film. However, non-photosensitive acrylic may be used and patterning may be performed by etching.

  Further, in order to suppress side leakage of the semiconductor layer 19, a Si-based organic film such as photosensitive or non-photosensitive polysilazane, siloxane, or benzocycloptene (BCB) may be used as the overcoat film.

(Second Embodiment)
FIG. 6 is a plan view of a TFT substrate of a liquid crystal display device according to the second embodiment of the present invention. The figure shows a unit pixel. This liquid crystal display device is a reflective active matrix liquid crystal display device.

  As shown in FIG. 6, the a-Si TFT 16 as an active element has a drain electrode 37 formed in a substantially rectangular shape in accordance with a space surrounded by the gate wiring 17 and the data wiring 18. The drain electrode 37 is connected to a reflection electrode 41 described later via the contact through holes 23 and 35. The semiconductor layer 19 is formed corresponding to the drain electrode 37. Other configurations and operations are the same as those of the TFT substrate shown in FIG.

  7 shows a cross-sectional structure of each part of FIG. 6, (a) is a cross-sectional view taken along the line AA, and (b) is a cross-sectional view taken along the line BB. As shown in FIG. 7, a gate electrode 26 is formed on the transparent insulating substrate 25 of the a-Si TFT 16. A gate insulating film 27 covers the gate electrode 26, and a semiconductor is further formed on the gate insulating film 27. Layer 19 is formed.

  A source electrode 20 and a drain electrode 37 are formed on the semiconductor layer 19 and separated by a back channel of the a-Si TFT 16 provided above the central portion of the semiconductor layer 19 (see (a)). The source electrode 20 and the drain electrode 37 are connected to the semiconductor layer 19 through an ohmic contact layer (not shown). The ohmic contact layer is formed only between the source electrode 20 and the drain electrode 37 and the semiconductor layer 19 by etching away between the source electrode 20 and the drain electrode 37.

  The source electrode 20, the drain electrode 37, and the semiconductor layer 19 are covered with a passivation film 28, and a thick uneven layer 39 is formed so as to cover the passivation film 28. The concavo-convex layer 39 is formed on the basis of a plurality of base pillars 40 projecting from the passivation film 28 (see (b)).

  Further, a reflective film to be the reflective electrode 41 is formed on the uneven layer 39, and the reflective electrode 41 has a contact through hole 35 that penetrates the uneven layer 39 and a contact through hole 23 that penetrates the passivation film 28. To the drain electrode 37 (see (b)).

  A switching signal is input to the a-Si TFT 16 through the gate wiring 17 and the gate electrode 25, and a video signal is input through the data wiring 18 and the drain electrode 37, and writing to the reflective electrode 41 is performed.

  FIG. 8 is a process diagram showing a method for manufacturing the TFT substrate of FIG. Here, the steps up to the step of forming the passivation film 28 (see (a) to (c)) are the same as those in the first embodiment, and thus the description thereof is omitted.

  After the passivation film 28 is formed by the third patterning, the base pillar 40 is formed on the passivation film 28 and the uneven layer 39 is formed. The concavo-convex layer 39 is formed by applying, exposing, developing, and baking a transparent photosensitive resist made of an acrylic resin as a base by a spin coat method.

  After the photosensitive resist is formed, a photosensitive overcoat film made of a film thinner than the concavo-convex layer 39 of the base is applied so as to cover them, and the contact through hole 35 is opened by a photolithography process.

  Through such a two-layer process, the fourth patterning for forming the uneven layer 39 is performed (see (d)).

  In the fourth patterning for forming the uneven layer 39, the uneven layer 39 and the contact through hole 35 are changed using a gray tone mask or the like to change the exposure amount of the uneven layer 39 and the exposure amount of the contact through hole 35. A one-layer process may be performed.

  Finally, a reflective film to be the reflective electrode 41 is formed on the concavo-convex layer 39 by depositing aluminum (Al), silver (Ag), or the like with a sputtering apparatus (fifth patterning is performed) (see (e)).

(Third embodiment)
FIG. 9 is a plan view of a TFT substrate of a liquid crystal display device according to the third embodiment of the present invention. The figure shows a unit pixel. This liquid crystal display device is a reflective active matrix liquid crystal display device.

  As shown in FIG. 9, the a-Si TFT 16 as an active element has a drain electrode 21 formed in an L shape so that almost half of the a-Si TFT 16 overlaps the storage wiring 22 arranged in parallel with the gate wiring 17. Have. Further, a plurality of prismatic base columns 42 serving as the base of the uneven layer 39 are provided. Other configurations and operations are the same as those of the TFT substrate shown in FIG.

  FIG. 10 shows a cross-sectional structure of each part of FIG. 9, (a) is a cross-sectional view taken along the line AA, and (b) is a cross-sectional view taken along the line BB. As shown in FIG. 10, the contact through holes 23 and 35 are provided on the storage electrode 34.

  On the transparent insulating substrate 25, a gate insulating film 27, a semiconductor layer 19, and a passivation film 28 are stacked in the order described, instead of the base pillars 40 protruding from the passivation film 28. A columnar base column 42 protrudes (see (b)).

  An overcoat layer is provided on the base column 42 to cover a step such as the a-Si TFT 16 and the uneven layer 39 is formed using the base column 42 as a base (see (a) and (b)). . Further, on the uneven layer 39, a reflective film that becomes the reflective electrode 41 is connected to the drain electrode 21 through a contact through hole 35 that penetrates the uneven layer 39 and a contact through hole 23 that penetrates the passivation film 28. (See (b)). The other configuration is the same as the cross-sectional structure of each part shown in FIG.

  FIG. 11 is a process diagram showing a method for manufacturing the TFT substrate of FIG.

  Here, at the time of forming the a-Si TFT 16 in the third patterning (see (c)), the base pillar 42 having a laminated structure including the gate insulating film 27, the semiconductor layer 19, and the passivation film 28 is formed, and the fourth patterning is performed. (Refer to (d)), except that the concave / convex layer 39 based on the base pillar 42 is formed, the manufacturing process is the same as that shown in FIG.

  In the case of the manufacturing method shown in the third embodiment, the number of processes can be further reduced as compared with the manufacturing method shown in the second embodiment.

(Fourth embodiment)
FIG. 12 is a plan view of a TFT substrate of a liquid crystal display device according to the fourth embodiment of the present invention. The figure shows a unit pixel. This liquid crystal display device is a color filter on TFT (COT) type active matrix liquid crystal display device.

  As shown in FIG. 12, the a-Si TFT 16 as an active element has a drain electrode 21 formed in an L shape so that almost half of the a-Si TFT 16 overlaps the storage wiring 22 arranged in parallel with the gate wiring 17. It is the same as the TFT substrate shown in FIG.

  13 shows a cross-sectional structure of each part of FIG. 12, (a) is a cross-sectional view taken along the line AA, and (b) is a cross-sectional view taken along the line BB. As shown in FIG. 13, the TFT substrate 11 and the counter substrate 12 are made of a pair of transparent glass substrates arranged to face each other, and a liquid crystal layer 30 is filled in the gap between the substrates 11 and 12.

  On the opposite surface side of the transparent glass substrate (transparent insulating substrate 25) of the TFT substrate 11, the a-Si TFT 16, the pixel electrode 24, the light shielding layer 32, the color filter layer 36, the overcoat layer (planarization layer) 43, and various types Wiring (not shown) or the like is provided, and a common electrode 33 is provided on the opposing surface side of the transparent glass substrate (transparent insulating substrate 31) of the opposing substrate 12.

  That is, the light shielding layer 32 and the color filter layer 36 are formed on the TFT substrate 11 instead of the counter substrate 12. Other configurations and operations are the same as those of the first embodiment shown in FIG.

  A part of the light shielding layer 32 and the color filter layer 36 is formed on the passivation film 28, and an overcoat layer 43 for protecting the light shielding layer 32 and the color filter layer 36 is further formed. A transparent conductive film to be the pixel electrode 24 is formed on the overcoat layer 43, and the pixel electrode 24 passes through a contact through hole 35 that penetrates the overcoat layer 43 and a contact through hole 23 that penetrates the passivation film 28. And connected to the drain electrode 21.

  By applying an image signal voltage between the pixel electrode 24 and the common electrode 33 and controlling the electro-optical state of the liquid crystal layer 30 between the electrodes 24 and 33, the light transmission state of the display panel 10 is changed. And a predetermined image is displayed on the display unit 10a.

  The manufacturing method of the active matrix substrate according to the fourth embodiment is the same as that of the first embodiment except that the light shielding layer 32 and the color filter layer 36 are patterned on the TFT substrate 11 by a normal photolithography process. Since it is the same, description is abbreviate | omitted.

  As described above, in the manufacturing method of the active matrix type liquid crystal display device according to the present invention, the patterning of the semiconductor layer 19 is performed simultaneously with the patterning of the passivation film 28 after the formation of the source electrode 20. 21. The semiconductor layer 19 is located under the source electrode 20.

  Here, since the semiconductor layer 19 is in a floating state and cannot be controlled except for the a-Si TFT portion, that is, the region where the gate electrode 26 is under the semiconductor layer 19, leakage of the semiconductor layer 19 becomes a problem. Therefore, in the configuration in which the data wiring 19 and the drain electrode 21 and the source electrode 20 are connected in a region where the gate electrode 26 is not provided, the charge held in the pixel electrode 24 escapes due to the leakage of the semiconductor layer 19. It is not preferable.

  Therefore, in the region where the gate electrode 26 is not provided, the passivation film 28 is patterned so that the semiconductor layer 19 below the data wiring 19 and the drain electrode 21 and the semiconductor layer 19 below the source electrode 20 are separated.

  Further, in order to prevent a short circuit between the gate wiring 17 and the data wiring 19, the semiconductor pattern is made larger than the data wiring and the drain / source electrode pattern.

  Further, the gate insulating film 27, the semiconductor layer 19, and the passivation film 28 on the gate wiring 17 (other than the a-Si TFT portion) are all removed, and after the removal, they are covered and protected by an overcoat layer. This overcoat layer has a function of covering and flattening the steps of the TFT substrate, and also has a function of protecting the gate wiring 17 and protecting the end portion of the semiconductor layer 19 to suppress side leakage of the a-Si TFT 16. .

  Thus, according to the present invention, after forming the gate electrode on the transparent insulating substrate, the gate insulating film and further the semiconductor layer are formed on the entire surface, the drain electrode is patterned thereon, and the passivation is formed thereon. A film is formed, and then isolation of transistor regions and contact through holes are formed simultaneously.

  In other words, by integrating the photolithography process for forming the passivation film, the island, and the contact into one process, the planarization layer forming process, or the color filter layer and overcoat layer forming process can be reduced. Will not be complicated and will not reduce productivity.

  Therefore, an organic matrix separation type, a color filter on TFT (COT) type or a reflection type active matrix type liquid crystal display device, which can improve the performance of the liquid crystal display device by providing an organic film on the active matrix substrate, is low cost.・ Can be created with high throughput.

  As described above, according to the present invention, a transistor for a liquid crystal display device formed by laminating a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, and a passivation film on a transparent insulating substrate. Since the substrate has a structure in which the semiconductor layer under the data wiring and the drain electrode is separated from the semiconductor layer under the source electrode, a liquid crystal display device having an improved performance by providing an organic film on the transistor substrate. Thus, it can be manufactured with a smaller number of manufacturing steps, and productivity can be improved.

  Moreover, the transistor substrate for a liquid crystal display device can be realized by the method for manufacturing a transistor substrate for a liquid crystal display device according to the present invention.

DESCRIPTION OF SYMBOLS 10 Display panel 10a Display part 11 TFT substrate 12 Opposite substrate 13 Gate terminal 14 Data terminal 15 Lead-out wiring 15a Gate-side lead-out wiring 15b Data-side lead-out wiring 16 a-Si TFT
17 gate wiring 18 data wiring 19 semiconductor layer 20 source electrode 21, 37 drain electrode 22 storage wiring 23, 35 contact through hole 24 pixel electrode 25, 31 transparent insulating substrate 26 gate electrode 27 gate insulating film 28 passivation film 29 planarization layer 30 Liquid crystal layer 32 Light shielding layer 33 Common electrode 34 Storage electrode 36 Color filter layer 39 Concavity and convexity layers 40 and 42 Base column 41 Reflecting electrode 43 Overcoat layer

Claims (13)

On a transparent insulating substrate, a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, and a passivation film are stacked in the order of description, and the liquid crystal layer is disposed opposite to the liquid crystal layer between the counter substrate. In transistor substrates for display devices,
A transistor substrate for a liquid crystal display device, wherein a semiconductor layer under a data line and a drain electrode is separated from a semiconductor layer under a source electrode.   A planarization layer and a pixel electrode are formed on the passivation film in the order of description, and the pixel electrode is connected to the drain electrode through a contact through hole that penetrates the planarization layer and the passivation film. The transistor substrate for a liquid crystal display device according to claim 1.   An uneven layer and a reflective electrode are formed on the passivation film in the order described, and the reflective electrode is connected to the drain electrode through a contact through hole that penetrates the uneven layer and the passivation film. The transistor substrate for a liquid crystal display device according to claim 1.   4. The concavo-convex layer is formed so as to cover a plurality of base protrusions on the transparent insulating substrate, on which the gate insulating film, the semiconductor layer, and the passivation film are stacked. A transistor substrate for a liquid crystal display device according to 1.   3. The transistor substrate for a liquid crystal display device according to claim 2, wherein a light shielding layer and a color filter layer are provided on the passivation film.   The said semiconductor layer and the said passivation film are located in the outer side of the said source electrode and the said drain electrode so that the said source electrode and the said drain electrode may be included. Transistor substrate for liquid crystal display devices.   The transistor substrate for a liquid crystal display device according to claim 6, wherein a laminated structure including the passivation film, the semiconductor layer, and the gate insulating film is formed in a tapered shape. A gate-side lead wiring formed on the transparent insulating substrate and covered with the gate insulating film; and a data-side lead wiring formed on the semiconductor layer and covered with the passivation film;
2. A gate terminal formed on the transparent insulating substrate, and a data terminal formed on the semiconductor layer and partially covered with the passivation film. 8. The transistor substrate for a liquid crystal display device according to any one of 7 above. On a transparent insulating substrate, a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, and a passivation film are stacked in the order of description, and the liquid crystal layer is disposed opposite to the liquid crystal layer between the counter substrate. In a method for manufacturing a transistor substrate for a display device,
A first patterning step of forming a gate wiring, the gate electrode and a gate terminal on the transparent insulating substrate;
A second patterning step of forming the source electrode, the source wiring, the drain electrode, and the data terminal after successively laminating the gate insulating film, the semiconductor layer, and the ohmic contact layer;
After forming the passivation film so as to cover the source electrode, the source wiring, the drain electrode, and the data terminal, and forming a contact through hole for contacting the drain electrode and the pixel electrode, A transistor substrate for a liquid crystal display device comprising: a third patterning step in which patterning of the passivation film and patterning of the semiconductor layer are performed in the same step by removing an unnecessary semiconductor layer using the mask of Manufacturing method. A fourth patterning step of forming an overcoat layer and opening a contact through hole after forming the passivation film;
The method for manufacturing a transistor substrate for a liquid crystal display device according to claim 9, further comprising: a fifth patterning step of forming the pixel electrode on the overcoat layer. A fourth patterning step of forming a concavo-convex layer on the passivation film after forming the passivation film and then opening a contact through hole;
10. A method for manufacturing a transistor substrate for a liquid crystal display device according to claim 9, further comprising: a fifth patterning step of forming a reflective film to be a reflective electrode on the uneven layer. On a transparent insulating substrate, a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, and a passivation film are stacked in the order of description, and the liquid crystal layer is disposed opposite to the liquid crystal layer between the counter substrate. In a method for manufacturing a transistor substrate for a display device,
A first patterning step of forming a gate wiring, the gate electrode and a gate terminal on the transparent insulating substrate;
A second patterning step of forming the source electrode, the source wiring, the drain electrode, and the data terminal after successively laminating the gate insulating film, the semiconductor layer, and the ohmic contact layer;
The passivation film is formed so as to cover the source electrode, the source wiring, the drain electrode, and the data terminal, and a contact through hole that contacts the drain electrode and the pixel electrode is formed. Then, by removing unnecessary semiconductor layers using the same mask, a third patterning process for patterning the passivation film and patterning the semiconductor layer in the same process, and the base pillar and the passivation are performed. Forming a concavo-convex layer on the film, and then opening a contact through hole;
And a fifth patterning step of forming a reflective film to be a reflective electrode on the concavo-convex layer. A method for producing a transistor substrate for a liquid crystal display device, comprising: In the first patterning step, a gate-side lead wiring and a gate terminal are formed,
In the second patterning step, the gate insulating film covering the gate-side lead wiring, the semiconductor layer, the data-side lead wiring and the data terminal are formed,
The pre-third patterning step includes forming the semiconductor layer, the data-side lead-out wiring, and the passivation film that is partially exposed to cover the data terminal. The manufacturing method of the transistor substrate for liquid crystal display devices of description.

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