JP3182035B2 - バッファ速度の自動制御 - Google Patents

バッファ速度の自動制御

Info

Publication number
JP3182035B2
JP3182035B2 JP00181094A JP181094A JP3182035B2 JP 3182035 B2 JP3182035 B2 JP 3182035B2 JP 00181094 A JP00181094 A JP 00181094A JP 181094 A JP181094 A JP 181094A JP 3182035 B2 JP3182035 B2 JP 3182035B2
Authority
JP
Japan
Prior art keywords
power supply
supply voltage
transistor
integrated circuit
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP00181094A
Other languages
English (en)
Japanese (ja)
Other versions
JPH06284010A (ja
Inventor
リー モリス バーナード
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Publication of JPH06284010A publication Critical patent/JPH06284010A/ja
Application granted granted Critical
Publication of JP3182035B2 publication Critical patent/JP3182035B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
  • Electronic Switches (AREA)
JP00181094A 1993-01-13 1994-01-13 バッファ速度の自動制御 Expired - Lifetime JP3182035B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/003,751 US5334885A (en) 1993-01-13 1993-01-13 Automatic control of buffer speed
US003751 1993-01-13

Publications (2)

Publication Number Publication Date
JPH06284010A JPH06284010A (ja) 1994-10-07
JP3182035B2 true JP3182035B2 (ja) 2001-07-03

Family

ID=21707408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP00181094A Expired - Lifetime JP3182035B2 (ja) 1993-01-13 1994-01-13 バッファ速度の自動制御

Country Status (7)

Country Link
US (1) US5334885A (enExample)
EP (1) EP0606727B1 (enExample)
JP (1) JP3182035B2 (enExample)
KR (1) KR0136849B1 (enExample)
DE (1) DE69317249T2 (enExample)
HK (1) HK1003350A1 (enExample)
TW (1) TW280970B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5436578A (en) * 1993-07-14 1995-07-25 Hewlett-Packard Corporation CMOS output pad driver with variable drive currents ESD protection and improved leakage current behavior
US5739714A (en) * 1995-10-24 1998-04-14 Lucent Technologies, Inc. Apparatus for controlling ground bounce
US5959481A (en) 1997-02-18 1999-09-28 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a one shot circuit
AU6655198A (en) * 1997-02-18 1998-09-08 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a tunable current source
US6087853A (en) * 1998-06-22 2000-07-11 Lucent Technologies, Inc. Controlled output impedance buffer using CMOS technology
JP2000165220A (ja) 1998-11-27 2000-06-16 Fujitsu Ltd 起動回路及び半導体集積回路装置
US6300798B1 (en) * 1999-10-15 2001-10-09 Intel Corporation Method and apparatus for controlling compensated buffers
US6681332B1 (en) * 2000-03-13 2004-01-20 Analog Devices, Inc. System and method to place a device in power down modes/states and restore back to first mode/state within user-controlled time window
JP2002185301A (ja) * 2000-12-15 2002-06-28 Fujitsu Ltd 半導体装置及び制御方法
DE60009322T2 (de) * 2000-12-21 2005-02-24 Stmicroelectronics S.R.L., Agrate Brianza Ausgangspuffer mit Konstantschaltstrom
KR100811413B1 (ko) * 2001-09-28 2008-03-07 주식회사 케이티 가변용량 버퍼를 가진 재생 중계기
US6583663B1 (en) * 2002-04-22 2003-06-24 Power Integrations, Inc. Power integrated circuit with distributed gate driver
DE10339047B4 (de) 2003-08-25 2006-10-26 Infineon Technologies Ag Treiber-Einrichtung, insbesondere für ein Halbleiter-Bauelement, sowie Verfahren zum Betreiben einer Treiber-Einrichtung
KR100866146B1 (ko) * 2007-10-11 2008-10-31 주식회사 하이닉스반도체 센스 앰프 제어 회로
US8032778B2 (en) * 2008-03-19 2011-10-04 Micron Technology, Inc. Clock distribution apparatus, systems, and methods
JP2019075760A (ja) * 2017-10-19 2019-05-16 ルネサスエレクトロニクス株式会社 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017807A (en) 1990-07-05 1991-05-21 At&T Bell Laboratories Output buffer having capacitive drive shunt for reduced noise

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8403693A (nl) * 1984-12-05 1986-07-01 Philips Nv Adaptief electronisch buffersysteem.
EP0264470B1 (de) * 1986-10-21 1991-03-06 International Business Machines Corporation Verfahren zur digitalen Regelung der Flankensteilheit der Ausgangssignale von Leistungsverstärkern der für einen Computer bestimmten Halbleiterchips mit hochintegrierten Schaltungen
US4823029A (en) * 1987-06-25 1989-04-18 American Telephone And Telegraph Company At&T Bell Laboratories Noise controlled output buffer
US4959563A (en) * 1988-06-29 1990-09-25 Texas Instruments Incorporated Adjustable low noise output circuit
GB8826918D0 (en) * 1988-11-17 1988-12-21 Motorola Inc Power amplifier for radio frequency signal
US4975598A (en) * 1988-12-21 1990-12-04 Intel Corporation Temperature, voltage, and process compensated output driver
IT1232421B (it) * 1989-07-26 1992-02-17 Cselt Centro Studi Lab Telecom Sistema automatico per l adattamento dell impedenza d uscita di cir cuiti di pilotaggio veloci in tecnologia cmos
US4968902A (en) * 1989-08-02 1990-11-06 Tektronix, Inc. Unstable data recognition circuit for dual threshold synchronous data
US4972101A (en) * 1989-09-19 1990-11-20 Digital Equipment Corporation Noise reduction in CMOS driver using capacitor discharge to generate a control voltage
JPH0451712A (ja) * 1990-06-20 1992-02-20 Sharp Corp 半導体装置
US5111081A (en) * 1990-12-20 1992-05-05 International Business Machines Corporation Process compensated input switching threshold of a CMOS receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017807A (en) 1990-07-05 1991-05-21 At&T Bell Laboratories Output buffer having capacitive drive shunt for reduced noise

Also Published As

Publication number Publication date
US5334885A (en) 1994-08-02
EP0606727B1 (en) 1998-03-04
DE69317249D1 (de) 1998-04-09
TW280970B (enExample) 1996-07-11
JPH06284010A (ja) 1994-10-07
KR0136849B1 (en) 1998-05-15
EP0606727A1 (en) 1994-07-20
DE69317249T2 (de) 1998-06-25
HK1003350A1 (en) 1998-10-23

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