JP2929432B2 - 半導体デバイス製造方法 - Google Patents

半導体デバイス製造方法

Info

Publication number
JP2929432B2
JP2929432B2 JP9036963A JP3696397A JP2929432B2 JP 2929432 B2 JP2929432 B2 JP 2929432B2 JP 9036963 A JP9036963 A JP 9036963A JP 3696397 A JP3696397 A JP 3696397A JP 2929432 B2 JP2929432 B2 JP 2929432B2
Authority
JP
Japan
Prior art keywords
gate electrode
region
substrate
impurity
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP9036963A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1012742A (ja
Inventor
ヒョン・サン・ホアン
ゼ・キョン・アン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ERU JII SEMIKON CO Ltd
Original Assignee
ERU JII SEMIKON CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ERU JII SEMIKON CO Ltd filed Critical ERU JII SEMIKON CO Ltd
Publication of JPH1012742A publication Critical patent/JPH1012742A/ja
Application granted granted Critical
Publication of JP2929432B2 publication Critical patent/JP2929432B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP9036963A 1996-06-10 1997-02-06 半導体デバイス製造方法 Expired - Fee Related JP2929432B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20638/1996 1996-06-10
KR1019960020638A KR100277911B1 (ko) 1996-06-10 1996-06-10 반도체소자 제조방법

Publications (2)

Publication Number Publication Date
JPH1012742A JPH1012742A (ja) 1998-01-16
JP2929432B2 true JP2929432B2 (ja) 1999-08-03

Family

ID=19461337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9036963A Expired - Fee Related JP2929432B2 (ja) 1996-06-10 1997-02-06 半導体デバイス製造方法

Country Status (3)

Country Link
US (1) US6077736A (ko)
JP (1) JP2929432B2 (ko)
KR (1) KR100277911B1 (ko)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10223771A (ja) * 1997-02-12 1998-08-21 Yamaha Corp 半導体装置とその製造方法
TW388100B (en) 1997-02-18 2000-04-21 Hitachi Ulsi Eng Corp Semiconductor deivce and process for producing the same
US6388288B1 (en) * 1998-03-30 2002-05-14 Texas Instruments Incorporated Integrating dual supply voltages using a single extra mask level
US6238982B1 (en) * 1999-04-13 2001-05-29 Advanced Micro Devices Multiple threshold voltage semiconductor device fabrication technology
US6204129B1 (en) * 1999-10-22 2001-03-20 United Microelectronics Corp Method for producing a high-voltage and low-voltage MOS transistor with salicide structure
JP4845299B2 (ja) * 2001-03-09 2011-12-28 富士通セミコンダクター株式会社 半導体装置の製造方法
US6573166B2 (en) * 2001-07-03 2003-06-03 United Microelectronics Corp. Method of fabricating a LDD with different resistance value
US6875658B2 (en) * 2003-05-29 2005-04-05 Vanguard International Semiconductor Corporation High-voltage device with improved punch through voltage and process for same compatible with low-voltage device process
JP4400913B2 (ja) * 2003-11-26 2010-01-20 株式会社日立製作所 ディスクアレイ装置
WO2007011061A1 (en) * 2005-07-22 2007-01-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
KR100632068B1 (ko) * 2005-08-02 2006-10-04 동부일렉트로닉스 주식회사 반도체 소자의 모스 트랜지스터 제조 방법
JP4533821B2 (ja) * 2005-08-16 2010-09-01 パナソニック株式会社 Ｍｏｓ型固体撮像装置
KR101703096B1 (ko) * 2010-09-02 2017-02-07 삼성전자 주식회사 반도체 장치의 제조방법
EP3139171B1 (en) 2015-09-02 2020-02-12 Labsystems Diagnostics Oy Novel methods and kits for detecting of urea cycle disorders using mass spectrometry
CN113488537A (zh) * 2021-05-26 2021-10-08 武汉新芯集成电路制造有限公司 半导体器件及其形成方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4736233A (en) * 1984-06-25 1988-04-05 Texas Instruments Incorporated Interconnect and contact system for metal-gate MOS VLSI devices
EP0187016B1 (en) * 1984-12-27 1991-02-20 Kabushiki Kaisha Toshiba Misfet with lightly doped drain and method of manufacturing the same
US5024960A (en) * 1987-06-16 1991-06-18 Texas Instruments Incorporated Dual LDD submicron CMOS process for making low and high voltage transistors with common gate
JPH02122563A (ja) * 1988-10-31 1990-05-10 Nec Corp 半導体装置の製造方法
US5286998A (en) * 1989-05-31 1994-02-15 Fujitsu Limited Semiconductor device having two transistors forming a memory cell and a peripheral circuit, wherein the impurity region of the first transistor is not subjected to an etching atmosphere
JPH05102428A (ja) * 1991-10-07 1993-04-23 Sony Corp 半導体メモリ装置及びその製造方法
KR960009994B1 (ko) * 1992-10-07 1996-07-25 삼성전자 주식회사 반도체 메모리 장치 및 그 제조방법
US5472887A (en) * 1993-11-09 1995-12-05 Texas Instruments Incorporated Method of fabricating semiconductor device having high-and low-voltage MOS transistors
US5614432A (en) * 1994-04-23 1997-03-25 Nec Corporation Method for manufacturing LDD type MIS device
JP3532625B2 (ja) * 1994-10-06 2004-05-31 東芝マイクロエレクトロニクス株式会社 半導体装置の製造方法
KR970013402A (ko) * 1995-08-28 1997-03-29 김광호 플래쉬 메모리장치 및 그 제조방법
US5719424A (en) * 1995-10-05 1998-02-17 Micron Technology, Inc. Graded LDD implant process for sub-half-micron MOS devices
US5672527A (en) * 1996-03-08 1997-09-30 United Microelectronics Corp. Method for fabricating an electrostatic discharge protection circuit
US5686324A (en) * 1996-03-28 1997-11-11 Mosel Vitelic, Inc. Process for forming LDD CMOS using large-tilt-angle ion implantation

Also Published As

Publication number Publication date
KR980006542A (ko) 1998-03-30
JPH1012742A (ja) 1998-01-16
US6077736A (en) 2000-06-20
KR100277911B1 (ko) 2001-02-01

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