JP2925007B2 - Method for manufacturing thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a thin film transistor used for a switching element of an active matrix type liquid crystal display element, and more particularly to a method of manufacturing a thin film transistor having a polycrystalline silicon layer as an active layer.

[0002]

2. Description of the Related Art Polycrystalline silicon thin-film transistors (poly-Si TFTs) are amorphous silicon thin-film transistors (a-SiT) because polycrystalline silicon has a higher electron mobility than amorphous silicon.
It is expected to have higher performance than FT), and is actively researched and developed for application to active matrix type liquid crystal display devices, contact image sensors, and the like. These devices are required to be large in size and low in cost, and it is necessary to use large and inexpensive glass substrates as substrates.

[0003] In a device commercially available as a poly-Si TFT application device, a TFT is formed on a quartz substrate by using a high-temperature process. High performance poly-Si TFT by using high temperature process
However, it was necessary to use an expensive quartz substrate to withstand a high-temperature process, and the device could not be manufactured at low cost. In order to use an inexpensive glass substrate, the maximum temperature in the poly-Si TFT forming process is at most 600 ° C. or less, preferably 450 ° C.
The following is desirable. Up to 600 ° C., an alkali-free glass substrate cheaper than a quartz substrate can be used, and below 450 ° C., a cheaper low-melting glass substrate can be used.

In order to improve the performance of a device, a poly-Si having a high performance even when using such a low-temperature process is used.
It is necessary to be able to manufacture a TFT. poly-
Important processes for determining the characteristics of the SiTFT include improving the crystal quality of the channel poly-Si film and improving the performance of the gate insulating film. Channel poly-S
An excimer laser annealing (ELA) method has been proposed as a method for improving the performance of an i-film. Although it is said that a poly-Si film having a low defect density contained in the film is obtained by the ELA method, a method of annealing in an oxygen plasma atmosphere has been proposed as a method for further reducing the defects in the poly-Si film. (For example, JP-A-6-196503). This method will be described below with reference to FIG.

First, as shown in FIG. 5A, after a polysilicon layer 102 is formed on a glass substrate 101, annealing is performed in an oxygen plasma 103 atmosphere. At this time,
As shown in FIG. 5B, an oxide film 104 is formed on the polysilicon layer 102. Since oxygen plasma contains electric charges, the positive electric charges 105 are mainly contained in the oxide film 104.
Is taken in. Next, as shown in FIG. 5C, the polysilicon layer 102 and the oxide film 104 are patterned by etching to form an active layer 106. Next, the gate insulating film 107 is continuously formed without removing the oxide film 104.
And a gate electrode 108 are formed. Next, FIG.
As shown in (1), an impurity is implanted into a part of the active layer 106 to form a source / drain region 109. Further, after forming the interlayer insulating film 110, the source / drain regions 109 are formed.
An Al electrode 111 electrically connected to the Al electrode 111 is formed.

[0006] By the above-described oxygen plasma treatment, the polysilicon layer serving as an active layer is exposed to an oxygen plasma atmosphere, and oxygen in the oxygen plasma is bonded to silicon atoms that are labile bonded in the polysilicon layer. Therefore, dangling bonds in the polysilicon layer are reduced, and the channel conductivity is improved.

[0007]

An oxide film is formed on the polysilicon layer by exposing the polysilicon layer serving as an active layer to oxygen plasma. Since electric charges exist in the plasma, the electric charges are taken into the formed oxide film when exposed to oxygen plasma. The characteristics of the thin film transistor formed using this oxide film as a part of the gate insulating film are affected by the electric charge. Specifically, there arises a problem that the threshold voltage shifts to the negative side and the variation of the threshold voltage increases. Further, in the inverted staggered thin film transistor, the back channel portion is made n-type by the charge taken into the oxide film generated by the oxygen plasma treatment, and the leakage current in the back channel portion increases. Therefore, it is an object of the present invention to prevent the threshold voltage of a thin film transistor from being shifted to the negative side or to increase the variation, and to suppress an increase in leak current.

[0008]

SUMMARY OF THE INVENTION The object of the present invention described above is to improve the quality of a polycrystalline silicon layer by treating the polycrystalline silicon layer in a plasma atmosphere containing oxygen.
The problem can be solved by etching away the oxide film generated by the plasma processing.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The method for manufacturing a thin film transistor according to the present invention comprises: (1) forming a polycrystalline silicon layer on an insulating substrate or an insulating film; and (2) forming the polycrystalline silicon layer in an island shape. (3) Dangling bond density of the polycrystalline silicon layer
Exposing the polycrystalline silicon layer to a plasma atmosphere containing oxygen to reduce the following : (4) forming a gate insulating film on the active layer; and (5) forming a gate electrode on the gate insulating film. And (6) forming a source / drain region by doping a part of the active layer with an impurity at a high concentration. In this order or in the (2) th step, the The method is performed by changing the order of the step (3), and is formed by exposing the polycrystalline silicon layer to a plasma atmosphere after the step (3) and before the step (4). The method is characterized in that a step of removing the oxide film is added.

The method of manufacturing a thin film transistor according to the present invention includes: (1 ') a step of forming a gate electrode on an insulating substrate or an insulating film; and (2') a step of forming a gate insulating film on the gate electrode. (3 ′) a step of forming a polycrystalline silicon layer on the gate insulating film; (4 ′) a step of patterning the polycrystalline silicon layer into an island shape to form an active layer; D ) Dangling bond density of the polycrystalline silicon layer
Exposing the polycrystalline silicon layer to a plasma atmosphere containing oxygen to reduce the degree of reduction ; (6 ') forming a channel protective film on the active layer; and (7') part of the active layer. Forming a source / drain region by doping an impurity at a high concentration, in this order or in the step (4 ′) and the step (5 ′).
And / or a method of manufacturing a thin film transistor in which the order of the (6 ′) th step and the (7 ′) th step is reversed, after the (5 ′) th step, the ( Before the step 6 '), a step of removing an oxide film formed by exposing the polycrystalline silicon layer to a plasma atmosphere is added.

Preferably, the (3) th step, the oxide film removing step and the (4) th step, or the (5 ′) th step, the oxide film removing step and the ( Step 6 ') is continuously performed without breaking the vacuum.

According to the present invention, since the polysilicon layer serving as the active layer is exposed to oxygen plasma, dangling bonds in the polysilicon layer can be reduced, and a high quality active layer can be obtained. be able to. Also, after once removing the oxide film formed in the plasma oxidation process,
Since the gate insulating film is formed (in the case of a positive staggered thin film transistor), the charge in the oxygen plasma is not taken into the gate oxide film, and the threshold voltage of the thin film transistor is shifted to the negative side or varies. Is suppressed. In the case of the inverted staggered type, the formation of the back channel is suppressed,
An increase in leakage current can be suppressed. Therefore, according to the present invention, a thin film transistor having a large on / off ratio can be obtained. For example, when the thin film transistor is used as a switching element of an active matrix type liquid crystal display element,
Higher quality of the displayed image can be realized. further,
The active layer surface is not exposed to the atmosphere by continuously performing plasma oxidation of the polysilicon layer, removal of the oxide film formed by the plasma oxidation, and formation of the gate oxide film (or channel protection film) in the same chamber. Since a good interface can be formed, the on-state current of the positive staggered thin film transistor can be further increased. In the case of an inverted staggered transistor, the characteristics can be further stabilized.

[0013]

Next, embodiments of the present invention will be described in detail with reference to the drawings. First Embodiment FIG. 1 shows an n-channel poly-Si
FIG. 3 is a cross-sectional view in the order of steps showing a first embodiment of the present invention for manufacturing a TFT. First, as shown in FIG. 1A, amorphous silicon having a thickness of 120 nm is formed on a glass substrate 101 at a substrate temperature of 450 ° C. using disilane gas, and then activated by excimer laser annealing. A polysilicon layer 102 is formed. Next, the polysilicon layer 102 is exposed to an oxygen plasma 103 atmosphere. At this time, as shown in FIG. 1B, an oxide film 104 having a thickness of about 40 nm is formed on the polysilicon layer 102, and the charges 105 contained in the oxygen plasma are taken into the oxide film. At this time, the thickness of the polysilicon layer 102 is reduced to 100 nm. next,
As shown in FIG. 1C, without removing the oxide film 104, the polysilicon layer 102 is patterned into an island shape by a dry etching method to form an active layer 106.

Next, as shown in FIG.
The oxide film 104 containing 5 is removed with 3% hydrofluoric acid. Next, a growth temperature of 400 using silane gas and oxygen was used.
The gate insulating film 1 having a thickness of 50 nm is formed so as to cover the active layer
07 is formed. Furthermore, a film thickness 1 containing a high concentration of phosphorus
After a polysilicon film having a thickness of 50 nm is formed and patterned to form a gate electrode 108, phosphorus (P) is partially applied to the active layer 106 by ion doping with an acceleration energy of 50 keV and a dose of 5 × 10 ¹⁵ cm ^−2. To form source / drain regions 109. Next, a 300-nm-thick interlayer insulating film 110 made of a silicon nitride film and covering the gate insulating film 107 and the gate electrode 108 is formed by a plasma CVD method. further,
A part of the gate insulating film 107 and part of the interlayer insulating film 110 are removed by a dry etching method to open a contact hole, and an Al electrode 111 is formed. Finally, annealing in a hydrogen plasma atmosphere at a substrate temperature of 300 ° C. terminates defects in the active layer with hydrogen.

FIG. 2 shows the gate voltage dependence of the drain current of the n-channel poly-Si TFT formed by the present embodiment by a solid line, and that of the conventional example by a broken line. In the case of the conventional example, it can be seen that the characteristics are largely shifted in the negative direction because the oxide film mixed with electric charges formed in the plasma oxidation step is used as a part of the gate insulating film. On the other hand, poly-Si TF formed according to the present invention
At T, the gate voltage at which the drain current is minimized is 0 V, and no negative shift in the characteristics is observed. Specifically, n-channel poly-Si formed by a conventional method is used.
Although the threshold value of the TFT was about -2 V and was largely shifted in the negative direction, the poly-
In the case of the Si TFT, the voltage was about 1.5 V, which was a normal value. In addition, the dangling bond density can be reduced by the plasma oxidation step, and the mobility is 200 cm ² /
N-channel poly-Si TFT reaching V · sec
Was fabricated, and a poly-Si TFT having high mobility was able to be formed by a low-temperature process while suppressing fluctuation of the threshold value. That is, a thin-film transistor having a high on-current and a low off-current (leakage current) can be manufactured by this example. Therefore, for example, when the thin film transistor according to the present invention is used as a switching element of an active matrix type liquid crystal display element, voltage holding characteristics are improved, which can contribute to high quality of a display image.

[Second Embodiment] Next, a second embodiment of the present invention will be described with reference to FIGS. FIG.
FIG. 4 is a cross-sectional view schematically illustrating a manufacturing apparatus in which the processing in the second embodiment is performed, and FIG. 4 is a process-order cross-sectional view illustrating the manufacturing process of the second embodiment. As shown in FIG.
The semiconductor manufacturing apparatus used in the embodiment includes a plasma oxidation chamber 201, a dry etching chamber 20
2. It consists of three chambers, a remote plasma CVD (RPCVD) chamber 203, and these chambers are connected by spare chambers 204 and 205. First, a glass substrate 10 on which an active layer 106 is formed by patterning a polysilicon layer into an island shape.
1 is introduced into the plasma oxidation chamber 201.

Here, oxygen is supplied from the gas introduction port 208, and a high frequency voltage is applied by the RF power supply 209 to generate oxygen plasma between the electrodes 206 and 207, as shown in FIG. Then, oxide film 104 is formed so as to cover the surface of active layer 106. As described above, the charge 1 in the plasma oxygen is contained in the oxide film 104.
05 has been captured. Next, oxygen gas in the plasma oxidation chamber is exhausted, and the glass substrate 101 is transferred to the dry etch chamber 202 through the preliminary chamber 204 while maintaining a high vacuum state of 10 ⁻⁷ [Torr] or less. In the dry etch chamber 202, CF ₄ and oxygen are introduced from the gas introduction ports 212 and 213, and a high frequency voltage is applied by the RF power source 214 to form the electrodes 210 and 211.
Plasma is generated in between, and the oxide film 104 on the active layer 106 is etched as shown in FIG. next,
The CF ₄ and oxygen gas in the dry etch chamber 202 are exhausted, and the glass substrate 101 is transferred to the RPCVD chamber 203 through the preliminary chamber 205 while maintaining a high vacuum state of 10 ⁻⁷ [Torr] or less.

Since the high vacuum is maintained, the active layer 10
6 Oxidation of the surface and contamination of the surface can be prevented. RP
In the CVD chamber 203, gas introduction ports 215, 2
The silane gas and the oxygen gas are supplied from the
1 generates plasma between the electrodes 217 and 218. Further, the mesh electrode 219 is supplied by the DC power supply 220.
4C, a gate insulating film 107 made of a SiO ₂ film is formed so as to cover the glass substrate 101 and the active layer 106. As shown in FIG.
Further, as shown in FIG. 4D, a 150 nm-thick gate electrode 1 made of polysilicon containing a high concentration of phosphorus is used.
08, and then the active layer 1 is formed by ion doping.
Phosphorus is implanted into a part of the substrate under the conditions of an acceleration energy of 50 keV and a dose of 5 × 10 ¹⁵ cm ⁻² to form a source / drain region 109.

Next, a 300-nm-thick interlayer insulating film 110 made of a silicon nitride film is formed to cover the gate insulating film 107 and the gate electrode 108 by a plasma CVD method. Further, the gate insulating film 107 and the interlayer insulating film 11
After a part of 0 is removed by a dry etching method to form a contact hole, an Al electrode 111 is formed. Finally, annealing in a hydrogen plasma atmosphere at a substrate temperature of 300 ° C. terminates defects in the active layer with hydrogen.

In this embodiment, the gate insulating film is formed without breaking the vacuum after removing the oxide film.
A good gate insulating film / active layer interface can be formed, and a higher ON current can be obtained in addition to the effects of the first embodiment. Therefore, a thin film transistor having a higher on / off current ratio than that of the first embodiment can be obtained. In this embodiment, the RPCVD method is used as the gate insulating film forming process.
Similar effects can be obtained by using other film forming methods such as the D method and ECR plasma CVD.

The preferred embodiment has been described above.
The present invention is not limited to these embodiments, but can be appropriately modified within the scope described in the claims. For example, although the n-channel poly-Si TFT has been described in the above embodiment, the p-channel poly-Si TFT is also implanted with boron in the ion doping process of the source / drain regions.
It can be manufactured similarly. Further, not only on an insulating substrate but also on a MOSFET having an SOI structure can be similarly manufactured. Further, the present invention can be applied not only to a normal staggered thin film transistor but also to an inverted staggered type. Further, as a gas used for the plasma treatment of the polysilicon layer, any gas containing oxygen such as nitrogen oxide (N ₂ O) can be used, and is not limited to oxygen in the embodiment.

[0022]

As described above, according to the present invention,
Since the oxide film formed in the oxygen plasma process for terminating dangling bonds in the polysilicon layer serving as the active layer is removed before forming the gate insulating film, the threshold of the thin film transistor is generated by the charges mixed in the plasma oxidation process. It is possible to prevent the problem that the value is shifted to the negative side or becomes unstable. Also, the present invention relates to an inverted staggered TFT.
In this case, it is possible to prevent the leakage in the back channel portion caused by the charge taken in the oxide film. Therefore, according to the present invention, the off-state current of the thin film transistor can be reduced. Further, according to the embodiment in which the plasma oxidation step, the oxide film removal step and the gate oxide film (or channel protection film) formation step are continuously performed without breaking the vacuum, a good gate insulating film / active layer interface (or channel A thin film transistor having a protective film / active layer interface) can be formed, and the performance of the thin film transistor can be improved.

[Brief description of the drawings]

FIG. 1 is a sectional view in the order of steps for explaining a first embodiment of the present invention.

FIG. 2 is an electrical characteristic diagram of a thin film transistor manufactured according to a first embodiment of the present invention and a thin film transistor manufactured according to a conventional example.

FIG. 3 is a schematic sectional view of a manufacturing apparatus used in a second embodiment of the present invention.

FIG. 4 is a sectional view in the order of steps for explaining a second embodiment of the present invention.

FIG. 5 is a sectional view in the order of steps for explaining a conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 101 Glass substrate 102 Polysilicon layer 103 Oxygen plasma 104 Oxide film 105 Charge 106 Active layer 107 Gate insulating film 108 Gate electrode 109 Source / drain region 110 Interlayer insulating film 111 Al electrode 201 Plasma oxidation chamber 202 Dry etch chamber 203 Remote plasma CVD ( (RPCVD) chamber 204, 205 Preparatory chamber 206, 207, 210, 211, 217, 218 Electrode 208 Gas introduction port 209, 214, 221 RF power supply 212, 213, 215, 216 Gas introduction port 219 Mesh electrode 220 DC power supply

Claims (5)

(57) [Claims] 1. A step of forming a polycrystalline silicon layer on an insulating substrate or an insulating film, and a step of forming an active layer by patterning the polycrystalline silicon layer into an island shape. (3) Dangling bond density of the polycrystalline silicon layer
Exposing the polycrystalline silicon layer to a plasma atmosphere containing oxygen to reduce the following : (4) forming a gate insulating film on the active layer; and (5) forming a gate electrode on the gate insulating film. And (6) forming a source / drain region by doping a part of the active layer with an impurity at a high concentration. In this order or in the (2) th step, the In the method for manufacturing a thin film transistor, the order of the steps (3) is changed, the polycrystalline silicon layer is formed by exposing the polycrystalline silicon layer to a plasma atmosphere after the step (3) and before the step (4). A method for manufacturing a thin film transistor, characterized by adding a step of removing the formed oxide film. 2. The method according to claim 1, wherein each of the steps is performed in this order, and the step (3), the oxide film removing step, and the step (4) are continuously performed without breaking vacuum. The method for manufacturing a thin film transistor according to claim 1, wherein: 3. A step of forming a gate electrode on an insulating substrate or an insulating film; (2 ') a step of forming a gate insulating film on the gate electrode; Forming a polycrystalline silicon layer on the film; (4 ') patterning the polycrystalline silicon layer into an island shape to form an active layer; and (5') dangling the polycrystalline silicon layer. Bond dense
Exposing the polycrystalline silicon layer to a plasma atmosphere containing oxygen to reduce the degree of reduction ; (6 ') forming a channel protective film on the active layer; and (7') part of the active layer. Forming a source / drain region by doping impurities at a high concentration in the order of (4 ′) and (5 ′), and / or (4). In the method for manufacturing a thin film transistor, wherein the order of the step 6 ') and the step (7') is interchanged, the step (5 ') is followed by the step (6'). A method for manufacturing a thin film transistor, comprising a step of removing an oxide film formed by exposing a crystalline silicon layer to a plasma atmosphere. 4. The thin film transistor according to claim 3, wherein said (5 ') step, said oxide film removing step and said (6') step are performed continuously without breaking vacuum. Manufacturing method. 5. The step of forming a polycrystalline silicon layer in the step (1) or the step (3 ′) includes a step of forming an amorphous silicon layer and a step of annealing the amorphous silicon layer. 4. The method for manufacturing a thin film transistor according to claim 1, wherein: