JP2746100B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a silicide having a uniform thickness on a P-channel diffusion region and an N-channel diffusion region. It relates to a manufacturing method.

[0002]

2. Description of the Related Art As CMOS-type semiconductor devices become more highly integrated, the junction depth becomes shallower and the resistance of an impurity diffusion layer increases, which hinders the manufacture of semiconductor devices having high speed. Therefore, a salicide technique of forming a refractory metal silicide film on a diffusion layer or a polycrystalline silicon gate electrode in a self-aligned manner is used. As a method of forming a refractory metal silicide film in the salicide technique, as shown in FIG. 4A, a gate electrode made of a gate oxide film (4) and polysilicon (5) is formed according to a normal CMOS semiconductor device manufacturing process. And an LDD structure. Next, as shown in FIG. 4B, after covering the P-channel region with a mask, an N-type impurity such as arsenic is implanted into the N-channel region (8) using the polysilicon (5) as a mask.

[0004] Next, as shown in FIG. 4 (c), after covering the N channel region with a mask, a P type impurity, for example, boron fluoride is used for the P channel region (9) using polysilicon (5) as a mask. inject. Thereafter, as shown in FIG. 5D, a titanium film (10) as a high melting point metal is formed on the entire surface by a sputtering method, and then subjected to a first heat treatment in a nitrogen atmosphere to form a film on the N-channel diffusion region (8). , Simultaneously cause a silicide reaction on the P-channel diffusion region (9). Thereafter, a second heat treatment is performed after excessive Ti etching, and a titanium silicide film (11) is formed on the N-channel diffusion region (8), the P-channel diffusion region (9), and the polysilicon (5) (FIG. e)). Based on this method, a better C
Various methods for forming a silicide have been proposed for manufacturing a MOS semiconductor device.

Japanese Patent Application Laid-Open No. Hei 3-21015 discloses a sputtered refractory metal film and a silicon substrate for preventing deterioration of junction characteristics such as generation of leakage current, formation of an optimum junction depth, and prevention of lateral silicide formation. A method is provided in which argon or silicon ions are implanted into an interface to mix the interface. That is, as shown in FIG. 6A, a MOS structure having an LDD structure having a P-channel region and an N-channel region is formed according to a normal CMOS semiconductor device manufacturing process. P channel diffusion region (9), N
When forming the channel diffusion region (8), heat treatment is performed under different conditions. Next, as shown in FIG. 6B, after a titanium film (10) as a high melting point metal film is formed on the entire surface by a sputtering method, argon is applied to the entire surface so that the titanium film (10) and the silicon substrate ( Ion implantation is performed through the titanium film (10) so as to be the interface of 1).

[0005] Thereafter, as shown in FIG. 6 (c), a titanium silicide film is formed by a lamp annealing method.
A first heat treatment is performed at 00 to 650 ° C., a second heat treatment is performed at 700 to 800 ° C. after removing the unreacted titanium film, and the P channel diffusion region (9), the N channel diffusion region (8) and the polysilicon (5) are formed. Then, a titanium silicide film (11) is formed. Then, according to the conventional process, an interlayer insulating film is formed, a contact hole is opened, a metal wiring,
A protective film is formed.

[0006]

The conventional method has a drawback that when heat treatment is performed under the same conditions, the thickness of titanium silicide formed on the P channel diffusion layer and the N channel diffusion layer is different. That is, the N channel diffusion layer is usually doped with a high concentration of arsenic. As a result, the silicide reaction is suppressed and a thin titanium silicide film is formed. On the other hand, the effect of boron doped in the P-channel diffusion layer on the silicide reaction is small, and a thick titanium silicide is formed. The formation of titanium silicides having different thicknesses on both channel diffusion layers in this manner has various adverse effects on the performance of the CMOS semiconductor device.

For example, on an N-channel diffusion layer on which a thin titanium silicide is formed, in the interlayer insulating film reflow process, aggregation of the titanium silicide itself occurs to cause an increase in resistance of the diffusion layer. In a P-channel diffusion layer formed with a thick titanium silicide, a decrease in on-current occurs due to an increase in contact resistance. On the other hand,
In -21015, heat treatment is performed under different conditions for forming the P-channel diffusion region and the N-channel diffusion region, which makes it difficult to control the impurity distribution and increases the number of process steps. Further, it does not mention whether the formed titanium silicide film is formed uniformly. In view of the above, an object of the present invention is to provide a method for solving the above problem by forming a titanium silicide film having a uniform thickness on both channel diffusion layers when heat treatment is performed under the same conditions.

[0008]

According to the present invention, a step of introducing an impurity into a diffusion region on a silicon substrate, a step of implanting silicon ions only into an N channel diffusion region, and a heat treatment in a nitrogen atmosphere or an oxidizing atmosphere are performed. A method for manufacturing a semiconductor device, comprising: a step of forming a refractory metal film over the entire surface; and a heat treatment step of forming a refractory metal silicide. In addition, the method includes a step of performing a heat treatment in an oxidizing atmosphere after introducing impurities into the diffusion region on the silicon substrate, a step of forming a refractory metal film over the entire surface, and a heat treatment step of forming a refractory metal silicide. Of the semiconductor device. Further, there is provided a method of manufacturing a semiconductor device, wherein arsenic is implanted as an N-type impurity into an N-channel region to form an N-channel diffusion region.

[0009]

According to the present invention, excess silicon atoms are implanted into the N-channel diffusion region by implanting silicon ions into the diffusion region and performing a heat treatment in an oxidizing atmosphere or a nitrogen atmosphere. By filling the holes, formation of complex defects can be suppressed. Therefore, the suppression of the titanium silicide reaction on the N-channel diffusion region is relaxed, and a titanium silicide having a thickness greater than that of a normal method can be formed. Also,
The implantation of silicon ions can suppress the formation of complex defects by filling the atomic vacancies during the heat treatment in the N channel region. When the heat treatment is performed under the same conditions, the silicon ions are uniformly formed on both channel diffusion layers. It can form a titanium silicide film having a large thickness. Note that P
In the channel region, the effect of boron doped in the P channel diffusion layer on the silicide reaction is small,
Thick titanium silicide is formed, and there is no effect even if silicon ions are implanted. further,
In the present invention, by heat treatment in an oxidizing atmosphere, interstitial silicon is supplied by the reaction of _{2Si + O 2 = SiO 2 +} Si I. Therefore, formation of complex defects can be suppressed by filling the atomic vacancies with the interstitial silicon. In this case, silicon may be implanted into the diffusion region, or may be silicon from the silicon constituting the substrate. Thereby, a titanium silicide film having a uniform film thickness can be formed on both channel diffusion layers.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment An embodiment of the present invention will be described in detail with reference to the drawings. Embodiment 1 A first embodiment of the present invention will be described with reference to FIGS. FIG. 1A shows a state in which up to a gate electrode is formed on a silicon substrate by a conventional method. An N-type well (2) is formed in a P-type silicon substrate (1), and a field oxide film (3) is formed for element isolation. Thereafter, a gate oxide film (4) is formed, and polysilicon (5) is formed thereon, and the gate oxide film (4) and the polysilicon (5) are patterned to form a gate electrode.

Next, as shown in FIG. 1B, in order to make the N-channel MOS transistor have an LDD structure, an N-type impurity such as phosphorus is implanted into the N-channel region at a low concentration using polysilicon (5) as a mask. , Low concentration diffusion region (6)
To form Thereafter, an oxide film (7) is formed on the side surface of the gate electrode, and arsenic, which is an N-type impurity, is implanted into the N-channel region at a high concentration to form an N-channel diffusion region (8). Thereafter, silicon ions are implanted to make the N-channel diffusion region (8) excessive silicon atoms. Similarly, a P-channel MOS transistor is formed on the N-type well (2). That is, using the polysilicon (5) as a mask, boron fluoride as a P-type impurity is implanted into the P-channel region at a high concentration to form a P-channel diffusion region (9).

Thereafter, a heat treatment at 900 ° C. for about 30 minutes is performed in a nitrogen atmosphere to activate the impurities in both channel diffusion regions. At this time, usually, in the N channel diffusion region, a high concentration of arsenic segregates and a composite defect composed of arsenic clusters and vacancies is likely to be formed. However, in the present invention, since excess silicon atoms are implanted into the N-channel diffusion region (8), formation of compound defects can be suppressed by filling the atomic vacancies during the heat treatment. Next, as shown in FIG. 2C, a titanium film (10) is formed on the entire surface as a high melting point metal film by sputtering.
It is formed about 0 °. Then, in order to form a titanium silicide film on the diffusion regions (8) and (9) and the polysilicon (5), 65 nm is formed by a lamp annealing method in a nitrogen atmosphere.
A first heat treatment is performed at about 0 ° C. for about 30 seconds. At this time, in the usual method, the titanium silicide reaction is suppressed because the N channel diffusion region (8) has a compound defect composed of arsenic clusters and atomic vacancies. As a result, a thinner titanium silicide film is formed on the N-channel diffusion region (8) than on the P-channel diffusion region (9).

However, if the formation of a complex defect composed of arsenic clusters and atomic vacancies is suppressed according to the present invention, N
The suppression of the titanium silicide reaction on the channel diffusion region (8) was alleviated, and a titanium silicide having a thickness 1.4 times as thick as that of a normal method could be formed. Next, unreacted titanium and titanium nitride existing on the titanium silicide are removed by using aqueous ammonia hydrogen peroxide. Next, by performing a second heat treatment at about 850 ° C. for about 10 seconds, as shown in FIG. 2D, a titanium silicide film having a C54 structure and a uniform thickness is formed in both channel diffusion regions (8) and (8). (9) and a state selectively formed on the polysilicon (5). After that, according to a normal process, an interlayer insulating film is formed, a contact hole is opened, a metal wiring is formed, and a protective film is formed.

[Embodiment 2] A second embodiment of the present invention will be described with reference to FIG. As shown in FIG.
A mold well (2) is formed, a field oxide film (3) is formed, a gate electrode is formed, and an N channel diffusion region (8) is formed.
The process is the same as in Example 1 until arsenic is implanted and boron fluoride is implanted into the P channel diffusion region (9). Thereafter, at 900 ° C. and 3 ° C. to activate the impurities in both channel diffusion regions.
A heat treatment for about 0 minutes is performed in an oxidizing atmosphere. On this occasion,
As described in the first embodiment, in the normal method, a complex defect composed of arsenic clusters and atomic vacancies is easily formed in the N-channel diffusion region (8). However, in the present invention, since the heat treatment is performed in an oxidizing atmosphere, 2Si + O ₂ = S
Interstitial silicon is supplied by the reaction of iO ₂ + Si _I. Therefore, formation of complex defects can be suppressed by filling the atomic vacancies with the interstitial silicon.

Next, as shown in FIG. 3B, a titanium film (10) is formed on the entire surface as a high melting point metal film by a sputtering method at about 500 °. Thereafter, in order to form a titanium silicide film on the diffusion regions (8) and (9) and the polysilicon (5), a first heat treatment is performed at about 650 ° C. for about 30 seconds by a lamp annealing method in a nitrogen atmosphere. . At this time, in the usual method, the titanium silicide reaction is suppressed because the N channel diffusion region (8) has a compound defect composed of arsenic clusters and atomic vacancies. As a result, a thinner titanium silicide film is formed on the N-channel diffusion region (8) than on the P-channel diffusion region (9).

However, when the formation of a composite defect composed of arsenic clusters and atomic vacancies is suppressed according to the present invention, N
The suppression of the titanium silicide reaction on the channel diffusion region (8) was alleviated, and a titanium silicide having a thickness 1.2 times as thick as that of a normal method could be formed. The steps after the step of removing unreacted titanium and titanium nitride for manufacturing the CMOS transistor are the same as those described in the first embodiment.

[0017]

As described above, according to the present invention, N
The formation of a composite defect composed of arsenic clusters and atomic vacancies can be suppressed in the channel diffusion region, which is effective in reducing the suppression of the titanium silicide reaction in the N channel diffusion region. As a result, when the silicide reaction heat treatment is performed under the same conditions, it is possible to form a titanium silicide film having a uniform thickness on both channel diffusion regions. Then, aggregation of titanium silicide is suppressed in the N-channel diffusion region, and a decrease in on-current due to an increase in contact resistance is suppressed in the P-channel diffusion region.

[Brief description of the drawings]

FIGS. 1A and 1B are cross-sectional views of a semiconductor manufacturing apparatus for explaining a first embodiment of the present invention; FIGS.

FIGS. 2A and 2B are cross-sectional views (c) and (d) of the semiconductor manufacturing apparatus for explaining the first embodiment of the present invention, which are subsequent to FIGS.

FIG. 3 is a process sectional view of a semiconductor manufacturing apparatus for explaining a second embodiment of the present invention.

4A to 4C are cross-sectional views for explaining a conventional method for manufacturing a semiconductor manufacturing apparatus.

FIGS. 5A and 5B are cross-sectional views illustrating steps (d) and (e) following FIG. 4 for explaining a method for manufacturing a conventional semiconductor manufacturing apparatus.

FIG. 6 is a process cross-sectional view for explaining a conventional method of manufacturing a semiconductor manufacturing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 P-type silicon substrate 2 N-type well 3 Field oxide film 4 Gate oxide film 5 Polysilicon 6 Low concentration diffusion region 7 Oxide film 8 N-channel diffusion region 9 P-channel diffusion region 10 Titanium film 11 Titanium silicide film

Claims (3)

(57) [Claims] A step of introducing an impurity into a diffusion region on a silicon substrate; a step of implanting silicon ions only in an n-channel diffusion region; a step of performing a heat treatment in a nitrogen atmosphere or an oxidizing atmosphere; And a heat treatment step for forming a refractory metal silicide. 2. A method comprising the steps of: performing a heat treatment in an oxidizing atmosphere after introducing an impurity into a diffusion region on a silicon substrate; forming a refractory metal film over the entire surface; and performing a heat treatment process for forming a refractory metal silicide. A method for manufacturing a semiconductor device, comprising: 3. The method according to claim 1, wherein arsenic is implanted as an N-type impurity into the N-channel region to form an N-channel diffusion region.