JP2713211B2 - LCD panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a liquid crystal display panel, and more particularly to a shunt structure of an active matrix liquid crystal display panel.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display panel has a large number of thin film transistors (TFTs) arranged in a plurality of rows and columns. TFTs arranged in the same row
Are commonly connected to one scan signal line, and the drains (sources) of the TFTs arranged in the same column are commonly connected to one data line. The source (drain) of each TFT is connected to a transparent electrode such as ITO as a pixel electrode.

[0003] Each TFT is manufactured by repeating the steps of depositing a conductor layer and a semiconductor layer and selectively etching. Static electricity is often generated in the manufacturing process and the transporting process between manufacturing apparatuses. May be destroyed.

[0004] Therefore, static electricity generated during manufacturing or the like causes TF
Means to protect T etc. are taken.

FIG. 3 is a schematic view of a conventional liquid crystal display panel provided with such protection means (Japanese Patent Laid-Open No. 63-106).
788). The present liquid crystal display panel has a large number of pixels 4 arranged in a matrix and each having a TFT and a pixel electrode, the above-described scan signal line 1 and data line 3, and is actually used as a liquid crystal panel. A shunt bus forming region is provided around a portion (surrounded by a dotted line), and a shunt bus line 5 is provided in the shunt bus forming region, and the bus line 5 includes all the signal lines 1 and the data lines 3.
Connected in common. The wiring 6 is a storage wiring pattern for holding electric charges.

Although the portion surrounded by the dotted line ABCD is cut later as a liquid crystal display panel, static electricity generated during manufacturing is released due to the presence of the ground shunt bus line 5 described above.
Destruction of the TFT is prevented.

The portion of the shunt bus line 5 remaining inside the dotted line ABCD is used as a pad for connecting a drive circuit for driving the display panel.

[0008]

In recent years, the density of display has been steadily increasing with the increase in the density of liquid crystal panels. That is, the width of each signal line is becoming narrower and the pitch is becoming smaller, and the signal line interval is becoming narrower. As a result, the danger of short-circuiting between adjacent signal lines or intersecting signal lines, and the risk of disconnection of signal lines are increasing.

Therefore, it is preferable to check for short-circuits between the signal lines and disconnection of the signal lines when the signal lines of the same level are formed. This is because those that can be repaired are repaired, and those that cannot be repaired are restarted from the first step at that point, thereby making it possible to keep the manufacturing costs low overall.

However, in the configuration shown in FIG. 3, the shunt bus 5 is formed continuously with all the scan signal lines 1 in the same step as the scan signal line 1, and the data line 3 is formed at the time of these formation. 5 is formed. For this reason, it is impossible to detect a short circuit between signal lines or a short circuit at an intersection.

Accordingly, it is an object of the present invention to provide a liquid crystal display panel which can easily inspect a short circuit between each wiring and a signal line while preventing a TFT from being destroyed by static electricity.

[0012]

A liquid crystal display panel according to the present invention has an active matrix portion in which TFTs are arranged in a matrix and a shunt bus forming portion provided around the active matrix portion. Has first and second shunt buses formed independently, the first shunt bus is connected to a plurality of scan signal lines in the active matrix portion, while the second shunt bus is connected to a plurality of scan signal lines in the active matrix portion. Data line
Connected and each grounded via a resistor
It is characterized by having been done.

[0013]

As described above, since the first and second shunt buses are provided independently, at least a short circuit between the scan signal line and the data line is inspected by checking the electrical continuity between the two buses. be able to. In addition, the shunt bath configuration prevents the TFT from being damaged by static electricity. At this time, it is preferable that each shunt bus is grounded via a resistor having a predetermined value in order to easily check the electrical conductivity.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a liquid crystal display panel according to a first embodiment of the present invention. In this panel, four shunt buses 9-1 to 9-4 are formed independently of each other in a shunt bath forming portion. Each of the shunt buses 9-1 to 9-4 is connected to the G via a resistance pattern 8-1 to 8-4, respectively.
Connected to ND (grounded), and further connected to predetermined scan signal lines and data lines. That is, the odd-numbered gate lines 1-1, 1-3,... Are connected to the shunt bus line 9-2 on the left side of the active matrix portion, and the even-numbered gate lines 1-2, 1--1.
Are connected to the shunt bus line 9-4 on the right side of the matrix portion. Also, the odd-numbered data lines 3
, 3-3,... Are connected to the upper shunt bus 9-1 of the matrix portion, and the even-numbered data lines 3-2, 3-3 are connected.
−4,..., The shunt bath below the matrix part 9−
3 is connected. Inspection and measurement pads 10-1 to 10-4 are provided in each shunt bath.

As described above, each shunt bus 9 is grounded via the corresponding resistor 8, but static electricity generated during the process is released and the TFT is protected. In addition, because of the independent shunt bus configuration, it is possible to inspect the scan signal lines 1, the data lines 3, or a short-circuit between them. The details of such inspection will be described later.

Further, in the present embodiment, the storage wiring 2 for connecting one end of the signal charge holding capacitance portion, which is shown as a capacitor, in each pixel 4 to the pixels 4 in common is apparent from comparison with FIG. As described above, each scan signal line 1
As a single wire meandering along. One end of the one meandering storage wiring 2 is connected to the inspection and measurement pad 12, and the other end is grounded via the resistor 8-4. Further, a discharge diode 7 is provided as shown in the figure for performing electrostatic discharge between each scan signal line 1 and the storage wiring 2 and between each data signal line 3 and the storage wiring 2.

Therefore, in the present embodiment, the storage wiring 2 itself and the TFT via the wiring 2 can be protected from static electricity. In addition, a short circuit between the storage wiring 2 and the adjacent wiring can be inspected.

That is, the measuring needle of the tester is placed on the pads 10-2 and 12 and the electric conductivity between them is checked. This makes it possible to inspect whether or not the odd-numbered scan signal line 1 and the storage line 2 are short-circuited. At this time, if a short circuit occurs, the resistance value becomes substantially 0, while
If there is no short circuit, the sum of the resistors 8-2 and 8-4 is detected.
Similarly, the state between the even-numbered scan signal line 1 and the storage line 2 can be checked by placing a tester needle on the pad 10-4 and the pad 12.

Further, by placing the needle of a tester on the pads 10-1 and 12, a short circuit between the odd-numbered data wiring 3 and the storage wiring 2 can be inspected. At this time, if a short circuit occurs, the resistance value becomes 0, and if there is no short circuit, the sum of the resistances 8-1 and 8-4 is detected. A tester needle is placed on the pads 10-3 and the pads 12 for inspection between the even-numbered data wiring 3 and the storage wiring 2.

Furthermore, the pad 10-2 and the pad 10
By placing the tester needle at -1, a short circuit between the odd-numbered data wiring 3 and the odd-numbered scan signal line 1 can be detected. At this time, if a short circuit occurs, the resistance value becomes 0, and if there is no short circuit, the sum of the resistances 8-1 and 8-2 is detected. Similarly, a tester needle is placed on the pad 10-2 and the pad 10-3, the pad 10-4 and the pad 10-1, the pad 10-4 and the pad 10-3, and a short circuit between the corresponding signal lines is detected. .

As described above, by appropriately selecting the two pads to be inspected, a short circuit inspection between various wirings can be performed. Therefore, by appropriately performing such an inspection step in a series of panel manufacturing steps, an undesired short circuit can be found early, and repair can be performed, and manufacturing can be easily restarted.

Next, a method of manufacturing a liquid crystal display panel according to this embodiment will be described, including the above-described inspection.

First, C is applied to the entire surface of a transparent insulating substrate such as glass.
Metal such as r is provided by a sputtering method, and the thus provided metal layer is selectively removed, and as shown in FIG. 1B, the scan signal line 1, the storage line 2-1 and the shunt bus line 9-2 and 9-4, resistance pattern 8-2, 8-
4, 8-5 are formed.

Here, the resistance patterns 8-2, 8-4, 8
-5 is made of the same metal as the shunt bus lines 9-2 and 9-4, etc., but the line width of the pattern is made sufficiently thinner and longer than the shunt bus lines 9-2 and the like. This has a function as a resistor. These resistance values may be different for each pattern, but are preferably the same in view of simplification of manufacturing.

At this stage, it should be noted that only the portion 2-1 of the storage wiring parallel to the scan signal line is formed. Therefore, each part 2 of the storage wiring 2
The -1 portion is in an electrically floating state. In this state, a measuring probe is applied between the pads 10-2 and 10-4 to inspect an electrical short circuit state. If an electrical short circuit condition is detected, this indicates that there is an unnecessary conductor remaining between the two adjacent wires 1 to make them conductive. Therefore, it is possible to repair by cutting out the unnecessary conductor by using a laser or the like, for example, to find the location. If it is electrically open, wiring 1,
Since it indicates that there is a cut-off portion somewhere in 2, it is possible to repair the same portion.

Next, a gate insulating film such as a silicon oxide film or a nitride film is provided on the entire surface of the substrate, and a semiconductor film such as amorphous silicon to be a channel region of the TFT is selectively provided. Further, a hole is selectively formed in the gate insulating film. Thereafter, a metal such as Cr is provided again on the entire surface of the substrate, and is selectively removed to thereby form the data line 3 and the shunt bus line 9-.
1, 9-3, the aforementioned resistance patterns 8-2, 8-4, 8-
5 and the like resistance patterns 8-1, 8-3 and the like are selectively provided. Further, at this time, as shown in FIG. 1B, the remaining portion 2-2 of the storage wiring is formed, and the same portion is connected to the formed portion 2-2 via an opening provided in the gate insulating film. You. As a result, one meandering storage wiring 2 is formed as the wiring. Of course, the intersection 13 between the scan signal line 1 and the storage line 2 and the intersection between the scan signal line 1 and the data line 3 in FIG. 1A are insulated by an insulating film. As is well known, scan signal line 1
Of the data line 3 becomes a drain (source) electrode of the TFT. Further, a source (drain) electrode of the TFT is formed simultaneously with the formation of the data line 3.

After this step, a short may be detected at the intersection of the wiring to be insulated by measuring the probe by placing the probe between the desired pads. Also, pad 1
By measuring with a probe between 0-1 and 10-3, a short circuit between two adjacent data lines 3 can be checked. If there is a short circuit, it can be repaired in some places.

Thereafter, a pixel electrode is formed by selectively providing a transparent electrode of ITO or the like, the entire surface of the substrate is covered with a protective insulating film, and the process proceeds to a panel assembling process.

Thus, in the present embodiment, it is possible to protect the TFT from static electricity which may be generated during the manufacturing process, and at the same time, check for an undesired short circuit between wirings due to dust or the like during the manufacturing process. Alternatively, the results can be fed back to management and review of each process. Furthermore, an unrepairable short circuit can be found at an early stage, and subsequent transportation to a useless process can be prevented.

In the above embodiment, the storage wiring portion 2-1 formed simultaneously with the scan signal line 1 is in a floating state as described above. For this reason, it is conceivable that static electricity generated during the same step or during transfer to the next step accumulates in the floating wiring portion 2-1 and an undesirable discharge occurs to destroy the wiring portion 2-1.

Therefore, as shown in FIG. 2 as a second embodiment of the present invention, it is preferable to form all of the storage lines 2 at the same time as the scan signal lines 1. Note that FIG.
The same components as those described above are denoted by the same reference numerals, and their description is omitted.

In this embodiment, as shown in FIG.
A metal such as Cr is provided on the entire surface of a transparent insulating substrate such as glass,
Etching by photoresist method, scan signal line 1,
Shunt bus lines 9-2, 9-4, resistance pattern 8-
Simultaneously with the formation of 2, 8-5, etc., the meandering storage wiring 2, the grounding resistance pattern 8-4, and the pad 12 are simultaneously formed.

With this configuration, the storage wiring 2 can also be prevented from being damaged by static electricity from the time of its formation. Further, since there is no portion where the scan signal line 1 and the storage wiring 2 intersect, the possibility of a short circuit between the wirings can be reduced as compared with the first embodiment. Moreover, by checking the short-circuit state between the pads 10-2 and 12 and between the pads 10-4 and 12, a short-circuit between the adjacent wirings 1-2 can be detected, and if it is detected, the wiring can be repaired. In repairing, a short-circuit portion is found by scanning with a laser beam, and the portion can be cut with increased power.

[0035]

As described above, according to the present invention, there is provided a shunt bus structure capable of easily performing a short-circuit inspection between wirings while realizing prevention from destruction due to static electricity.

[Brief description of the drawings]

FIG. 1 is a schematic view of a liquid crystal display panel showing a first embodiment of the present invention.

FIG. 2 is a schematic view of a liquid crystal display panel according to a second embodiment of the present invention.

FIG. 3 is a schematic view of a liquid crystal display panel showing a conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Scan signal line 2 Storage wiring 3 Data line 4 1 pixel composition 5 Shunt bus line 6 Storage wiring pattern 7 Ring diode 8 Resistance pattern 9 Shunt bus line 10 Pad 11 Pad 12 Storage wiring pad 13 Scan signal line / storage Wiring intersection pattern 14 External circuit connection pad 15 Precision inspection pad

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-292113 (JP, A) JP-A-2-135490 (JP, A) JP-A-2-157896 (JP, A) JP-A-63-292 10558 (JP, A) JP-A-2-310536 (JP, A) JP-A-6-59283 (JP, A) JP-A-6-317810 (JP, A) JP-A-7-64517 (JP, A) Actual opening 63-33130 (JP, U)

Claims (8)

(57) [Claims] 1. A display panel portion having a plurality of scan signal lines and data lines, and a shunt bus forming portion provided around the display panel portion, wherein the shunt bus forming portion has first and second independent parts. Tomo shunt bus is formed, the first shunt bus are respectively connected to the plurality of scan signal lines, when the second shunt bus is connected to each of the plurality of data lines
To the first shunt bus grounded via a first resistor
And the second shunt bus is connected via a second resistor.
A liquid crystal display panel characterized by being grounded. 2. The first and second shunt baths
First and second pads are provided, respectively.
So that the first chassis is positioned at an adjacent position.
Part of the shunt bath and part of the second shunt bath are parallel
2. The liquid crystal display panel according to claim 1, wherein the liquid crystal display panels are arranged . 3. A display panel portion having a plurality of scan signal lines, a plurality of data lines, and a plurality of thin film transistors each connected to the corresponding scan signal line and data line, and a shunt bus provided around the display panel portion. And a shunt bath forming portion.
Second, third, and fourth shunt buses are formed independently of each other, and the first shunt bus is connected to an even-numbered scan signal line of the plurality of scan signal lines, respectively, and the second shunt bus is A bus connected to an odd-numbered scan signal line among the plurality of scan signal lines; a third shunt bus connected to an even-numbered data line among the plurality of data lines;
Are connected to odd-numbered data lines of the plurality of data lines, respectively , and
Shunt bus is grounded via a first resistor, and
The second shunt bus is grounded via a second resistor, and
The third shunt bus is grounded via a third resistor, and
The fourth shunt bus is grounded via a fourth resistor.
And the display panel has exposed storage wiring.
And the storage wiring is grounded via a resistor.
And the first shunt bath is a first shunt bath.
Pads, and the second shunt bath has a second pad.
And the third shunt bath has a third pad.
And the fourth shunt bath has a fourth pad,
The storage wiring La have a pad storage line
And a short circuit between circuit wirings by using the pads.
A liquid crystal display panel characterized in that a short-circuit inspection can be performed . 4. The semiconductor device according to claim 1, wherein said first to fourth resistors have the same value.
The liquid crystal display panel of claim 3, wherein the that. 5. The semiconductor device according to claim 1, wherein the first to fourth resistance patterns are
It is made of the same metal as the shunt bath,
The line width of the resistance pattern is smaller than the line width of the shunt bath.
4. The liquid crystal display panel according to claim 3 , wherein the liquid crystal display panel is sufficiently thin to have a resistance function . 6. The display pad according to claim 1, wherein the first to fourth pads are provided for the display pad.
4. The liquid crystal display panel according to claim 3 , wherein the liquid crystal display panel is collectively arranged near one side of the tunnel portion . 7. A plurality of pixels arranged in a matrix and each having a thin film transistor and a storage capacitance,
Each of the plurality of scan signal lines connecting the thin film transistors of the pixels arranged in the corresponding row to each other, and a storage line to which one end of each of the storage capacitors in the plurality of pixels is connected, the storage line includes A plurality of first portions formed between adjacent ones of the plurality of scan signal lines, and a plurality of second portions formed in a direction orthogonal to the first portions; The second part is arranged to connect the plurality of first parts in series with each other, and the plurality of first parts are connected to each other .
And the second part is formed continuously on the same plane and is grounded.
LCD panel that is grounded via a resistor pattern for the LCD. 8. An odd-numbered first scan signal line.
A first shunt bus having pads is commonly connected.
A second pad is provided on even-numbered scan signal lines.
Have a second shunt bath connected in common,
The first shunt bath and the second shunt bath
Are independent so that they face each other with the scan signal line in between
And grounded via respective resistors
The liquid crystal display panel of which according to claim 7, wherein the.