JP2639382C - - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pachinko game machine using a computer. 2. Description of the Related Art Some recent pachinko gaming machines use a computer to electronically control the winning probability of a ball. In such a pachinko gaming machine, in order to determine a winning mode, an event that depends on contingency is generated, the winning mode is determined from the event, and the development of a more complex game is controlled in accordance with the winning mode. I have to. However, the output devices such as the light emitting device and the sound emitting device perform only simple controls such as single sound and single light emission. It is desired to perform control. [0003] However, in the conventional pachinko game machine, the processing capacity is becoming saturated due to the control mainly of such complicated game development. Had to proceed. For this reason, in the control of output devices such as a sound emitting device and a light emitting device,
It is difficult to perform more complicated control, for example, control in which each sound is composed of more musical sounds in accordance with the progress of the game, and outputs continuous music having a melody or generates complicated illumination. is there. In addition, there has been a problem that fraud such as exchange of control programs occurs. The present invention has been made in order to improve such a drawback, and an object of the present invention is to realize more complicated control of a pachinko game machine and to further improve entertainment. Means for Solving the Problems [0005] The structure of the present invention for solving the above problems is as follows. That is, a prize detecting device for detecting a prize of a ball in a specific winning opening is provided, and in accordance with the winning in the specific winning opening, a pachinko game is controlled and peripheral devices such as a light emitting device and a sound generating device are controlled. In a pachinko game machine equipped with a control device, the control device may be a first R
A first microprocessor that operates in accordance with the control program stored in the OM to control the pachinko game, and inputs commands or data from the first microprocessor and stores the first microprocessor in the second ROM Operate according to the control program
A set of control data for controlling the unit output of the peripheral device is sequentially transmitted to the peripheral device.
By outputting, continuously controls the series of varying the operation of the peripheral device, wherein the
And at least one or more second microprocessors operating in parallel with the first microprocessor, further wherein the second microprocessor is the therein
A second ROM is built-in. The first microprocessor is used for, for example, a main process for controlling the progress of a game, and the second microprocessor has an internal ROM storing a control program, a sound generator, a light emitting device, and the like. Used for sub-processing to control the device and other output devices. The second microprocessor can operate by inputting a command or data from the first microprocessor, and both microprocessors can operate in parallel. Since real-time parallel processing can be performed, for example, management of the progress of the game and management of the output device can be performed separately in parallel. Therefore, more detailed and complicated control can be performed. Further, unlike the interrupt processing, it is not necessary to perform a processing peculiar to the interrupt processing such as saving of a register, so that the operation is efficient. [0007] Since both microprocessors can be executed in parallel according to their own processing programs, simultaneous processing of different tasks becomes possible. For this reason, it becomes possible to make the game development of the pachinko machine more complicated, to output a melody composed of complicated musical sounds in parallel with the progress of the game, and to realize lighting that fluctuates in a complicated manner. More entertaining can be improved. Also, the development of the program
A unique program to be controlled by each central processing unit can be executed separately without being affected by programs of other microprocessors. Therefore, the development of the game program and the development of the program such as the sound control can be performed by the respective specialists, and the development of the device becomes easy. Further, a control program for the second microprocessor for driving the peripheral device includes an internal RO of the second microprocessor.
Since the control program is stored in M, the exchange of the control program becomes impossible and fraud prevention is achieved. Hereinafter, the present invention will be described with reference to specific examples. In this embodiment, a second microprocessor (hereinafter, abbreviated as “MPU2”) is used for control for generating various melodies in accordance with a state of a game, and a first MPU (hereinafter, abbreviated as “MPU1”) is used. Is used to manage the progress of the game. FIG. 2 is an external view showing the mechanism of the pachinko machine. Reference numeral 50 denotes a frame, and the game board 51 is supported by the frame 50. The game board 51 is provided with various winning ports, of which 52, 53, and 54 are specific winning ports, and when the specific winning port is won, a combination operation for determining a winning mode is started. . 56, 57
, 58, 59, and 60 are ordinary winning ports, and 61 and 62 are winning ports with a tulip-type accessory. 63 is a special winning opening that is opened and closed according to the winning mode,
An opening / closing door 64 is opened / closed by a solenoid 41 provided inside. Further, a V winning opening 63 is provided at the center of the big winning opening, and when the winning opening is won, the opening / closing door 64 generates a continuation right to open and close continuously. In the center of the game board 51, when a ball wins in the special winning openings 52, 53, 54,
A numerical value display 27 for displaying a combination state of chance and a lamp display 29 are provided. The numerical display 27 is a three-digit LED display, and the lamp display 29 is
This is a lamp in which red and blue LEDs are cyclically arranged. When a special winning opening is won, the three-digit numerical value and the lighting LED of the lamp display 29 are rotated at different periods to determine the winning mode, and they are stationary. , The winning mode is determined by the combination, and according to the mode, the special winning opening 6
The opening time of the opening / closing door 64 is controlled. In addition, the game board 51 is provided with various indicators and lamps for displaying an operation state. Reference numeral 30 in the center is a stored number display for displaying the number of balls that have won a specific winning opening and have been suspended. 47a to 47j are operation lamps that blink during the combination operation for determining the winning mode. 43a-4
3c is a panic lamp that blinks together with the lamps 47a to 47j at the time of a big hit. Reference numerals 45a to 45c denote V lamps which blink when there is a winning in the V winning opening 63. FIG. 1 is a block diagram showing an electrical configuration of the apparatus according to the present embodiment.
MPU1 and MPU2 each have an internal ROM and an internal RAM. A RAM 5 is connected to the outside via a multiplexer 6 so that the RAM 5 can be accessed from both sides. Each CPU can operate in parallel according to its own program. A winning detection switch 7 for detecting a winning ball in a special winning opening, a special winning opening winning switch 9 for detecting a winning ball in a special winning opening, and a V winning detection switch 11 for detecting a winning ball in a V winning opening are: It is connected to the MPU 1 via a waveform shaping circuit 13 composed of a flip-flop for preventing chattering. The above-mentioned switch is constituted by a limit switch, and is arranged on a rail for guiding a winning ball from each winning opening. The clock generation circuit 17 outputs a 4 MHz clock signal to the MPU 1 and MPU 2 and outputs a signal to the frequency divider 15. The frequency divider 15 divides the clock signal and outputs an external interrupt signal having a cycle of 4.096 msec to the MPU 1.
Output to The main control of the MPU 1 is started in synchronization with this interrupt signal. Reference numeral 21 denotes a power supply circuit, and a signal of the start switch 23 is a reset signal generation circuit 1
The reset signal, which is an output signal of the MPU 9, is input to reset terminals of MPU1 and MPU2, and the reset signal executes an initial program. The display drive circuit 25, the display selection circuit 31, and the driver 39 are connected to each output port of the MPU1. The display drive circuit 25 and the display selection circuit 31 include:
The above-described numerical display 27, lamp display 29, and stored number display 30 are connected. These displays are dynamically driven by outputting the selected data from the MPU 1 and the display data at regular intervals. That is, each display unit is selected by the display selection circuit 31 and is displayed according to the output signal of the display drive circuit 25 at that time. The driver 39 drives the solenoid 41 according to a signal from the MPU 1 to control the lighting operation of the panic lamp 43, the V lamp 45, and the operation lamp 47. A software controlled sound generator (hereinafter simply “SSG”)
33) is connected to the MPU2. The SSG 33 inputs control data for sound output from the MPU 2 to each register, D / A converts a waveform created based on the control data, and outputs the converted waveform to the speaker 35. The control data for such sound generation is stored in the ROM 3 connected to the MPU 2. Next, the operation of the pachinko machine having such a configuration will be described based on a flowchart showing the processing procedure of the MPU1 and MPU2. (1) Initial setting at power-on When the start switch 23 is turned on, power is supplied to the MPU 1 and MPU 2 and
The reset signal generation circuit 19 outputs a reset signal S4 to the reset end T. Then, the MPU 1 executes the processing shown in FIG. That is, the numerical display registers X1, X2, and X3 storing the three-digit numerical values displayed on the numerical display 27 are set to the initial values, and the display lamp register L storing the lighting lamp of the lamp display 29 is set to the initial value. Set to the initial value. Also, a winning prize ball counter C for counting the number of prize balls that have been won and held in the specific prize port is set to zero, and a special prize port winning counter G for counting the number of prize balls to the special winning port is set to zero. A V winning ball counter A for counting the number of winning balls to the winning port is initialized to zero. Further, the state register F storing the control state is initialized to zero, the hit mode register R storing the hit mode is initialized to zero, and the timers T1, T2 and T3 are initialized to zero. Further, the activation flag S storing the activation state of the MPU 2 is reset. These registers, counters, flags, timers, and the like are provided in the RAM 5. (2) Background Processing After the initial setting, the MPU 1 executes the programs shown in FIGS. 4, 5 and 6 every time an external interrupt signal is input at regular time intervals (4.096 msec). In step 100, the timer is updated. In step 102, the state signal S1 of the switch group is set.
, S2, and S3 are read. These status signals are configured with negative logic,
When the signal is at a low level, the switch is on, indicating that a winning ball has been detected. Therefore, at steps 104, 110, and 114, the falling of each state signal is detected, and only at that time, each of the counters C, G, and A is updated by one. However, the number of prize balls held is counted up to only 4 in step 106. Steps 118 to 166 are processing steps corresponding to each state. Steps 170 to 184 are processing steps of the output device. When the hit mode register R is 0, the solenoid 41 is turned off, so that the special winning opening is closed or the closed state is maintained. When the register R is other than 0, the solenoid 41 is turned on, so that the special winning opening is opened or kept open (steps 170 to 174). That is, the opening and closing of the special winning opening is controlled by the contents of the register R. The numerical display 27 displays the values of the registers X1, X2, and X3, and the lamp display 29 lights the LED specified by the register L (step 176). When the register F is 1, that is, during the combination operation, the operation lamp 47 blinks, and when the register F is 2, that is, when the special winning opening is in the open state, the operation lamp 47 and the panic lamp 43 blink. , When the register F is 2 and the counter A is not 0, that is, when there is a V winning ball,
The lamp 45 is turned on. Further, the value of the counter C is displayed on the stored number display 30 (step 178).
). Steps 180 to 184 are steps for activating the MPU 2 in accordance with the presence or absence of sound generation control. At the time of sound generation control, that is, when the register F is other than 0, the activation flag S is set. Thereafter, when the activation flag S is set, the MPU 1 and M
PU2 performs real-time parallel processing. When the value of the register F becomes 0, the tone generation control is stopped, the start flag S is reset, and the MPU 2 is stopped. (3) Processing when there is no winning ball When there is no winning ball, that is, when the counter C is 0, steps 100 to 1 are performed.
24, 170 to 184 are performed, whereby the numerical display, the lamp display, and each lamp group perform predetermined display. (4) When there is a winning ball (C ≠ 0) (a) Combination operation processing In step 124, the value of the counter C is determined, and if a winning is detected, the value of the counter C is decremented by one. The register F is set to 1 to indicate the combination operation state, and the timer T1 is set to a predetermined value (steps 124 to 130). And step 13
In step 2, random number generation processing is performed, and the generated random numbers are stored in registers X1, X2, X3, and L. Until the time is up in step 134, steps 100 to 118,
132, 134, and 170 to 184 are repeated. The setting of the random numbers is performed every time the process passes through step 132. When the time is up, the hit mode is determined from the contents set in the registers X1, X2, X3, and L in step 136, and the mode is set in the register R. 0 is out, 1 is small hit, 2 is medium hit, and 3 is big hit. If it is off, the register F is set to 0, and the process proceeds to the cycle for determining the next winning ball. (B) Winning Process When the result of the determination in step 136 is a hit, a time is set in the timer T2 according to the hit mode. Then, the background processing described above is performed until it is determined that the time is up. As a result, the special winning opening is opened for a predetermined time, the lamp group is displayed to indicate a panic state, and music in a panic state is played from the speaker 35. At this time, if the number of winning balls in the special winning opening reaches 10,
Even before the time-up, the same processing as the time-up is performed. That is, if the counter G is 0
Is set to 0 (steps 150 and 152). (C) Processing when a V Win Ball Exists If the V win ball is present when the big win port is open, that is, if the counter A is not 0 (step 156), the generation of the continuation right is performed at step 158. To indicate, the value of register F is set to 3. Then, the counter A is decremented by one, the timer T3 is set to a predetermined time, and time-up is determined (steps 158 to 164). This process is for giving a certain delay until the special winning opening is subsequently opened. Thereafter, in step 166, the register R is set to 3 indicating a jackpot, and in step 142
Then, the above-mentioned hit processing is performed. However, the continuation right is adjusted in step 152 so as not to occur more than ten times. (5) Processing of sound generation control In the background processing of steps 180 to 184, it is determined that the sound is in the sound control state.
When the activation flag S is set, the MPU 2 executes the processing of FIG. 7 in parallel with the processing of the MPU 1. That is, the MPU 2 determines whether or not the activation flag S has been set in Step 200, and if it has been set, the process proceeds to Step 201 and thereafter to perform sound control. In step 201, the tone generation mode is determined from the values of the status register F, the winning ball counter C, the winning mode register R, the special winning opening winning counter G, and the V winning ball counter A, and the value is set in the register W. The ROM 3 stores a control data group for outputting a different melody for each tone generation mode, as shown in FIG. The control data includes a set of sound data such as a sound frequency, a sound volume, and an envelope, and time data indicating a sound continuation time of the sound. In step 202, it is determined whether or not the tone generation mode has changed based on the change in the value of the register W. If there has been a change, the process proceeds to step 204, where the head address storing the control data group in that mode is set as the data pointer. Set to P. Next, at step 206, the data pointer P
Is read from the ROM 3, and if it is not the end code of the data, at step 210, the time data is set in the timer based on the control data. Next, in step 212, the sound data is output to each register of the SSG 33, so that one sound is generated from the speaker 35 until it is determined in step 214 that the time is up. Next, when it is determined in step 214 that the time is up, step 2
The process proceeds to S16, where the data pointer P is updated to the address of the next control data, and the process returns to Step 201. When it is determined in step 202 that the mode does not change to the tone generation mode, the initial setting of the address is jumped, and control data of the next sound in that mode is input. As described above, in the present embodiment, the MPU 1 is used for main control of the pachinko machine,
The MPU 2 is used exclusively for controlling a sound generator, which has complicated control. Therefore, it is only necessary to develop an independent program for each, so that the production is simple. Also, M
PU2 can also be used for controlling a lamp group. As shown in FIG. 9, the control data is a set of light emission data designating which lamp of a plurality of lamps is to be turned on, and time data for continuing the state. It is created for each light emission mode. Then, the processing procedure of the MPU 2 is the same as that of FIG. 7; By replacing the output of the light emission data, dynamic light emission control according to the control data is possible. Also, the MPU 2 can be used for random number generation, addition of the number of times of driving the numerical value display, number of opening of the special winning opening in the jackpot mode, and other statistical processing. Further, in the above embodiment, the ROM 3 is an external ROM, but may be a ROM incorporated in the MPU 2.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an electrical configuration of a pachinko machine according to a specific embodiment of the present invention. FIG. 2 is a plan view showing the appearance of the pachinko machine of the embodiment. FIG. 3 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment. FIG. 4 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment. FIG. 5 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment. FIG. 6 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment. FIG. 7 is an exemplary flowchart showing the processing procedure of the microprocessor used in the pachinko machine of the embodiment. FIG. 8 is a structural diagram showing a structure of control data for sound generation control. FIG. 9 is a structural diagram showing a structure of control data for controlling a light emitting device of a pachinko machine according to another embodiment. [Description of Signs] 27 Numerical Display 29 Lamp Display 30 Stored Number Display 43a-43c Panic Lamp 45a-45c V Lamp 47a-47j Operation Lamp 50 Frame 51 Game Board 52,53,54 Special Winning Port 63 Big Win Mouth 64 Opening / closing door 65 V winning opening

Claims (1)

Claims: 1. A prize detecting device for detecting a prize of a ball in a specific winning opening, wherein a pachinko game is controlled in accordance with the winning in the specific winning opening, and a light emitting device; A pachinko gaming machine having a control device for controlling peripheral devices such as a sounding device, wherein the control device operates according to a control program stored in a first ROM to control the pachinko game. A processor and a control for inputting a command or data from the first microprocessor and operating in accordance with a control program stored in a second ROM to control a unit output of the peripheral device Data
By sequentially outputting the set to the peripheral device, a series of changing operations of the peripheral device are performed.
Work continuously controlling said first and at least one or more second microprocessor operating a microprocessor in parallel, further wherein the second microprocessor is the second ROM therein A pachinko game machine characterized by incorporating a pachinko machine.