JP2639382B2 - Pachinko machine - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a pachinko game machine using a computer.

[0002]

2. Description of the Related Art Some recent pachinko machines use a computer to electronically control the winning probability of a ball. In such a pachinko gaming machine, in order to determine the hit mode, an event that depends on chance occurs.
The winning mode is determined from the event, and the development of a more complicated game is controlled in accordance with the winning mode. However, light-emitting devices, output devices such as sounding devices,
Only simple controls such as single sound and single light emission are performed, and there is a demand for more detailed control corresponding to complicated game modes in order to improve entertainment.

[0003]

However, in the conventional pachinko game machine, the processing capacity is becoming saturated due to the control mainly of such complicated game development, and the program must be developed alone. did not become. For this reason, in controlling the output devices such as the sounding device and the light emitting device, more complicated control, for example, depending on the progress of the game, each sound is composed of more musical sounds, and continuous music having a melody is played. It is difficult to perform output or control to generate complicated illumination. In addition, there has been a problem that fraud such as exchange of control programs occurs.

The present invention has been made in order to improve the above-mentioned drawbacks, and an object of the present invention is to realize more complicated control of a pachinko gaming machine, to improve entertainment and to prevent fraud. It is in.

[0005]

The structure of the present invention for solving the above problems is as follows. That is, a prize detecting device for detecting a prize of a ball in a specific winning opening is provided, and in accordance with winning in the specific winning opening, a game is controlled, and a control for controlling peripheral devices such as a light emitting device and a sound generating device is performed. In a pachinko gaming machine equipped with a device, the control device includes:
A first microprocessor that operates in accordance with a program stored in the ROM to control the game;
Input the command or data from the microprocessor, and operate according to the program stored in the ROM.
At least one or more second microprocessors for controlling the peripheral device , further comprising:
The processor is characterized by incorporating the ROM .

[0006]

The first microprocessor is used, for example, for the main processing for controlling the progress of the game, and the second microprocessor has an internal ROM for storing a control program. It is used for sub-processing for controlling the output device. The second microprocessor can operate by inputting a command or data from the first microprocessor, and both microprocessors can operate in parallel. Since real-time parallel processing can be performed, for example, management of the progress of the game and management of the output device can be performed separately in parallel. Therefore, more detailed and complicated control can be performed.
Further, unlike the interrupt processing, it is not necessary to perform a processing peculiar to the interrupt processing such as saving of a register, so that the operation is efficient.

[0007]

As described above, both microprocessors can execute in parallel according to their own processing programs, so that different jobs can be processed simultaneously. For this reason, it becomes possible to make the game development of the pachinko machine more complicated, to output a melody composed of complicated musical sounds in parallel with the progress of the game, and to realize lighting that fluctuates in a complicated manner. More entertaining can be improved. In addition, the development of the program can be performed independently without being affected by the programs of the other microprocessors. Therefore, the development of the game program and the development of the program such as the sound control can be performed by the respective specialists, and the development of the device becomes easy. Further, a control program of the second microprocessor for driving the peripheral device includes:
Since the control program is stored in the internal ROM of the second microprocessor, the control program cannot be exchanged, thereby preventing fraud.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on specific embodiments. In the present embodiment, a second microprocessor (hereinafter abbreviated as “MPU2”) is used for control for generating various melodies according to the state of the game,
The first MPU (hereinafter abbreviated as “MPU1”) is used for managing the progress of the game.

FIG. 2 is an external view showing the mechanism of the pachinko machine. Reference numeral 50 denotes a frame, and the game board 51 is supported by the frame 50. The game board 51 is provided with various winning ports, of which 52, 53, and 54 are specific winning ports, and when the specific winning port is won, a combination operation for determining a winning mode is started. . 56, 57,
58, 59, 60 are ordinary winning openings, 61, 62
Is a winning opening with a tulip-style character. Reference numeral 63 denotes a special winning opening which is opened and closed in accordance with the hit mode. The opening and closing door 64 is opened and closed by a solenoid 41 provided therein. Also, in the center of the big winning opening,
A V winning opening 63 is provided, and when the winning opening is achieved, the opening / closing door 64 generates a continuation right to open and close continuously.

In the center of the game board 51, a specific winning opening 5 is provided.
When a ball is won at 2, 53, 54, a numerical display 27 for displaying a combination state of chance and a lamp display 29 are provided. The numerical display 27 is a three-digit LED display, and the lamp display 29 is a lamp in which red and blue LEDs are cyclically arranged. When a special winning opening is won, the three-digit numerical value and the lighting LED of the lamp display 29 are rotated at different periods to determine the winning mode, and they are stationary. The winning mode is determined by the combination at the time of, and the opening time of the opening and closing door 64 of the special winning opening 63 is controlled according to the mode.

The game board 51 is provided with various indicators and lamps for displaying an operation state. Reference numeral 30 in the center is a stored number display for displaying the number of balls that have won a specific winning opening and have been suspended.
47a to 47j are operation lamps that blink during the combination operation for determining the winning mode. 43a-43
c is a panic lamp that blinks with the lamps 47a to 47j at the time of a big hit. 45a-45c is V
This is a V lamp that flashes when there is a winning in the winning opening 63.

FIG. 1 is a block diagram showing the electrical configuration of the apparatus according to the present embodiment. MPU1 and MPU2
Have an internal ROM and an internal RAM, respectively.
A RAM 5 is connected to the outside via a multiplexer 6 so that the RAM 5 can be accessed from both sides. Each CPU can operate in parallel according to its own program.

A winning detection switch 7 for detecting a winning ball in a special winning opening, a special winning opening winning switch 9 for detecting a winning ball in a special winning opening, and a V winning detection switch 11 for detecting a winning ball in a V winning opening include: Waveform shaping circuit 1 including flip-flop for preventing chattering
3 is connected to the MPU 1. The above-mentioned switch is constituted by a limit switch, and is arranged on a rail for guiding a winning ball from each winning opening. The clock generation circuit 17 converts a 4 MHz clock signal into an MPU
1. The signal is output to the MPU 2 and a signal is output to the frequency divider 15. The frequency divider 15 divides the frequency of the clock signal and outputs an external interrupt signal having a cycle of 4.096 msec to the MPU 1. The main control of the MPU 1 is started in synchronization with this interrupt signal.

Reference numeral 21 denotes a power supply circuit.
Is input to the reset signal generating circuit 19, and the reset signal, which is the output signal, is input to the reset terminals of the MPU1 and MPU2.
The initial program is executed. The display drive circuit 25, the display selection circuit 31, and the driver 39 are connected to each output port of the MPU1. The numerical value display 27, the lamp display 29, and the stored number display 30 are connected to the display drive circuit 25 and the display selection circuit 31. These displays are dynamically driven by outputting the selected data from the MPU 1 and the display data at regular intervals. That is, each display unit is selected by the display selection circuit 31 and is displayed according to the output signal of the display drive circuit 25 at that time. The driver 39 drives the solenoid 41 according to a signal from the MPU 1 to control the lighting operation of the panic lamp 43, the V lamp 45, and the operation lamp 47.

The software controlled sound generator (hereinafter simply referred to as “SSG”) 33
It is connected to PU2. The SSG 33 inputs control data for sound output from the MPU 2 to each register, D / A converts a waveform created based on the control data, and outputs the converted waveform to the speaker 35. The control data for such sound generation is stored in the ROM 3 connected to the MPU 2.

Next, the operation of the pachinko machine having the above configuration will be described by M
A description will be given based on a flowchart showing the processing procedure of PU1 and MPU2.

(1) Initial setting at power-on When the start switch 23 is turned on, MPU1 and MPU2
And the reset signal generating circuit 19 outputs a reset signal S4 to the reset terminal. Then M
PU1 performs the process shown in FIG. That is, the numerical display registers X1, X2, and X3 for storing the three-digit numerical values displayed on the numerical display 27 are set to the initial values, and the display lamp register L for storing the lighting lamp of the lamp display 29 is set.
Is set to the initial value. Also, a winning prize ball counter C for counting the number of prize balls winning and holding the specific prize port is set to zero, a special prize port winning counter G for counting the number of prize balls to the special prize port is set to zero, and V A V winning ball counter A for counting the number of winning balls to the winning port is initialized to zero.

A state register F storing the control state
Is set to zero, and the hit mode register R for storing the hit mode is initialized to zero, and the timers T1, T2, and T3 are initialized to zero. Further, the activation flag S storing the activation state of the MPU 2 is reset. These registers, counters, flags, timers, and the like are provided in the RAM 5.

(2) Background Processing After the initial setting, the MPU 1 executes the programs shown in FIGS. 4, 5 and 6 every time an external interrupt signal is input every fixed time (4.096 msec). Step 1
At 00, a timer update process is performed.
Then, the state signals S1, S2, S3 of the switch group are read. These status signals are configured with negative logic,
When the signal is at a low level, the switch is on, indicating that a winning ball has been detected. Therefore, at steps 104, 110, and 114, the falling of each state signal is detected, and only at that time, each of the counters C, G, and A is updated by one. However, the number of prize balls held is determined in Step 1
At 06, only counting up to 4 is performed.

Steps 118 to 166 are processing steps corresponding to each state. Also, from step 170
Step 184 is a processing step of the output device. When the hit mode register R is 0, the solenoid 41 is turned off, so that the special winning opening is closed or the closed state is maintained. When the register R is other than 0, the solenoid 41 is turned on.
The open state is maintained (steps 170 to 174).

That is, the opening and closing of the special winning opening is controlled by the contents of the register R. Numerical value display 27 has a register X
The values of 1, X2 and X3 are displayed, and the lamp display 29 lights the LED specified by the register L (step 17).
6). When the register F is 1, that is, during the combination operation,
When the operation lamp 47 flashes and the register F is 2, that is, when the special winning opening is in the open state, the operation lamp 47 and the panic lamp 43 flash, and when the register F is 2 and the counter A is not 0, that is, When there is a V winning ball, the V lamp 45 is turned on.

Further, the value of the counter C is displayed on the stored number display 30 (step 178). Step 180
Steps 184 to 184 are steps for activating the MPU 2 depending on whether or not sound generation is controlled. At the time of sound generation control, that is, when the register F is other than 0, the activation flag S is set. Thereafter, when the activation flag S is set, the MPU 1 and the MP
U2 performs real-time parallel processing. When the value of the register F becomes 0, the tone generation control is stopped, the start flag S is reset, and the MPU 2 is stopped.

(3) Processing when there is no winning ball When there is no winning ball, that is, when the counter C is 0, the processing of steps 100 to 124 and 170 to 184 is performed, whereby the numerical value is set. The display, the lamp display, and each lamp group perform a predetermined display.

(4) When there is a winning ball (C ≠ 0) (a) Combination operation processing At step 124, the value of the counter C is determined. When a winning is detected, the value of the counter C is decremented by one. The register F is set to 1 to indicate the combination operation state, and the timer T1 is set to a predetermined value (steps 124 to 130). Then, in step 132, a random number generation process is performed, and the generated random numbers are stored in the registers X1, X2, X3, and L. Until the time is up in step 134, step 100
To 118, 132, 134, and 170 to 184 are repeated. The setting of the random numbers is performed every time the process passes through step 132. When the time is up, in step 136, the registers X1, X2, X3, L
Is set in the register R, and the mode is set in the register R. 0 is out, 1 is small hit, 2 is medium hit, and 3 is big hit. If it is off, the register F is set to 0, and the process proceeds to the cycle for determining the next winning ball.

(B) Processing at the time of winning When the result of the determination at step 136 is a winning, a time is set in the timer T2 according to the winning mode. Then, the background processing described above is performed until it is determined that the time is up. As a result, the special winning opening is opened for a predetermined time, the lamp group is displayed to indicate a panic state, and music in a panic state is played from the speaker 35. At this time, if the number of winning balls in the special winning opening reaches 10, the same processing as the time-up is performed even before the time-up. That is, the counter G is set to 0 and the register R is set to 0 (steps 150 and 152).

(C) Processing when a V Win Ball Exists If a V win ball exists when the large winning opening is open, that is,
If the counter A is not 0 (step 156), step 1
At 58, the value of the register F is set to 3 to indicate the generation of the continuation right. Then, the counter A is decremented by 1, and the timer T3
Is set to a predetermined time, and time up is determined (steps 158 to 164). This process is for giving a certain delay until the special winning opening is subsequently opened. Thereafter, in step 166, the register R is set to 3 indicating a big hit, and the process proceeds to step 142 to perform the above-mentioned hit processing. However, the continuation right is adjusted in step 152 so as not to occur more than ten times.

(5) Processing of sound generation control In the background processing of steps 180 to 184, when it is determined that the sound generation is in the control state and the activation flag S is set,
The MPU 2 executes the processing of FIG. 7 in parallel with the processing of the MPU. That is, the MPU 2 determines whether or not the activation flag S has been set in step 200, and if it has been set,
The process proceeds to step 201 and thereafter to perform sound control. In step 201, the status register F, the winning ball counter C,
Winning mode register R, large winning opening winning counter G, V
The tone generation mode is determined from the value of the winning ball counter A, and the value is set in the register W. The ROM 3 stores a control data group for outputting a different melody for each tone generation mode, as shown in FIG.

The control data includes a set of sounding data such as a sound frequency, a sound volume, and an envelope, and time data indicating a sounding continuation time of the sound. In step 202, it is determined whether or not the tone generation mode has changed from the change in the value of the register W. Set to P. Then step 20
In step 6, the storage contents of the address indicated by the data pointer P are stored in the RO.
If the data is not the end code of the data read from M3, in step 210, time data is set in the timer based on the control data. Next, at step 212, the pronunciation data is set to S
By outputting the data to the registers of the SG 33, one sound is generated from the speaker 35 until it is determined in step 214 that the time is up. Next, when it is determined in step 214 that the time is up, the process proceeds to step 216, where the data pointer P is updated to the address of the next control data, and the process returns to step 201. If it is determined in step 202 that there is no change in the tone generation mode, the initial setting of the address is jumped, and control data of the next sound in that mode is input.

As described above, in this embodiment, the MPU
1 is used for main control of the pachinko machine, and the MPU 2 is used exclusively for control of the sounding device, which is complicated in control. Therefore, it is only necessary to develop an independent program for each,
Easy to make. Further, the MPU 2 can be used for controlling a lamp group. As shown in FIG. 9, the control data is a set of light emission data designating which lamp of a plurality of lamps is to be turned on, and time data for continuing the state. It is created for each light emission mode. The processing procedure of the MPU 2 is the same as that of FIG. 7. Step 201 is for determining the light emission mode, step 204 is for setting the initial address corresponding to the light emission mode, step 210 is for setting the time data, and step 212 is for setting the time data. By changing to the output of the light emission data, dynamic light emission control according to the control data is possible.

The MPU 2 can also be used for random number generation, addition of the number of times of driving the numerical display, the number of opening of the special winning opening in the jackpot mode, and other statistical processing. or,
In the above embodiment, the ROM 3 is an external ROM.
A ROM incorporated in the MPU 2 may be used.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an electrical configuration of a pachinko machine according to a specific embodiment of the present invention.

FIG. 2 is a plan view showing the appearance of the pachinko machine of the embodiment.

FIG. 3 is an exemplary flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment.

FIG. 4 is an exemplary flowchart showing the processing procedure of a microprocessor used in the pachinko machine of the embodiment.

FIG. 5 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment.

FIG. 6 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment.

FIG. 7 is a flowchart showing a processing procedure of a microprocessor used in the pachinko machine of the embodiment.

FIG. 8 is a structural diagram showing a structure of control data for sound generation control.

FIG. 9 is a structural diagram showing a structure of control data for controlling a light emitting device of a pachinko machine according to another embodiment.

[Explanation of symbols]

 27 Numerical display 29 Lamp display 30 Storage number display 43a to 43c Panic lamp 45a to 45c V lamp 47a to 47j Operation lamp 50 Frame 51 Game board 52, 53, 54 Special winning opening 63 Large winning opening 64 Opening door 65 V winning opening

Claims (1)

(57) [Claims] 1. A provided winning detector for detecting winning balls that orchestra in particular winning hole, depending on the winning to the particular winning opening,
In a pachinko game machine equipped with a control device for controlling peripheral devices such as a light-emitting device and a sound-producing device while controlling a game, the control device operates in accordance with a program stored in a ROM.
A first microprocessor for controlling the game by operating the first microprocessor, and inputting a command or data from the first microprocessor and executing the program in accordance with the program stored in the ROM.
Operating I and at least one or more second microprocessors for controlling the peripheral device, further, the
A pachinko gaming machine wherein the second microprocessor incorporates the ROM .