JP2551493B2 - キー信号遅延装置 - Google Patents

キー信号遅延装置

Info

Publication number
JP2551493B2
JP2551493B2 JP2069517A JP6951790A JP2551493B2 JP 2551493 B2 JP2551493 B2 JP 2551493B2 JP 2069517 A JP2069517 A JP 2069517A JP 6951790 A JP6951790 A JP 6951790A JP 2551493 B2 JP2551493 B2 JP 2551493B2
Authority
JP
Japan
Prior art keywords
signal
input
output
key
key signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2069517A
Other languages
English (en)
Japanese (ja)
Other versions
JPH02301269A (ja
Inventor
チヤールズ・ホワイト
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Grass Valley Group Inc
Original Assignee
Grass Valley Group Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Grass Valley Group Inc filed Critical Grass Valley Group Inc
Publication of JPH02301269A publication Critical patent/JPH02301269A/ja
Application granted granted Critical
Publication of JP2551493B2 publication Critical patent/JP2551493B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/2622—Signal amplitude transition in the zone between image portions, e.g. soft edges
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/10—Indexing scheme relating to groups G06F5/10 - G06F5/14
    • G06F2205/104—Delay lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Studio Circuits (AREA)
JP2069517A 1989-03-27 1990-03-19 キー信号遅延装置 Expired - Lifetime JP2551493B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US07/328,923 US4961114A (en) 1989-03-27 1989-03-27 Digital memory delay line for a video border generator
US328,923 1989-03-27
US328923 1989-03-27

Publications (2)

Publication Number Publication Date
JPH02301269A JPH02301269A (ja) 1990-12-13
JP2551493B2 true JP2551493B2 (ja) 1996-11-06

Family

ID=23283057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2069517A Expired - Lifetime JP2551493B2 (ja) 1989-03-27 1990-03-19 キー信号遅延装置

Country Status (4)

Country Link
US (1) US4961114A (en, 2012)
JP (1) JP2551493B2 (en, 2012)
DE (1) DE4009823A1 (en, 2012)
GB (1) GB2231738B (en, 2012)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2230399B (en) * 1989-04-07 1993-09-08 Sony Corp Controlling the combining of video signals
FR2673791B1 (fr) * 1991-03-08 1993-05-07 Thomson Video Equip Methode et dispositif pour, en image numerique, creer une bordure autour d'un sujet incruste sur un fond et generateur d'effets speciaux comportant un tel dispositif.
GB2281834B (en) * 1993-09-03 1997-08-27 Sony Uk Ltd A method of,and apparatus for,generating a key signal for a digital video mixer
US5793440A (en) * 1994-03-18 1998-08-11 Sony Corporation Key signal processing apparatus for video signal processing
JP3558497B2 (ja) * 1997-07-03 2004-08-25 松下電器産業株式会社 エッヂキー発生方法およびエッヂキー発生装置
US5923407A (en) * 1997-12-22 1999-07-13 Eastman Kodak Company Technique for automatically activating and deactivating the availability of image borders as a function of time
DE19903176C2 (de) * 1999-01-21 2001-03-08 Sikom Sicherheits Und Kommunik Verfahren zur Übernahme von Bildsignalen in einen Speicher und hierzu geeignete Schaltungsanordnung
JP4107138B2 (ja) * 2003-04-04 2008-06-25 ソニー株式会社 特殊効果装置、キー信号制御装置及びキー信号制御方法
US8660176B2 (en) * 2008-09-26 2014-02-25 Qualcomm Incorporated Resolving geometric relationships among video data units
US8724697B2 (en) * 2008-09-26 2014-05-13 Qualcomm Incorporated Locating motion vectors for video data units
US8634457B2 (en) * 2008-09-26 2014-01-21 Qualcomm Incorporated Determining availability of video data units

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6016789B2 (ja) * 1976-10-18 1985-04-27 日本電気株式会社 シヤド−キ−信号発生回路
DE2725362C3 (de) * 1977-06-04 1980-08-28 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zum Verarbeiten von Farbfernsehsignalen
JPS5452412A (en) * 1977-10-04 1979-04-25 Toshiba Corp Synchronous coupler for television signal
US4152780A (en) * 1977-10-20 1979-05-01 Sperry Rand Corporation SPS CCD memory system with serial I/O registers
US4214263A (en) * 1978-09-20 1980-07-22 Cbs Inc. Television system for displaying and recording paths of motion
US4485402A (en) * 1980-10-17 1984-11-27 Micro Consultants Limited Video image processing system
US4437092A (en) * 1981-08-12 1984-03-13 International Business Machines Corporation Color video display system having programmable border color
US4408198A (en) * 1981-09-14 1983-10-04 Shintron Company, Inc. Video character generator
US4506348A (en) * 1982-06-14 1985-03-19 Allied Corporation Variable digital delay circuit
US4500912A (en) * 1982-08-04 1985-02-19 Rca Corporation FIR Chrominance bandpass sampled data filter with internal decimation
FR2545297A1 (fr) * 1983-04-26 1984-11-02 Thomson Csf Dispositif de retard et son utilisation dans le dispositif de decodage d'un equipement de mesure de distance
US4581759A (en) * 1983-06-30 1986-04-08 Nippon Gakki Seizo Kabushiki Kaisha Signal delaying device
US4598309A (en) * 1984-05-29 1986-07-01 Rca Corporation Television receiver that includes a frame store using non-interlaced scanning format with motion compensation
JPS6170585A (ja) * 1984-09-13 1986-04-11 日本テレビジヨン工業株式会社 テレビジョン信号発生回路
DE3682353D1 (de) * 1985-03-15 1991-12-12 Ampex Anordnung und verfahren zur erzeugung verschiedener videowischraender.
US4698666A (en) * 1985-07-12 1987-10-06 The Grass Valley Group, Inc. Video key glow and border generator
JPS6299870A (ja) * 1985-10-25 1987-05-09 Toshiba Corp 画像処理装置
JP2575108B2 (ja) * 1985-10-29 1997-01-22 ソニー株式会社 ２画面テレビ受像機
GB8622613D0 (en) * 1986-09-19 1986-10-22 Questech Ltd Processing of video image signals
US4689681A (en) * 1986-10-24 1987-08-25 The Grass Valley Group, Inc. Television special effects system
US5328715A (en) * 1993-02-11 1994-07-12 General Electric Company Process for making metallized vias in diamond substrates

Also Published As

Publication number Publication date
DE4009823C2 (en, 2012) 1993-04-22
GB9004713D0 (en) 1990-04-25
US4961114A (en) 1990-10-02
JPH02301269A (ja) 1990-12-13
GB2231738A (en) 1990-11-21
DE4009823A1 (de) 1990-10-04
GB2231738B (en) 1994-03-16

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