JP2513514Y2 - デコ―ド回路 - Google Patents

デコ―ド回路

Info

Publication number
JP2513514Y2
JP2513514Y2 JP1989139846U JP13984689U JP2513514Y2 JP 2513514 Y2 JP2513514 Y2 JP 2513514Y2 JP 1989139846 U JP1989139846 U JP 1989139846U JP 13984689 U JP13984689 U JP 13984689U JP 2513514 Y2 JP2513514 Y2 JP 2513514Y2
Authority
JP
Japan
Prior art keywords
test
output
circuit
transistors
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1989139846U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0379550U (enrdf_load_stackoverflow
Inventor
実 神原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP1989139846U priority Critical patent/JP2513514Y2/ja
Publication of JPH0379550U publication Critical patent/JPH0379550U/ja
Application granted granted Critical
Publication of JP2513514Y2 publication Critical patent/JP2513514Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP1989139846U 1989-12-04 1989-12-04 デコ―ド回路 Expired - Fee Related JP2513514Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989139846U JP2513514Y2 (ja) 1989-12-04 1989-12-04 デコ―ド回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989139846U JP2513514Y2 (ja) 1989-12-04 1989-12-04 デコ―ド回路

Publications (2)

Publication Number Publication Date
JPH0379550U JPH0379550U (enrdf_load_stackoverflow) 1991-08-14
JP2513514Y2 true JP2513514Y2 (ja) 1996-10-09

Family

ID=31686864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989139846U Expired - Fee Related JP2513514Y2 (ja) 1989-12-04 1989-12-04 デコ―ド回路

Country Status (1)

Country Link
JP (1) JP2513514Y2 (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2818500B2 (ja) 1991-05-17 1998-10-30 日本電気アイシーマイコンシステム株式会社 半導体集積回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158729A (ja) * 1984-01-27 1985-08-20 Nec Corp エンコ−ダ装置
JPS62242423A (ja) * 1986-04-14 1987-10-23 Nec Corp デコ−ダのテスト回路
JPS6386620A (ja) * 1986-09-30 1988-04-18 Canon Inc デコ−ダの動作誤り検出装置
JPH07120954B2 (ja) * 1988-01-18 1995-12-20 日本電気株式会社 デコーダのエラー検出回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2818500B2 (ja) 1991-05-17 1998-10-30 日本電気アイシーマイコンシステム株式会社 半導体集積回路

Also Published As

Publication number Publication date
JPH0379550U (enrdf_load_stackoverflow) 1991-08-14

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