JP2021530003A - 高リフレッシュレートledアレイのための動的ピクセル診断 - Google Patents
高リフレッシュレートledアレイのための動的ピクセル診断 Download PDFInfo
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Abstract
Description
本出願は、2019年6月28日に出願された米国特許出願第16/456,868号、2019年6月28日に出願された米国特許出願第16/456,874号、2018年10月31日に出願された欧州特許出願第18203783.8号、及び2018年9月10日に出願された米国仮特許出願第62/729,244号に対する優先権の利益を主張するものであり、これらのそれぞれは、その全体が参照により本明細書に組み込まれる。
tl〜t4:PWM電圧が高い。ピクセルがオンになり、Vaノードは高い。一方、Kl制御電圧もPWMのターンオンと同期してtlで高い。Kl制御電圧は、ピクセル2及び3については低いままである。ピクセル1のKlがオンになり、Vaノード電圧はVfバス上に表われるので、Vfバス電圧はこのときのピクセル1のVa電圧と等しい。Klのターンオフの瞬間t3は、PWMのターンオフの瞬間t4よりも早いので、ピクセルテストは、ピクセルがオフにされる前に完了することができる。
t2において:PWMは高く、ピクセルはオンになる。tlとt2の間のわずかな遅れは位相シフトである。この瞬間において、ピクセル1のKlはまだオンであるため、ピクセル2のKl制御電圧は低く、ピクセル2はこのPWMサイクルに対してテストされない。
t5〜t7:PWMは高く、ピクセルは2回目に再びオンになる。Kl制御電圧は、t5のターンオンの瞬間にピクセル2と同期し、t6までオンのままである。Kl制御電圧は、他の2つのピクセルについては低いままである。したがって、Vfバス電圧は、ピクセル2のVaノード電圧を反映する。この例では、期間又はサイクル時間のパーセンテージにおける伝導又はオンタイムである、ピクセル2のPWMデューティサイクルは、ピクセル1のそれよりも大きい。ピクセル2のVa電圧は、オンになるときピクセル1のそれよりも低い。
PWMは常に低い。ピクセルはオフのままであり、Vaノード電圧は低い。
t8〜t9:Kl制御電圧はピクセル3について高く、他の2つのピクセルについては低い。したがって、Vfバス電圧は、この時点でピクセル3の低いVa電圧を表す。Vaノード電圧の関係は:
Claims (24)
- LEDピクセルアレイのためのLEDコントローラであって:
行及び列選択信号に応答してアクティブ化されるスイッチK1と、
パルス幅変調デューティサイクルに応答してアクティブ化されるスイッチK2と、
Vbiasからの電流源を提供するスイッチK3と、を有し、ピクセルアクティブ化は、少なくとも部分的に前記スイッチK1及びK2の状態によって決定され、前記LEDピクセルアレイのLEDピクセルは前記スイッチK1によって選択され、前記LEDピクセルの故障判定は、Vfバス上の決定されたVfに基づいて行われる、
LEDコントローラ。 - 前記パルス幅変調デューティサイクルは、画像データによって決定される、
請求項1に記載のLEDコントローラ。 - 前記スイッチK2は、pチャネルMOSFETである、
請求項1に記載のLEDコントローラ。 - 前記スイッチK3は、LDOを制御する、
請求項1に記載のLEDコントローラ。 - 前記スイッチK3は、pチャネルMOSFETである、
請求項1に記載のLEDコントローラ。 - 前記Vfバスは、前記LEDピクセルアレイの全ての前記LEDピクセルによって共有される、
請求項1に記載のLEDコントローラ。 - 前記スイッチK1は、前記パルス幅変調デューティサイクルより速く切り替えられる、
請求項1に記載のLEDコントローラ。 - 前記スイッチK1は、前記パルス幅変調デューティサイクルに対して非同期に切り替えられる、
請求項1に記載のLEDコントローラ。 - 前記スイッチK1は、前記パルス幅変調デューティサイクルに対して同期して切り替えられる、
請求項1に記載のLEDコントローラ。 - 前記スイッチK1の制御位相は、前記パルス幅変調デューティサイクルの制御位相と反対である、
請求項1に記載のLEDコントローラ。 - LEDピクセルアレイのためのLEDコントローラであって:
行及び列選択信号を提供するロジックと、
デューティサイクルを有するパルス幅変調器と、
少なくとも部分的に、前記行及び列選択信号の状態並びに前記パルス幅変調器の前記デューティサイクルにしたがってアクティブ化される、前記LEDピクセルアレイ内のLEDピクセルと、を有し、
前記LEDピクセルの故障判定は、Vfバス上の決定されたVfに基づいて行われる、
LEDコントローラ。 - 前記パルス幅変調器デューティサイクルは、画像データによって決定される、
請求項11に記載のLEDコントローラ。 - 前記Vfバスは、前記LEDピクセルアレイの全ての前記LEDピクセルによって共有される、
請求項11に記載のLEDコントローラ。 - 前記Vfバス上の前記決定されたVfは、前記パルス幅変調デューティサイクルより速く発生する、
請求項11に記載のLEDコントローラ。 - 前記Vfバス上の前記決定されたVfは、前記パルス幅変調デューティサイクルに対して非同期に発生する、
請求項11に記載のLEDコントローラ。 - 前記Vfバス上の前記決定されたVfは、前記パルス幅変調デューティサイクルに対して同期して発生する、
請求項11に記載のLEDコントローラ。 - 前記Vfバス上の前記決定されたVfの制御位相は、前記パルス幅変調デューティサイクルの制御位相と反対である、
請求項11に記載のLEDコントローラ。 - 画像データを保持する画像バッファと、
前記画像データ、LDO状態、及びパルス幅変調モジュール状態に応答してアクティブ化可能であるLEDピクセルと、
前記LDO状態を修正し、前記画像バッファからの前記画像データなしに前記LEDピクセルの直接アドレス指定を可能にするように接続されるLDOバイパスを使用するピクセル診断モードを含むロジックモジュールと、を有する、
LEDコントローラ。 - 前記画像バッファは、前記LDOバイパスがアクティブ化されるとき、前記LEDピクセルから効果的に切り離される、
請求項18に記載のLEDコントローラ。 - 前記画像フレームバッファと前記LEDピクセルとの間に接続されるパルス幅変調器をさらに有する、
請求項18に記載のLEDコントローラ。 - 前記画像フレームバッファと前記LEDピクセルとの間に接続されるパルス幅変調器は、前記画像バッファの読み出し中にロードされるデューティサイクルを有する、
請求項18に記載のLEDコントローラ。 - 前記画像フレームバッファと前記LEDピクセルとの間に接続されるパルス幅変調器は、ピクセル毎に設定可能なリーディングエッジ位相シフトをサポートする、
請求項18に記載のLEDコントローラ。 - 行選択及び列選択が、前記LDOバイパスを使用するとき、アクティブ化のために前記LEDピクセルを選択するために使用される、
請求項18に記載のLEDコントローラ。 - 前記LEDピクセルは、データライン、バイパスライン、PWMOSCライン、Vbiasライン、及びVfラインを備えて供給される、
請求項18に記載のLEDコントローラ。
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US201862729244P | 2018-09-10 | 2018-09-10 | |
US62/729,244 | 2018-09-10 | ||
EP18203783.8 | 2018-10-31 | ||
EP18203783 | 2018-10-31 | ||
US16/456,874 | 2019-06-28 | ||
US16/456,874 US11011100B2 (en) | 2018-09-10 | 2019-06-28 | Dynamic pixel diagnostics for a high refresh rate LED array |
US16/456,868 | 2019-06-28 | ||
US16/456,868 US11107386B2 (en) | 2018-09-10 | 2019-06-28 | Pixel diagnostics with a bypass mode |
PCT/IB2019/057508 WO2020053719A1 (en) | 2018-09-10 | 2019-09-05 | Dynamic pixel diagnostics for a high refresh rate led array |
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US20200082749A1 (en) | 2020-03-12 |
EP3850913A1 (en) | 2021-07-21 |
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US20210256896A1 (en) | 2021-08-19 |
US20200084868A1 (en) | 2020-03-12 |
CN112930713B (zh) | 2022-02-18 |
CN112930713A (zh) | 2021-06-08 |
KR102405205B1 (ko) | 2022-06-08 |
US11011100B2 (en) | 2021-05-18 |
US11107386B2 (en) | 2021-08-31 |
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US11615733B2 (en) | 2023-03-28 |
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