JP2021501956A5 - - Google Patents

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Publication number
JP2021501956A5
JP2021501956A5 JP2020524440A JP2020524440A JP2021501956A5 JP 2021501956 A5 JP2021501956 A5 JP 2021501956A5 JP 2020524440 A JP2020524440 A JP 2020524440A JP 2020524440 A JP2020524440 A JP 2020524440A JP 2021501956 A5 JP2021501956 A5 JP 2021501956A5
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JP
Japan
Prior art keywords
read current
offset value
voltage
memory cells
read
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JP2020524440A
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Japanese (ja)
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JP2021501956A (ja
JP6970826B2 (ja
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Priority claimed from US16/148,304 external-priority patent/US10515694B2/en
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JP2020524440A 2017-11-03 2018-10-02 不揮発性メモリにマルチビットデータを記憶するためのシステム及び方法 Active JP6970826B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201762581489P 2017-11-03 2017-11-03
US62/581,489 2017-11-03
US16/148,304 US10515694B2 (en) 2017-11-03 2018-10-01 System and method for storing multibit data in non-volatile memory
US16/148,304 2018-10-01
PCT/US2018/053930 WO2019089168A1 (en) 2017-11-03 2018-10-02 System and method for storing multibit data in non-volatile memory

Publications (3)

Publication Number Publication Date
JP2021501956A JP2021501956A (ja) 2021-01-21
JP2021501956A5 true JP2021501956A5 (https=) 2021-11-11
JP6970826B2 JP6970826B2 (ja) 2021-11-24

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JP2020524440A Active JP6970826B2 (ja) 2017-11-03 2018-10-02 不揮発性メモリにマルチビットデータを記憶するためのシステム及び方法

Country Status (7)

Country Link
US (1) US10515694B2 (https=)
EP (1) EP3704700B1 (https=)
JP (1) JP6970826B2 (https=)
KR (1) KR102199607B1 (https=)
CN (1) CN111344791B (https=)
TW (1) TWI682393B (https=)
WO (1) WO2019089168A1 (https=)

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KR100671698B1 (ko) * 2004-08-05 2007-01-18 매그나칩 반도체 유한회사 엘디아이 내 디지털 아날로그 변환기의 테스트 장치
US10991433B2 (en) * 2019-09-03 2021-04-27 Silicon Storage Technology, Inc. Method of improving read current stability in analog non-volatile memory by limiting time gap between erase and program
US11755899B2 (en) * 2019-11-11 2023-09-12 Silicon Storage Technology, Inc. Precise programming method and apparatus for analog neural memory in an artificial neural network
US11682459B2 (en) * 2020-05-13 2023-06-20 Silicon Storage Technology, Inc. Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism
US12080355B2 (en) 2021-06-02 2024-09-03 Silicon Storage Technology, Inc. Method of improving read current stability in analog non-volatile memory by post-program tuning for memory cells exhibiting random telegraph noise
US11769558B2 (en) 2021-06-08 2023-09-26 Silicon Storage Technology, Inc. Method of reducing random telegraph noise in non-volatile memory by grouping and screening memory cells
KR102703459B1 (ko) 2021-11-29 2024-09-06 충남대학교 산학협력단 멀티 레벨 구동이 가능한 메모리 소자
US12511073B2 (en) 2024-01-12 2025-12-30 Silicon Storage Technology, Inc. Coarse and fine programming of non-volatile memory cells

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US5029130A (en) 1990-01-22 1991-07-02 Silicon Storage Technology, Inc. Single transistor non-valatile electrically alterable semiconductor memory device
JP2812202B2 (ja) * 1994-06-27 1998-10-22 ヤマハ株式会社 半導体記憶装置
KR100324594B1 (ko) 1999-06-28 2002-02-16 박종섭 강유전체 메모리 장치
US7082056B2 (en) 2004-03-12 2006-07-25 Super Talent Electronics, Inc. Flash memory device and architecture with multi level cells
US7324374B2 (en) 2003-06-20 2008-01-29 Spansion Llc Memory with a core-based virtual ground and dynamic reference sensing scheme
US7315056B2 (en) 2004-06-07 2008-01-01 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with program/erase and select gates
US7554856B2 (en) * 2006-10-06 2009-06-30 Qimonda Flash Gmbh & Co. Kg Memory cell
US20090039410A1 (en) 2007-08-06 2009-02-12 Xian Liu Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
US8238149B2 (en) 2009-06-25 2012-08-07 Macronix International Co., Ltd. Methods and apparatus for reducing defect bits in phase change memory
JP2012209004A (ja) 2011-03-30 2012-10-25 Toshiba Corp 半導体記憶装置
US9099202B2 (en) * 2012-11-06 2015-08-04 Sandisk Technologies Inc. 3D stacked non-volatile storage programming to conductive state
KR102043723B1 (ko) 2013-02-28 2019-12-02 에스케이하이닉스 주식회사 반도체 장치 및 이를 포함하는 프로세서와 시스템
CN105027216B (zh) 2013-03-14 2017-09-22 硅存储技术公司 非易失性存储器编程算法装置和方法
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US9543041B2 (en) * 2014-08-29 2017-01-10 Everspin Technologies, Inc. Configuration and testing for magnetoresistive memory to ensure long term continuous operation
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US9484094B2 (en) 2015-01-21 2016-11-01 Ememory Technology Inc. Control method of resistive random-access memory

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