JP2021044323A - Wiring board and method of manufacturing wiring board - Google Patents

Abstract

To provide a method of inhibiting warp of wiring boards that enable power-supply enhancement.SOLUTION: A wiring board 1a of an embodiment comprises a core substrate 10 that has a first face 10F and a second face 10B, a first build-up layer 11 that is provided on the first face 10F and is formed by alternatively laminating a first interlayer insulation layer 111 and a first conductor layer 112, and a second build-up layer 12 that is provided on the second face 10B and is formed by alternatively laminating a second interlayer insulation layer 121 and a second conductor layer 122. In the conductor layers positioned at the identical level from the core substrate 10 of the first conductor layer 112 and the second conductor layer 122, the area of the second conductor layer 122 is formed to be larger than the area of the first conductor layer 112, and the thickness of the second conductor layer 122 is formed to be larger than the thickness of the first conductor layer 112, and the core substrate 10 includes a first insulation layer 101 on the first face 10F side, a second insulation layer 102 on the second face 10B side, and a metal layer 100 that is sandwiched between the first insulation layer 101 and the second insulation layer 102.SELECTED DRAWING: Figure 1

Description

The present invention relates to a wiring board and a method for manufacturing a wiring board.

Patent Document 1 describes an upper build-up layer having a first conductor layer and an uppermost conductor layer including a pad for mounting an IC chip on the upper and lower surfaces of a core substrate, and a second conductor layer and a motherboard. A printed wiring board is disclosed in which a lower build-up layer is formed with a bottom conductor layer including a pad for connecting. The sum of the thickness of the first conductor layer and the thickness of the uppermost conductor layer is larger than the sum of the thickness of the second conductor layer and the thickness of the lowest conductor layer.

Japanese Unexamined Patent Publication No. 2014-45019

In the printed wiring board of Patent Document 1, the sum of the thicknesses of the conductor layers formed on the upper side of the core substrate of the printed wiring board is larger than the sum of the thicknesses of the conductor layers formed on the lower side of the core substrate. That is, there is a difference in the abundance of metals such as copper constituting the conductor layer between the upper side and the lower side of the core board, and when the temperature of the printed wiring board changes, the heat between the upper side and the lower side of the core board changes. It is considered that the printed wiring board may be warped due to the difference in the amount of expansion.

The wiring board of the present invention has a first surface and a second surface opposite to the first surface, and has a first surface side conductor layer constituting the first surface and a second surface forming the second surface. A first structure in which a core substrate provided with a side conductor layer and a first interlayer insulating layer provided on the first surface of the core substrate and a first conductor layer on the first interlayer insulating layer are alternately laminated. A build-up layer and a second build-up layer provided on the second surface of the core substrate and in which a second interlayer insulating layer and a second conductor layer on the second interlayer insulating layer are alternately laminated. , Is equipped. In the conductor layer of the first conductor layer and the second conductor layer located in the same order as the core substrate, the area of the second conductor layer is larger than the area of the first conductor layer, and the second conductor layer. The thickness of the conductor layer is formed to be larger than the thickness of the first conductor layer, and the core substrate includes the first insulating layer on the first surface side, the second insulating layer on the second surface side, and the core substrate. It contains a metal layer sandwiched between the first insulating layer and the second insulating layer.

The method for manufacturing a wiring board of the present invention has a first surface and a second surface opposite to the first surface, and the first surface side conductor layer formed on the first surface side and the second surface. A core substrate including a second surface side conductor layer formed on the surface side is provided, and on the first surface and the second surface of the core substrate, on the first interlayer insulating layer and the first interlayer insulating layer. A first build-up layer in which the first conductor layers are alternately laminated, and a second build-up in which the second interlayer insulating layer and the second conductor layer on the second interlayer insulating layer are alternately laminated. Includes each layer being provided. Providing the first build-up layer and the second build-up layer means that in the first conductor layer and the second conductor layer located in the same order from the core substrate, the second conductor layer is more than the first conductor layer. Including forming a large area and a large thickness of the conductor layer, providing the core substrate is sandwiched between the first insulating layer on the first surface side and the second insulating layer on the second surface side. Includes forming a metal layer to be formed.

According to the embodiment of the present invention, it is possible to provide a highly reliable wiring board in which the power supply is strengthened and the warp is suppressed.

FIG. 5 is a cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. FIG. 5 is a cross-sectional view showing another example of the wiring board according to the embodiment of the present invention. FIG. 5 is a cross-sectional view showing still another example of the wiring board according to the embodiment of the present invention. The figure which shows an example of the manufacturing method of the wiring board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the wiring board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the wiring board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the wiring board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the wiring board of one Embodiment of this invention.

A wiring board according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of a wiring board 1 having a first surface 1F and a second surface 1B on the opposite side of the first surface 1F, which is an example of the wiring board of one embodiment. As shown in FIG. 1, the wiring board 1 includes a core substrate 10 having a first surface 10F and a second surface 10B opposite to the first surface 10F, and a first surface 10F on the first surface 10F of the core substrate 10. It includes a build-up layer 11 and a second build-up layer 12 on the second surface 10B of the core substrate 10. In the example of FIG. 1, the two build-up layers (first build-up layer 11 and second build-up layer 12) include the same number of conductor layers and insulating layers as each other.

The first build-up layer 11 is formed by alternately laminating the first interlayer insulating layer 111 and the first conductor layer 112 on the first interlayer insulating layer 111. In the example of FIG. 1, the first build-up layer 11 includes three first conductor layers 112 and three first interlayer insulating layers 111. The second build-up layer 12 is formed by alternately laminating a second interlayer insulating layer 121 and a second conductor layer 122 on the second interlayer insulating layer 121. In the example of FIG. 1, the second build-up layer 12 includes three second conductor layers 122 and three second interlayer insulating layers 121. The number of conductor layers and interlayer insulating layers in the first and second build-up layers is not limited to three, and any number, for example, two or less, or four or more conductor layers, is not limited to three. And an interlayer insulating layer may be provided.

The core substrate 10 includes a first insulating layer 101, a second insulating layer 102, and a metal layer 100 sandwiched between the first insulating layer 101 and the second insulating layer 102. The first surface side conductor layer 103 is formed on the first insulating layer 101 (opposite to the metal layer 100), that is, on the first surface 10F side of the core substrate 10, and above the second insulating layer 102 (metal layer). The second surface side conductor layer 104 is formed on the side opposite to 100), that is, on the second surface 10B side of the core substrate 10. The core substrate 10 is formed with through-hole through-holes 105 that penetrate the first insulating layer 101, the metal layer 100, and the second insulating layer 102, and the through-hole through-holes 105 are filled with a conductor. A through-hole conductor 106 that connects the first surface side conductor layer 103 and the second surface side conductor layer 104 is formed.

In the description of the wiring board of the present embodiment, the side far from the center in the thickness direction of the core board 10 in the thickness direction of the wiring board is also referred to as "upper side", "outer side", or simply "upper", and the core. The side closer to the substrate 10 is also referred to as "lower side" or simply "lower side".

The metal layer 100 included in the core substrate 10 is formed as a support for the first insulating layer 101 and the second insulating layer 102 by using a relatively thick metal plate of a metal such as copper or aluminum, for example. .. Since the core substrate 10 includes the metal layer 100, the heat dissipation and strength of the wiring board 1 can be improved. The metal layer 100 is formed with openings corresponding to the positions where the through-hole conductor 106 is formed, and these openings are filled with the resin exuded from the first insulating layer 101 and the second insulating layer 102. ing. As will be described in detail later, when the core substrate 10 has the metal layer 100, the warp that may occur in the wiring substrate 1 can be suppressed.

A desired conductor pattern is formed in each of the conductor layers (first surface side conductor layer 103, second surface side conductor layer 104, first conductor layer 112, and second conductor layer 122). In the example of FIG. 1, the first surface side conductor layer 103 and the second surface side conductor layer 104 are formed of three layers: a metal foil layer, an electroless plating film layer, and an electroplating film layer. The first conductor layer 112 and the second conductor layer 122 are formed of two layers, an electroless plating film layer and an electrolytic plating film layer. However, the number of layers forming each of the conductor layers is not limited to the example of FIG. 1, and for example, the first conductor layer 112 and the second conductor layer 122 may be formed of three layers. Each conductor layer can be formed, for example, by using any metal such as copper, nickel, etc. alone or in combination.

The first insulating layer 101, the second insulating layer 102, the first interlayer insulating layer 111, and the second interlayer insulating layer 121 are formed by using an arbitrary insulating material. Examples of the insulating material include resin materials such as epoxy resin, bismaleimide triazine resin (BT resin), and phenol resin. Each insulating layer formed using these resin materials may contain a reinforcing material such as glass fiber or aramid fiber and / or an inorganic filler such as silica. In the example shown in FIG. 1, the first insulating layer 101 and the second insulating layer 102 include a reinforcing material, and the other insulating layers do not contain a reinforcing material. When each build-up layer contains a plurality of interlayer insulating layers as in the example of FIG. 1, each interlayer insulating layer in each build-up layer is the same from the viewpoint of good adhesion between the interlayer insulating layers. Can be formed using the resin material of. In some cases, peeling between the insulating layers may be prevented. Further, for example, all the interlayer insulating layers, that is, the first interlayer insulating layer 111 in the first build-up layer 11 and the second interlayer insulating layer 121 in the second build-up layer 12 are made of the same insulating resin material. May be formed using. However, different resin materials may be used.

Each interlayer insulating layer connects the conductor layers formed on both sides of the interlayer insulating layers in the first build-up layer 11 and the second build-up layer 12, and the first and second via conductors 113 and 123. Includes. The first interlayer insulating layer 111 includes a first via conductor 113, and the second interlayer insulating layer 121 includes a second via conductor 123. The first and second via conductors 113 and 123 are so-called filled vias formed by filling through holes penetrating each interlayer insulating layer with a conductor. The first and second via conductors 113 and 123 are integrally formed with the conductor layer on the upper side (opposite side of the core substrate 10) of each. Therefore, the first and second via conductors 113 and 123 and the first conductor layer 111 and the second conductor layer 122 are made of the same plating film (electroless plating film and electrolytic plating film) made of, for example, copper or nickel. It is formed.

In the example shown in FIG. 1, a through hole having a tapered shape that reduces the diameter from the surfaces (first surface 10F and second surface 10B) on both sides of the core substrate 10 toward the central portion in the thickness direction of the core substrate 10. A conductor 106 is formed, and connects the first surface side conductor layer 103 and the second surface side conductor layer 104. The through-hole conductor 106 may be formed to have substantially the same diameter in the length direction, or may be formed from one surface toward the other surface (for example, from the first surface 10F to the second surface 10B). ) It may have a tapered shape that reduces the diameter. The through-hole conductor 106 formed through the first insulating layer 101 and the second insulating layer 102 is formed of an electroless plating film and an electrolytic plating film made of copper, nickel, or the like.

The wiring board 1 of the example of FIG. 1 further has a first solder resist layer 13 formed on the first build-up layer 11 and a second solder resist layer formed on the second build-up layer 12. Contains 14. The first solder resist layer 13 covers the first conductor layer 112 of the uppermost layer (the layer farthest from the core substrate 10), and the second solder resist layer 14 is the second layer of the uppermost layer (the layer farthest from the core substrate 10). It covers the conductor layer 122. The first and second solder resist layers 13 and 14 are formed by using, for example, an epoxy resin or a polyimide resin.

Electronic components (not shown) such as semiconductor elements can be mounted on the first surface 1F of the wiring board 1. The outermost first conductor layer 112 of the first build-up layer 11 of the wiring board 1 includes a plurality of connection pads 112a for being electrically connected to the terminals of such electronic components. The solder resist layer 13 has an opening for exposing the connection pad 112a. On the other hand, the second surface 1B of the wiring board 1 can be connected to an external electric circuit board such as a motherboard. The outermost second conductor layer 122 of the second build-up layer 12 of the wiring board 1 includes a plurality of connection pads 122a for being electrically connected to the terminals of such an external board. The solder resist layer 14 has an opening that exposes the connection pad 122a.

In the wiring board 1, the area of the first conductor layer 112 in the first build-up layer 11 on the first surface 10F side of the core substrate 10 (here, the area of the conductor layer means the occupied area of the conductor in the conductor layer). The area of the second conductor layer 122 in the second build-up layer 12 on the second surface 10B side of the core substrate 10 is different (hereinafter, the material of each conductor layer is not limited to copper, but The ratio of the total area of the conductor pattern in each conductor layer to the area of the wiring board 1 is called the residual copper ratio). In the example shown in FIG. 1, in the conductor layers located in the same order from the core substrate 10, the residual copper ratio of the conductor layer on the second surface 10B side, that is, the residual copper ratio of the second conductor layer 122 is the first surface 10F. It is larger than the residual copper ratio of the conductor layer on the side, that is, the residual copper ratio of the first conductor layer 112. For example, the residual copper ratio of the second conductor layer 122 is 68%, and the residual copper ratio of the first conductor layer 112 is 57%. Here, the "conductor layers located in the same order from the core substrate 10" are ordered from the core substrate 10 to the conductor layers in each build-up layer from the first surface 1F side or the second surface 1B side of the wiring board 1. It means conductor layers that have the same order when attached.

In the example shown in FIG. 1, in the first conductor layer 112 and the second conductor layer 122 located in the same order from the core substrate 10, the thickness of the second conductor layer 122 is thicker than the thickness of the first conductor layer 112. It is formed to be. For example, the thickness of the second conductor layer 122 laminated on the second interlayer insulating layer 121 closest to the core substrate 10 side of the second build-up layer 12 is the largest among the first build-up layers 11. It is thicker than the thickness of the first conductor layer 112 laminated on the first interlayer insulating layer 111 close to the core substrate 10 side. Further, the thickness of the outermost second conductor layer 122 of the second build-up layer 12 is thicker than the thickness of the outermost first conductor layer 112 of the first build-up layer 11. For example, the thickness of the second conductor layer 122 is 25 μm, and the thickness of the first conductor layer 112 is 15 μm. Therefore, the current allowable amount on the second surface 1B side of the wiring board 1 can be increased. The voltage drop and heat generation of the power supply line on the second surface 1B side can be suppressed. Therefore, it is considered that the power supply on the second surface 1B of the wiring board 1 can be strengthened while forming the conductor pattern in the first build-up layer 11 of the wiring board 1 at a fine pitch.

The difference in the residual copper ratio and the thickness between the second conductor layer 122 of the second build-up layer 12 and the first conductor layer 112 of the first build-up layer 11 is that is, the first build-up layer 11 and the second. This is the difference (volume difference) in the abundance of conductors from the build-up layer 12. Due to this volume difference, for example, when the temperature changes such as solder reflow, the amount of thermal expansion of the first build-up layer 11 and the amount of thermal expansion of the second build-up layer 12 are different. This difference in the amount of thermal expansion may cause a warp of the wiring board 1 (for example, a warp that becomes convex toward the second surface 1B). The degree of warpage that occurs in the wiring board 1 due to the difference in the amount of thermal expansion between the first build-up layer 11 and the second build-up layer 12 is the rigidity of the components of the wiring board 1, particularly the thickness of the wiring board 1. It may change depending on the rigidity of the core substrate 10 forming the central portion in the longitudinal direction. In the present embodiment, since the core substrate 10 contains the metal layer 100 having a relatively high bending rigidity, the generated warpage can be suppressed.

The thickness of each of the first conductor layers 112 in the first build-up layer 11 may be equal or different. For example, the thickness of each of the first conductor layers 112 is 5 μm or more and 20 μm or less. Further, the thickness of each of the second conductor layers 122 in the second build-up layer 12 may be equal or different. For example, the thickness of each of the second conductor layers 122 is 15 μm or more and 30 μm or less. The metal layer 100 included in the core substrate 10 described above is thicker than the thickness of the second conductor layer 122, and specifically, the thickest second conductor layer 122 when the thickness of each of the second conductor layers 122 is different. It can be formed thicker than, for example, 30 μm or more, and can have a thickness of 100 μm or less.

The thickness of each of the first surface side conductor layer 103 and the second surface side conductor layer 104 of the core substrate 10 is, for example, 10 μm or more and 40 μm or less. In the example of FIG. 1, the thickness of the first surface side conductor layer 103 and the thickness of the second surface side conductor layer 104 are substantially equal to each other. However, the thickness of the first surface side conductor layer 103 and the thickness of the second surface side conductor layer 104 may be different. Since the thickness of the first surface side conductor layer 103 is formed to be larger than the thickness of the second surface side conductor layer 104, thermal expansion in the first build-up layer 11 and the second build-up layer 12 described above is performed. It may be possible to reduce the warp of the wiring board 1 due to the difference in amount. The difference in the abundance of conductors between the first build-up layer 11 and the second build-up layer 12, that is, the difference in the abundance of conductors between the first surface 1F side and the second surface 1B side of the wiring board 1. It can be supplemented by making the thickness of the first surface side conductor layer 103 larger than the thickness of the second surface side conductor layer 104. This makes it possible to suppress the warp of the wiring board 1.

In the example shown in FIG. 1, in the first conductor layer 112 and the second conductor layer 122 located in the same order from the core substrate 10, the area of the second conductor layer 122 is larger than the area of the first conductor layer 112. Moreover, the thickness of the second conductor layer 122 is thicker than the thickness of the first conductor layer 112. However, the area of all the second conductor layers 122 is larger than the area of each of the corresponding first conductor layers 112, and the thickness of all the second conductor layers 122 is the thickness of the corresponding first conductor layer 112. It doesn't have to be thicker than each. It is sufficient that the area and thickness of a part of the second conductor layer 122 is formed larger than the area and thickness of the corresponding first conductor layer 112.

The thickness of each of the interlayer insulating layers (first interlayer insulating layer 111 and second interlayer insulating layer 121) in the first build-up layer 11 and the second build-up layer 12 is, for example, 15 μm or more and 60 μm or less. The first interlayer insulating layers 111 in the first build-up layer 11 may be formed to have the same thickness or may be formed to have different thicknesses. Similarly, each of the second interlayer insulating layers 121 in the second build-up layer 12 may be formed with the same thickness or may be formed with different thicknesses. For example, in the first interlayer insulating layer 111 and the second interlayer insulating layer 121 located in the same order from the core substrate 10, the thickness of the second interlayer insulating layer 121 is formed to be thicker than the thickness of the first interlayer insulating layer 111. May be done. Here, the interlayer insulating layers located in the same order from the core substrate 10 are the interlayer insulating layers in each build-up layer from the core substrate 10 toward the first surface 1F side or the second surface 1B side of the wiring board 1. Means the interlayer insulating layers having the same order when ordered.

In the example shown in FIG. 1, the first insulating layer 101 and the second insulating layer 102 of the core substrate 10 have substantially the same thickness, and the metal layer 100 is located at the center of the core substrate 10 in the thickness direction. Have been placed. That is, the center of the core substrate 10 in the thickness direction and the center of the metal layer 100 in the thickness direction substantially coincide with each other. Therefore, the center of the wiring board 1 in the thickness direction and the center of the metal layer 100 in the thickness direction are substantially the same. In the example shown in FIG. 1, the thickness of the first insulating layer 101 and the second insulating layer 102 can be, for example, 70 μm or more and 90 μm or less. However, the thickness of the first insulating layer 101 and the thickness of the second insulating layer 102 may be different. The center in the thickness direction of the metal layer 100 does not coincide with the center in the thickness direction of the core substrate 10, that is, the center in the thickness direction of the wiring board 1, and is biased toward the first surface 10F or the second surface 10B. You may. The warpage of the wiring board 1 described above may be suppressed more effectively. An example in which the thickness of the second insulating layer 102 is made larger than the thickness of the first insulating layer 101 from the viewpoint of suppressing the warp of the wiring board 1 will be described below with reference to FIG.

The wiring board 1a shown in FIG. 2 is different from the wiring board 1 shown in FIG. 1 in that the metal layer 100 included in the core board 10 is provided closer to the first surface 10F, and has other configurations. Is the same as that of the wiring board 1. That is, the thickness of the first insulating layer 101 on the first surface 10F side of the core substrate 10 is formed to be smaller than the thickness of the second insulating layer 102 on the second surface 10B side. By arranging the metal layer 100 closer to the first surface 10F side from the center in the thickness direction of the core substrate 10 in this way, the first surface 10F side and the second surface from the center in the thickness direction of the core substrate 10 are arranged. The difference in the abundance of the conductor on the surface 10B side can be compensated. That is, the metal layer 100 suppresses the warpage caused by the difference in the amount of thermal expansion between the first build-up layer 11 and the second build-up layer 12 by its rigidity, and also suppresses the difference in the amount of thermal expansion. Warpage can be suppressed more effectively by supplementing.

The thickness of the first insulating layer 101 may be formed to be, for example, 20 μm or more and 40 μm or less, and the thickness of the second insulating layer 102 may be formed to be, for example, 40 μm or more and 100 μm or less. The thicknesses of the first insulating layer 101 and the second insulating layer 102 can be appropriately adjusted based on the difference in the abundance of conductors between the first surface 10F side and the second surface side 10B side. That is, the metal layer 100 from the center in the thickness direction of the core substrate 10 can compensate for the difference in the abundance of conductors between the first surface 10F side and the second surface 10B side from the center of the core substrate 10. The degree of center deviation can be adjusted. The wiring board 1a shown in FIG. 2 has the same configuration as the wiring board 1 shown in FIG. 1 except that the thicknesses of the first insulating layer 101 and the second insulating layer 102 are different. A specific description of the configuration is omitted.

FIG. 3 shows an example in which the shape of the through-hole conductor 106 is different from that of the wiring board 1 shown in FIG. 1 as the wiring board 1b. The shape of the through-hole conductor 106 formed on the wiring board is appropriately selected from the viewpoint of reducing the degree of warpage of the wiring board due to the difference in the amount of thermal expansion between the first build-up layer 11 and the second build-up layer 12. Can be done. For example, as shown as a wiring board 1b in FIG. 3, a through-hole conductor 106 having a shape in which the diameter is reduced from the first surface 10F to the second surface 10B is formed, so that the first build-up layer in the wiring board is formed. The difference in the abundance of conductors between 11 and the second build-up layer 12 can be compensated.

Next, using the wiring board 1 shown in FIG. 1 as an example, a method for manufacturing the wiring board of one embodiment will be described below with reference to FIGS. 4A to 4E. First, a metal plate having a predetermined thickness, for example, copper or aluminum, is cut, and a metal plate 100P having necessary holes at a predetermined position is prepared. The surface of the metal plate 100P may be roughened in order to improve the adhesion of the resin.

Subsequently, as shown in FIG. 4A, the first prepreg 101P and the second prepreg 102P having a core material impregnated with, for example, an epoxy resin are arranged on both sides of the metal plate 100P. Further, for example, a metal foil 103P which is a copper foil is laminated on the first prepreg 101P, and a metal foil 104P which is a copper foil, for example, is laminated on the second prepreg 102P, and they are integrated by a heating press. By this integration, the resin contained in the first and second prepregs 101P and 102P is filled in the holes formed in the metal plate 100P. By integration, the metal layer 100 made of the metal plate 100P shown in FIG. 4B is sandwiched between the first insulating layer 101 and the second insulating layer 102 obtained by curing the prepregs 101P and 102P, and the starting substrate 10P is obtained. ..

The thickness of the first prepreg 101P in FIG. 4A is substantially equal to the thickness of the second prepreg 102P, and in the starting substrate 10P shown in FIG. 4B, the thickness of the first insulating layer 101 is substantially equal to the thickness of the second insulating layer 102. equal. That is, the metal layer 100 is formed at the center of the starting substrate 10P in the thickness direction. When the wiring board 1a shown in FIG. 2 is manufactured, the first and second prepregs 101P and 102P having different thicknesses are used, and the first prepreg 101P is thicker than the second prepreg 102P. The smaller one is used.

Subsequently, as shown in FIG. 4C, a through hole 105 for a through hole is formed by irradiation with a carbon dioxide gas laser beam or the like, and for example, a copper foil, a copper electroless plating film, and electrolytic plating are performed by using a subtractive method. The first surface side conductor layer 103 and the second surface side conductor layer 104, which include a film and have a desired conductor pattern, are formed on the first surface 10F side and the second surface 10B side of the core substrate 10, respectively. Further, the through-hole conductor 106 is formed by filling the through-hole through holes 105 with the electroless plating film and the electrolytic plating film. Mechanical processing such as drilling may be used to form the through hole 105 for the through hole.

The first surface side conductor layer 103 and the second surface side conductor layer 104 are simultaneously formed by the metal foils 103P and 104P and the plating film (electroless plating film and electrolytic plating film). When the first surface side conductor layer 103 is formed thicker than the second surface side conductor layer 104, it is formed on the electroless plating film for the formation of the first surface side conductor layer 103 and the second surface side conductor layer 104. When the electrolytic plating film is formed on the surface, a voltage is applied so that the current density on the first surface 10F side of the core substrate 10 is higher than the current density on the second surface 10B side. As a result, the thickness of the electrolytic plating film on the first surface 10F side is formed to be thicker than the thickness of the electrolytic plating film on the second surface 10B side, and the thickness of the first surface side conductor layer 103 is the thickness of the second surface side conductor layer 104. It can be formed larger than the thickness.

Next, as shown in FIG. 4D, the first interlayer insulating layer 111 and the second interlayer insulating layer 121 are formed. Further, the first conductor layer 112 is formed on the first interlayer insulating layer 111, and the second conductor layer 122 is formed on the second interlayer insulating layer 121 together with the formation of the first conductor layer 111. In the formation of the first conductor layer 112, the first via conductor 113 is formed in the first interlayer insulating layer 111. Further, in the formation of the second conductor layer 122, the second via conductor 123 is formed in the second interlayer insulating layer 121.

For the first and second interlayer insulating layers 111 and 121, for example, a prepreg containing a semi-cured epoxy resin and a reinforcing material such as glass fiber, or a film-shaped epoxy resin is laminated on both sides of the core substrate 10 to heat the core substrate 10. It is formed by crimping. When laminating the prepreg, a metal foil made of, for example, copper may be laminated on the prepreg and crimped together with the prepreg. After that, for example, by irradiating carbon dioxide laser light, a through hole for forming the first via conductor 113 is formed in the first interlayer insulating layer 111. Similarly, a through hole for forming the second via conductor 123 is formed in the second interlayer insulating layer 121.

Then, for example, using a semi-additive method, a metal film obtained by electroless copper plating or the like and an electrolytic plating film formed on the metal film using this metal film as a seed layer are formed, and the first and first one having a desired conductor pattern are formed. The second conductor layers 112 and 122, as well as the first via conductor 113 and the second via conductor 123 are formed. In the wiring board 1 of the example of FIG. 1, the second conductor layer 122 has a thickness larger than that of the first conductor layer 112. Therefore, when the electrolytic plating film is formed so that the thickness of the electrolytic plating film on the second surface 10B side is thicker than the thickness of the electrolytic plating film on the first surface 10F side, the second surface 10B side of the core substrate 10 is formed. The voltage is applied so that the current density of the first surface is higher than the current density on the first surface 10F side.

As shown in FIG. 4E, on the first conductor layer 112 and the second conductor layer 122, the first interlayer insulating layer 111 and the first conductor layer 112, and the second interlayer insulating layer 121 and the second conductor layer 122 are further formed. Is formed, and the first build-up layer 11 and the second build-up layer 12 are formed on the first surface 10F and the second surface 10B of the core substrate 10, respectively. A first via conductor 113 is formed on the laminated first interlayer insulating layer 111. A second via conductor 123 is formed on the laminated second interlayer insulating layer 121.

In FIG. 4E, the first and second build-up layers 11 and 12, which are composed of three interlayer insulating layers and a conductor layer, are formed on the first surface 10F side and the second surface 10B side of the core substrate 10, respectively. However, the number of layers of the interlayer insulating layer and the conductor layer in the build-up layers 11 and 12 is not limited to this example, and by repeating the above process, a build-up layer containing a larger number of layers can be obtained. It may be formed. However, regardless of the number of layers of the interlayer insulating layer and the conductor layer laminated on both sides of the core substrate 10, the formation of the conductor layer has a current density on the second surface 10B side of the core substrate 10 in the wiring board during manufacturing. It includes applying a voltage so as to be higher than the current density on the first surface 10F side. Therefore, in at least one set of conductor layers (first conductor 112 and second conductor layer 122) located in the same order as the core substrate 10, the second conductor layer 122 formed on the second surface 10B side of the core substrate 10 The thickness is formed to be larger than the thickness of the first conductor layer 112 formed on the first surface 10F side.

After that, the first solder resist layer 13 is formed on the first build-up layer 11, and the second solder resist layer 14 is formed on the second build-up layer 12. The first and second solder resist layers 13 and 14 are formed by, for example, forming a resin layer containing a photosensitive epoxy resin, a polyimide resin, or the like, exposure using a mask having an appropriate pattern, and development. ..

The connection pads 112a and 122a exposed to the openings of the first and second solder resist layers 13 and 14, respectively, may be subjected to electroless plating, solder leveler, spray coating or the like, if necessary, to Au, Ni / Au, Ni. A surface protective film (not shown) made of / Pd / Au, solder, heat-resistant preflux, or the like may be formed. By going through the above steps, the wiring board 1 of the example of FIG. 1 is completed.

The wiring board of the embodiment is not limited to the structure exemplified in each drawing and the structure, shape, and material exemplified in this specification. For example, the first and second via conductors 113, 123 and the like do not have to have a shape that reduces the diameter toward the core substrate 10 side. Further, the first and second solder resist layers 13 and 14 may not be provided.

Further, the method for manufacturing the wiring board of the embodiment is not limited to the method described above with reference to each drawing. For example, the conductor layers 103 and 104 on the first surface side and the second surface side of the core substrate 10 may be formed by using a semi-additive method using a metal foil. Each conductor layer in the first and second build-up layers 11 and 12 may be formed by using a subtractive method. The conditions and order of the manufacturing method described above can be changed as appropriate. Depending on the structure of the wiring board actually manufactured, some steps may be omitted or another step may be added.

1, 1a, 1b Wiring board 1F 1st side of wiring board 1B 2nd side of wiring board 10 core board 10F 1st side of core board 10B 2nd side of core board 11 1st build-up layer 12 2nd build-up layer 13 1st solder resist layer 14 2nd solder resist layer 100 metal layer 100P metal plate 101 1st insulating layer 101P 1st prepreg 102 2nd insulating layer 102P 2nd prepreg 103 1st surface side conductor layer 104 2nd surface side conductor layer 105 Through hole for through hole 106 Through hole conductor 111 1st interlayer insulating layer 112 1st conductor layer 113 1st via conductor 121 2nd interlayer insulating layer 122 2nd conductor layer 123 2nd via conductor

Claims (10)

A core substrate having a first surface and a second surface opposite to the first surface, and including a first surface side conductor layer constituting the first surface and a second surface side conductor layer forming the second surface. When,
A first build-up layer provided on the first surface of the core substrate and alternately laminated with a first interlayer insulating layer and a first conductor layer on the first interlayer insulating layer.
A second build-up layer provided on the second surface of the core substrate and in which a second interlayer insulating layer and a second conductor layer on the second interlayer insulating layer are alternately laminated.
It is a wiring board equipped with
In the conductor layer of the first conductor layer and the second conductor layer located in the same order as the core substrate, the area of the second conductor layer is larger than the area of the first conductor layer, and the second conductor layer is said. The thickness of the conductor layer is formed to be larger than the thickness of the first conductor layer.
The core substrate includes a first insulating layer on the first surface side, a second insulating layer on the second surface side, and a metal layer sandwiched between the first insulating layer and the second insulating layer. .. The wiring board according to claim 1, wherein the thickness of the second insulating layer is larger than the thickness of the first insulating layer. The wiring board according to claim 1, wherein the thickness of the metal layer in the core board is larger than the thickness of the second conductor layer. The wiring board according to claim 1, wherein the thickness of the first surface side conductor layer is larger than the thickness of the second surface side conductor layer. The wiring board according to claim 1, wherein a through-hole conductor penetrating the first insulating layer, the metal layer, and the second insulating layer is formed on the core substrate, and the through-hole conductor is formed. The diameter is reduced from the first surface to the second surface. The wiring board according to claim 1, wherein a plurality of connection pads connected to electronic components are formed on the outermost conductor layer of the first conductor layer, and the second conductor layer of the second conductor layer. A plurality of connection pads connected to an external electric circuit board are formed on the outermost conductor layer. It has a first surface and a second surface opposite to the first surface, and has a conductor layer on the first surface side formed on the first surface side and a second surface side formed on the second surface side. Providing a core substrate including a conductor layer and
A first build-up layer in which a first interlayer insulating layer and a first conductor layer on the first interlayer insulating layer are alternately laminated on the first surface and the second surface of the core substrate, and a first A second build-up layer in which a two-layer insulating layer and a second conductor layer on the second interlayer insulating layer are alternately laminated is provided.
It is a manufacturing method of a wiring board including
Providing the first build-up layer and the second build-up layer means that in the first conductor layer and the second conductor layer located in the same order from the core substrate, the second conductor layer is more than the first conductor layer. Including forming a large area and a large thickness of the conductor layer,
Providing the core substrate includes forming a metal layer sandwiched between the first insulating layer on the first surface side and the second insulating layer on the second surface side. The method for manufacturing a wiring board according to claim 7, wherein the metal layer is formed by forming the metal layer by the first prepreg serving as the first insulating layer and the second prepreg serving as the second insulating layer. The thickness of the second prepreg is larger than the thickness of the first prepreg. The method for manufacturing a wiring board according to claim 7, wherein the core substrate is electroplated so that the current density on the first surface side of the core substrate is higher than the current density on the second surface side. It includes forming the first surface side conductor layer and the second surface side conductor layer by performing plating. In the method for manufacturing a wiring board according to claim 7, in providing the first build-up layer and the second build-up layer, the current density on the second conductor layer side is the current on the first conductor layer side. It includes forming the thickness of the second conductor layer larger than that of the first conductor layer by performing electroplating so as to be higher than the density.

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