JP7278114B2 - Method for manufacturing printed wiring board - Google Patents

Description

The present invention relates to a method of manufacturing a printed wiring board having electronic components embedded in openings of a core substrate.

2. Description of the Related Art In response to recent demands for higher density and lower height of printed wiring boards, there has been proposed a design of a printed circuit board in which a glass substrate is coated with a resin or the like (see, for example, Patent Document 1).

In manufacturing such a printed wiring board, as shown in FIG. Then, the upper surfaces of the core substrate 52 and the electronic component 54 and the openings 53 are filled with resin to form an insulating layer 55, and as shown in FIG. As shown in FIG. 3(d), an insulating layer 56 made of resin is formed on the lower surfaces of the core substrate 52 and the electronic component 54 by combination pressing, and as shown in FIG. A wiring 57 is formed on the insulating layer 55 and a wiring 58 is normally formed on the insulating layer 56 .

Japanese Patent No. 6148764

However, since the insulating layers 55 and 56 are formed on both surfaces of the electronic component 54 and the core substrate 52, electrical continuity between the electronic component 54 and the wirings 57 and 58 is formed on the surface of the electronic component 54. It had to be done through the attached pad 59 and connection vias 60 and 61 . Therefore, there has been no technique for directly forming wiring on the electronic component 54 in a substrate process.

A method for manufacturing a printed wiring board according to the present invention is a method for manufacturing a printed wiring board having an electronic component embedded in an opening of a core substrate, wherein the electronic component is mounted in the opening of the core substrate, and the opening and the electronic component are mounted. A resin is filled between them, the surfaces of the core substrate and the electronic components are flattened, and wiring patterns are formed on the surfaces of the core substrate and the electronic components.

According to the embodiment of the present invention, the resin is filled only between the opening of the core substrate and the electronic component, and the insulating layer made of resin is not formed on the surface of each member. A wiring pattern can be formed directly on the surface of the core substrate and the electronic component. In addition, it is possible to reduce variations in the thickness of the insulating layers to be formed later on the front and back surfaces. Furthermore, when the wiring pattern is formed by the semi-additive method, a finer wiring pattern can be formed than by the subtractive method.

1 is a cross-sectional view showing a printed wiring board manufactured according to a manufacturing method of one embodiment of the present invention; FIG. 2(a) to 2(g) are cross-sectional views for explaining each step of the method for manufacturing the printed wiring board of the embodiment shown in FIG. 1. FIG. (a) to (e) are cross-sectional views for explaining each step of a conventional printed wiring board manufacturing method.

An embodiment of the printed wiring board manufacturing method according to the present invention will be described below with reference to the drawings. In the description of the drawings, the same elements are given the same reference numerals, and redundant description is omitted.

<Printed wiring board targeted by the present invention>
FIG. 1 is a cross-sectional view showing a printed wiring board according to one embodiment of the present invention. A printed wiring board 10 of this embodiment comprises a core substrate 12 and a buildup layer 14 .

The core substrate 12 is made of an insulating resin composition such as epoxy resin or BT (bismaleimide triazine) resin containing inorganic filler such as silica or alumina, and includes reinforcing material such as glass cloth. In addition, materials such as bakelite, polyimide, ceramics, and glass can also be used. A conductive circuit layer 22 is formed on each of the F surface 12F, which is the surface on the front side of the core substrate 12, and the B surface 12B, which is the surface on the back side of the core substrate 12. As shown in FIG. The conductor circuit layer 22 is made of a conductive metal such as copper. A plurality of through-hole conductors 24 are formed in the core substrate 12 . Each of the through-hole conductors 24 is made of a conductive metal such as copper, and electrically connects the conductor circuit layers 22 on the F surface 12F, which is the front surface of the core substrate 12, and the B surface 12B, which is the rear surface. are doing.

The core substrate 12 has a component housing portion 26 defining a rectangular opening in the central portion, and the component housing portion 26 is a through hole penetrating the core substrate 12 in its thickness direction. A glass substrate 28 as an electronic component is accommodated in the component accommodation section 26 . A conductive circuit layer 30 is formed on each of the F surface 28F, which is the surface on the front side of the glass substrate 28, and the B surface 28B, which is the surface on the back side of the glass substrate 28. As shown in FIG. The conductor circuit layer 30 is made of a conductive metal such as copper. The glass substrate 28 has, for example, a plurality of through holes penetrating the glass substrate 28 in its thickness direction, and a cylindrical through hole conductor 32 is formed on the inner peripheral surface of each through hole. The through-hole conductors 32 are each made of a conductive metal such as copper, and electrically connect the conductive circuit layers 30 on the F surface 28F and the B surface 28B of the glass substrate 28 to each other. A fine through-hole 34 is formed in the center of each through-hole conductor 32 .

The buildup layers 14 are formed on the F surface 12F and the B surface 12B of the core substrate 12, respectively. The buildup layer 14 is formed by alternately laminating interlayer insulating layers 36 and conductor circuit layers 38 . The interlayer insulating layer 36 is made of a resin composition such as an epoxy resin or BT (bismaleimide triazine) resin containing an inorganic filler such as silica or alumina. The interlayer insulating layer 36 preferably contains a reinforcing material such as glass cloth. Conductive circuit layer 38 is formed of a conductive metal such as copper.

The insulating resin 40 having the same composition as the insulating resin composition forming the core substrate 12 is filled in the gaps around the glass substrate 28 in the component housing portion 26 and in the through holes 34 of the through-hole conductors 32 and solidified. The insulating resin 40 fixes the glass substrate 28 at a predetermined position in the component housing section 26 and prevents the through-hole conductors 32 from corroding by blocking contact between the through-hole conductors 32 and the air. there is This insulating resin 40 preferably contains an inorganic filler such as silica or alumina.

The conductor circuit layers 38 of the buildup layers 14 on the F surface 12F and the B surface 12B of the core substrate 12 are connected to the conductor circuit layers 22 on the F surface 12F and the B surface 12B of the core substrate 12. are electrically connected to each other through via-hole conductors 42 penetrating through the interlayer insulating layer 36 . The conductor circuit layer 38 of the buildup layer 14 on the F surface 12F is also connected to the conductor circuit layer 30 on the F surface 28F of the glass substrate 28 in the component housing portion 26 of the core substrate 12, and the via hole of the buildup layer 14. They are electrically connected via a conductor 42 . The via-hole conductors 42 can be made of the same conductive metal as the conductive circuit layers 22, 30 and 38, such as copper.

According to the printed wiring board 10 of this embodiment, the pitch of a plurality of IC chips flip-chip mounted on the printed wiring board 10 of this embodiment is determined by using the glass substrate 28 built in the component housing portion 26 as an interposer, for example. can be used for electrical connection between different electrodes of the IC chip and electrode pads of the conductive circuit layer 38 of the buildup layer 14 . In addition, the same insulating resin composition that constitutes the core substrate 12 is filled only in the periphery of the glass substrate 28 built in the component housing portion 26 and in the through holes 34 of the through-hole conductors 32 of the glass substrate 28. Since the insulating resin 40 of the composition is solidified, the glass substrate 28 can be positioned and fixed with high precision in the component housing portion 26, and the through-hole conductors 32 of the conductive circuit layer 30 directly formed on both surfaces of the glass substrate 28. It is possible to improve the reliability of the electrical connection by

<Method for manufacturing printed wiring board targeted by the present invention>
Next, one embodiment of the printed wiring board manufacturing method of the present invention will be described with reference to FIGS. 2(a) to 2(g). Elements similar to those described in FIG. 1 are assigned the same reference numerals, and description thereof is omitted as appropriate.

(1) First, as the material of the core substrate 12 as shown in FIG. A copper foil-laminated one is prepared.

(2) Next, a tapered hole for forming a through hole for a through-hole conductor is formed by irradiating, for example, a carbon dioxide laser from the surface side of the insulating base material. Further, a tapered hole is formed by irradiating, for example, a carbon dioxide laser at a position directly behind the tapered hole on the front surface of the back surface of the insulating base material, and the tapered holes on the front surface and the back surface are connected to form a through hole. A core substrate 12 having through holes for conductors 24 is formed. Also, in the central portion of the core substrate 12, a component housing portion 26 as a through hole having a rectangular opening is formed by, for example, carbon dioxide laser irradiation.

(3) Next, an electroless plating process is performed to electrolessly plate the copper foil on the F surface 12F, which is the front side surface of the core substrate 12, and the B surface 12B, which is the back side surface, and the inner peripheral surface of the through hole. A film is formed. A plating resist having a predetermined pattern is formed on the electroless plating film on the copper foil, and the plating resist covers the component housing portion 26 but exposes the through-hole conductor through holes.

(4) Next, electrolytic plating is performed to fill the through holes for through-hole conductors with electrolytic plating to form through-hole conductors 24, and the electroless plating film on the copper foil is exposed from the plating resist. An electrolytic plated film is formed on the portion where the Thereafter, the plating resist is peeled off, and the electroless plating film and copper foil below the plating resist are removed. A conductive circuit layer 22 is formed on each B surface 12B. The conductor circuit layers 22 on the F surface 12F and the B surface 12B of the core substrate 12 are electrically connected to each other by through-hole conductors 24 .

(5) After that, as shown in FIG. 2(a), a tape 44 made of, for example, an adhesive tape is placed on the conductor circuit layer 22 on the side B 12B of the core substrate 12 facing downward in the figure. , is affixed so as to block the component housing portion 26 . Next, a glass substrate 28 to be incorporated in the component housing portion 26 of the printed wiring board 10 is prepared, and the glass substrate 28 is placed at a predetermined position in the component housing portion 26 by a mounter (not shown).

(6) For the glass substrate 28 as well, for example, in the same manner as the core substrate 12, conductor layers serving as conductor circuit layers 30 are formed on the F surface 28F, which is the front surface, and the B surface 28B, which is the back surface. . The conductor layers on the F surface 28F and the B surface 28B of the glass substrate 28 are electrically connected to each other by through-hole conductors 32. FIG. A fine through-hole 34 is formed at the center of each through-hole conductor 32 so as to penetrate from the F surface 28F side of the glass substrate 28 to the B surface 28B side.

(7) Next, the core substrate 12 on the tape 44 and the glass substrate 28 placed in the component housing portion 26 are separated from each other by a mask (not shown) that exposes only the component housing portion 26. is entirely covered, a molten insulating resin material having the same composition as the insulating resin composition constituting the core substrate 12 is selectively applied to the component housing portion 26 by, for example, printing or ABF lamination. It is supplied into the inside of the component housing portion 26 and filled only in the through holes 34 around the glass substrate 28 and in the center of the through hole conductors 32 . Furthermore, if the filler contained in the molten resin has a median particle diameter of 0.1 μm to 20 μm, the through hole 34 can be filled with the molten resin more reliably.

(8) After that, as shown in FIG. Positioning and fixing are performed with high accuracy, and contact between the inner peripheral surface of the through-hole 34 at the center of the through-hole conductor 32 and the air is cut off. As the resin material, in addition to ABF, a photosensitive resin can also be used.

(9) Next, as shown in FIG. 2(c), the tape 44 is peeled off from the core substrate 12 and the glass substrate 28 placed in the component housing portion 26 thereof.

(10) Next, as shown in FIG. 2(d), the conductive circuit layer 22 on the F surface 12F and the B surface 12B of the core substrate 12 and the F surface 28F and the B surface 28B of the glass substrate 28 are formed. The conductor layer is removed, for example by etching. Further, the resin protruding from the F surface 12F and the B surface 12B of the core substrate 12 and the resin protruding from the F surface 28F and the B surface 28B of the glass substrate 28 are removed by, for example, cutting or grinding, and the F surface 12F of the core substrate 12 is removed. and the F surface 28F of the glass substrate 28 are flat and flush, and the B surface 12B of the core substrate 12 and the B surface 28B of the glass substrate 28 are also flat and flush.

(11) Next, as shown in FIG. 2(e), electrolytic plating is performed on the F surface 12F and B surface 12B of the core substrate 12 and on the F surface 28F and B surface 28B of the glass substrate 28. An electroless plated film 46 is formed as a seed layer for forming a conductor circuit layer.

(12) Next, as shown in FIG. 2( f ), by a semi-additive method, on the F surface 12F and the B surface 12B of the core substrate 12 and on the F surface 28F and the B surface 28B of the glass substrate 28 . A plating resist having a predetermined pattern is formed on each of the electroless plated films 46, and then electrolytic plating is performed to form an electrolytic plated film on the portion of the electroless plated film 46 exposed from the plating resist. be. After that, the plating resist is stripped and the electroless plating film under the plating resist is removed, and the remaining electrolytic plating film and electroless plating film form conductors on the F surface 12F and the B surface 12B of the core substrate 12. The circuit layers 22 are formed respectively, and the conductor circuit layers 30 are also formed on the F surface 28F and the B surface 28B of the glass substrate 28, respectively.

(13) Next, as shown in FIG. 2(g), on the conductor circuit layer 22 on the F surface 12F side of the core substrate 12 and on the F surface 28F side of the glass substrate 28 facing upward in the figure 30, a B-stage prepreg 48 in which a reinforcing material such as glass cloth is impregnated with an insulating resin such as epoxy resin or BT resin, or an ABF 48 that does not contain glass cloth is laminated. A copper foil (not shown) is laminated on the prepreg 48 or ABF 48 that does not contain glass cloth, and then the prepreg 48 or ABF 48 that does not contain glass cloth and the copper foil thereon are hot-pressed.

(14) Next, in the same manner as above, on the conductor circuit layer 22 on the B surface 12B side of the core substrate 12 and on the conductor circuit layer 30 on the B surface 28B side of the glass substrate 28, which is directed downward in the drawing, For forming the interlayer insulating layer 36, a B-stage prepreg 48 in which a reinforcing material such as glass cloth is impregnated with an insulating resin such as epoxy resin or BT resin, or an ABF 48 that does not contain glass cloth is laminated. A copper foil (not shown) is laminated on 48 or ABF 48 without glass cloth, and then the prepreg 48 or ABF 48 without glass cloth and the copper foil thereon are hot pressed.

(15) In this manner, the resin component of the prepreg 48 is solidified by heat pressing, and the interlayer insulating layer 36 is formed on the F surface 12F of the core substrate 12 and the F surface 28F of the glass substrate 28, and the core substrate 12 is formed. After the interlayer insulating layer 36 is also formed on the B surface 12B and on the B surface 28B of the glass substrate 28, a predetermined position on the copper foil on the interlayer insulating layer 36 is irradiated with, for example, a carbon dioxide gas laser. Via holes are formed through the foil and interlayer insulating layer 36 . The via holes partially expose the conductive circuit layer 22 and the conductive circuit layer 30 .

(16) Then, on the copper foils on the interlayer insulating layers 36, openings are formed at positions where the conductor circuit layers 22 and 30 are formed in addition to the positions of the via holes by, for example, photolithography. A plating resist having

(17) Next, a metal film (not shown) is formed on the openings of the plating resist and the inner surfaces of the via holes by electroless plating, for example. The metal film may be formed by sputtering or vacuum deposition. By electroplating using this metal film as a seed layer, a plated film is formed on the via-hole conductor 42 and the copper foil. The electrolytic plating treatment is preferably electrolytic copper plating treatment. After that, the plating resist is removed by stripping.

(18) Next, a portion of the copper foil on which the plating film is not formed is removed by etching. As a result, a conductor circuit layer 38 made of copper foil and a plating film is formed on the F surface 12F and B surface 12B of the core substrate 12 and on the interlayer insulating layer 36 on the F surface 28F and B surface 28B of the glass substrate 28. . As shown in FIG. 1, the conductor circuit layer 38 on the interlayer insulating layer 36 is electrically connected to the conductor circuit layers 22 on the F surface 12F and the B surface 12B of the core substrate 12 by via-hole conductors 42. , is also electrically connected to the conductor circuit layer 30 on the F surface 28F of the glass substrate 28 in the component housing portion 26. As shown in FIG.

The present invention is not limited to the above embodiments, and various changes and modifications are possible without departing from the scope of the claims. For example, in the method of manufacturing the printed wiring board of the embodiment shown in FIG. 1 and the printed wiring board of the embodiment shown in FIGS. However, the printed wiring board of the present invention and the method for manufacturing the printed wiring board of the present invention are not limited to this, and each interlayer is provided on at least one of the front surface and the back surface of the core substrate. Two or more build-up layers having insulating layers may be provided.

10 Printed wiring board 12 Core substrate 12F Front surface (F surface)
12B back surface (B surface)
REFERENCE SIGNS LIST 14 build-up layer 22 conductor circuit layer 24 through-hole conductor 26 component accommodating portion 28 glass substrate 28F front surface (F surface)
28B back surface (B surface)
30 conductor circuit layer 32 through-hole conductor 34 through-hole 36 interlayer insulating layer 38 conductor circuit layer 40 insulating resin 42 via-hole conductor 44 tape 46 electroless plated film 48 ABF containing no prepreg or glass cloth

Claims (2)

A method for manufacturing a printed wiring board in which electronic components are embedded in openings of a core substrate,
Electronic parts are mounted in the opening of the core substrate,
Fill resin between the opening and the electronic component,
Filling the through-hole of the electronic component with the same resin at the same time as filling the opening with the resin,
Flatten the surface of the core substrate and electronic components,
A wiring pattern is formed on the surfaces of the core substrate and the electronic component. A method for manufacturing a printed wiring board according to claim 1 ,
The wiring pattern is formed by a semi-additive method.

Images