JP2020129689A - Solar cell - Google Patents

Abstract

To provide a method for manufacturing a high efficiency solar cell.SOLUTION: A manufacturing method includes to prepare a thin dielectric layer 206 and a doped polysilicon layer 250 on the reverse face of a silicon substrate 202. Subsequently, both a high quality oxide layer 212 and a doped wide bandgap semiconductor layer 260 may be formed on the back and front of the silicon substrate 202. A metallization process for plating a metal finger onto the polysilicon layer 250 doped via a contact opening may be executed next. The plated metal finger can form a first metal grid wire 290. A second metal grid wire 292 can be formed by directly plating metal to an emitter region on the reverse face of the silicon substrate 202, and thereby a contact opening for the second metal grid wire 292 is not required.SELECTED DRAWING: Figure 18

Description

Embodiments of the subject matter described herein relate generally to solar cell manufacturing. More specifically, the subject embodiments relate to thin silicon solar cells and techniques for manufacturing.

Solar cells are well known devices that convert solar radiation into electrical energy. Solar cells may be manufactured on semiconductor wafers using semiconductor process technology. The solar cell includes P-type and N-type diffusion regions. When the solar cell is exposed to solar radiation, electrons and holes are generated, and these electrons and holes move to the diffusion region, which causes a voltage difference between the diffusion regions. In backside contact solar cells, the diffusion regions and the metal contact fingers coupled to these diffusion regions are both on the backside of the solar cell. The contact fingers allow external electrical circuits to be coupled to and powered by the solar cell.

Efficiency is an important property of solar cells as it is directly related to their ability to produce electricity. Therefore, techniques that improve manufacturing processes, reduce manufacturing costs, and increase solar cell efficiency are generally desirable. Such techniques include forming polysilicon and heterojunction layers on a silicon substrate by a thermal process. With this thermal process, the present invention enables the efficiency of solar cells. These or other similar embodiments form the background of the invention.

A more complete understanding of the present subject matter may be derived by studying and referring to the Detailed Description of the Invention, and the claims, taken in conjunction with the following drawings. Like reference numbers refer to like elements throughout the drawings.

1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention. 1 is a cross-sectional view of a solar cell manufactured according to an embodiment of the present invention.

FIG. 6 is a cross-sectional view of a solar cell manufactured according to another embodiment of the present invention. FIG. 6 is a cross-sectional view of a solar cell manufactured according to another embodiment of the present invention. FIG. 6 is a cross-sectional view of a solar cell manufactured according to another embodiment of the present invention. FIG. 6 is a cross-sectional view of a solar cell manufactured according to another embodiment of the present invention. FIG. 6 is a cross-sectional view of a solar cell manufactured according to another embodiment of the present invention. FIG. 6 is a cross-sectional view of a solar cell manufactured according to another embodiment of the present invention.

The following detailed description of the invention is merely exemplary in nature and is not intended to limit the embodiments of the present subject matter or the application and uses of such embodiments. The word "exemplary" as used herein means "serving as an example, instance, or illustration." Any implementation described herein as an example is not necessarily construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or the following mode for carrying out the invention. A method of manufacturing a solar cell is disclosed. Method comprises providing a silicon substrate having a thin dielectric layer on a back surface, and providing a silicon layer deposited on the thin dielectric layer, and forming a layer of doping material on the deposited silicon layer. And forming an oxide layer on the layer of doping material, and partially removing the oxide layer, the layer of doping material and the deposited silicon layer in a cross-finger pattern, and raising the temperature. A dopant from the layer of doping material to the deposited silicon layer while at the same time growing an oxide layer and forming a doped crystallized polysilicon layer on the deposited silicon layer. Doping a dopant from a layer of doping material, depositing a doped wide bandgap semiconductor and an antireflective coating on the back surface of the solar cell, and doping a wide band on the front surface of the solar cell. Depositing the gap semiconductor and the antireflection coating.

Another method of making a solar cell is disclosed. The method comprises providing a silicon substrate having a thin dielectric layer on a back surface and a silicon layer deposited on the thin dielectric layer, and forming a layer of doping material on the deposited silicon layer. Forming an oxide layer on the layer of doping material and partially removing the oxide layer, the layer of doping material and the deposited silicon layer in an interdigitated pattern, and a textured silicon region. Etching the exposed silicon substrate to increase the temperature and transferring the dopant from the layer of doping material to the deposited silicon layer at the same time as the oxide layer is grown and doped. The deposited silicon layer with a dopant from a layer of doping material to form a polysilicon layer, and a thick first layer of doped wide bandgap amorphous silicon on the back surface of the solar cell. And coating an antireflection coating and a thin second layer of wide bandgap amorphous silicon doped on the front surface of the solar cell and an antireflection coating, where the thin layer is 10 times thicker than the thick layer. % To less than 30%.

Yet another method of making a solar cell is disclosed. The method comprises providing a silicon substrate having a thin dielectric layer on a backside surface and a doped silicon layer on the thin dielectric layer, forming an oxide layer on the doped silicon layer, and crossing the interfacial surface. Partially removing the oxide layer and the doped silicon layer in a mold pattern and growing a silicon oxide layer on the back surface of the solar cell by heating the silicon substrate in an oxygen-supplied environment. Crystallizing the silicon layer to form a doped polysilicon layer, depositing a doped wide bandgap semiconductor on the back surface of the solar cell, and forming a doped wide bandgap semiconductor on the front surface of the solar cell. Depositing a wide bandgap semiconductor doped to the substrate and an antireflection coating.

Yet another method of making a solar cell is disclosed. The method comprises providing a silicon substrate having a thin dielectric layer on a backside surface and a doped silicon layer on the thin dielectric layer, forming an oxide layer on the doped silicon layer, and crossing the interfacial surface. In the mold pattern, partially removing the oxide layer and the doped silicon layer, etching the exposed silicon substrate to form a textured silicon region, and removing the silicon in an oxygen-supplied environment. Growing a silicon oxide layer on the back surface of the solar cell by heating the substrate, crystallizing the silicon layer to form a doped polysilicon layer, and on the back surface of the solar cell. Depositing the doped wide bandgap amorphous silicon and the antireflection coating, and depositing the doped wideband gap amorphous silicon and the antireflection coating on the front surface of the solar cell.

Yet another embodiment of a method of making a solar cell is disclosed. The method comprises providing a silicon substrate having a thin dielectric layer on the backside and a doped silicon layer on the thin dielectric layer, forming an oxide layer on the doped silicon layer, and interdigitating In the pattern, the oxide layer and the doped silicon layer are partially removed, the exposed silicon substrate is etched to form a textured silicon region, and the silicon substrate is exposed to oxygen. Growing a silicon oxide layer on the back surface of the solar cell by heating the silicon layer to crystallize the silicon layer to form a doped polysilicon layer, and on the front and back surfaces of the solar cell. Simultaneously depositing a doped wide bandgap amorphous silicon and an antireflection coating, and partially removing the doped wide bandgap semiconductor and oxide layer to form a series of contact openings. And simultaneously forming a first metal grid electrically coupled to the doped polysilicon layer and a second metal grid electrically coupled to the emitter region on the back surface of the solar cell. ..

An improved technique for making solar cells is to provide a thin dielectric layer and a deposited silicon layer on the backside of a silicon substrate. Regions of doped polysilicon can be formed by migrating dopants into the deposited silicon layer or by forming the doped polysilicon regions in situ. An oxide layer and a layer of doped wide bandgap semiconductor may be formed subsequent to the front and back surfaces of the solar cell. One variation involves texturing the front and back surfaces prior to oxide formation and doped wide bandgap semiconductor formation. Contact holes may subsequently be formed through the overlying layer to expose the doped polysilicon regions. A metallization process can subsequently be performed to form contacts on the doped polysilicon layer. The second group of contacts is also formed by directly connecting the metal to the emitter region of the silicon substrate formed by the wide bandgap semiconductor layer located between the regions of doped polysilicon on the back surface of the solar cell. Can be done.

The various tasks performed in connection with the manufacturing process are illustrated in Figures 1-18. Also, some of the various tasks need not be performed in the order shown, and may be incorporated into a more comprehensive procedure, process, or manufacture with additional functionality not described in detail herein.

1-3 illustrate an embodiment of making a solar cell 100 that includes a silicon substrate 102, a thin dielectric layer 106 and a deposited silicon layer 104. In some embodiments, the silicon substrate 102 may be cleaned, polished, planarized and/or thinned or otherwise treated prior to forming the thin dielectric layer 106. The thin dielectric layer 106 and the deposited silicon layer 104 can be grown by a thermal process. A layer of doping material 108, followed by a first oxide layer 110, can be deposited on the deposited silicon layer 104 by conventional deposition processes. The layer of doping material 108 can include, but is not limited to, a doping material, that is, a dopant 109, for example, a layer of positive-type doping material such as boron or a layer of negative-type doping material such as phosphorus. The thin dielectric layer 106 and the deposited silicon layer 104 are each described as grown by a thermal process or deposited by a conventional deposition process, although any other described or listed herein. As with the forming, depositing or growing process steps, each layer or material can be formed using any suitable process. For example, the formation of chemical vapor deposition (CVD) processes, low pressure CVD (LPCVD), atmospheric pressure CVD (APCVD), plasma CVD (PECVD), thermal growth, sputtering as well as any other desired technique is described. Can be used at any location. Thus, similarly, the doping material 108 can be formed on the substrate by a deposition technique, sputtering, or a printing process such as inkjet printing or screen printing.

FIG. 4 shows the same solar cell 100 as FIGS. 1-3 after the material removal process has been performed and exposed polysilicon regions 124 have been formed. Some examples of material removal processes include mask and etch processes, laser ablation processes and other similar techniques. The exposed polysilicon regions 124 and the layer of doping material 108 can be formed in any desired shape, including an interdigitated pattern. If a masking process is used, the process can be carried out using a screen printer or an inkjet printer to apply the mask ink in a predefined cross-finger pattern. Therefore, conventional chemical wet etching techniques can be used to remove the mask ink that results in the interdigitated pattern of exposed polysilicon regions 124 and layer 108 of doping material. In at least one embodiment, some or all of the first oxide layer 110 may be removed. As shown in FIGS. 4 and 5, this removal of oxide layer 110 can be accomplished with the same etching or ablation process that removes areas of deposited silicon layer 104 and dielectric layer 106.

Referring to FIG. 5, the solar cell 100 is subjected to a second etching process, resulting in etching of the exposed polysilicon regions 124, and a first textured silicon on the back surface of the solar cell for increasing the concentration of solar radiation. A region 130 and a second textured silicon region 132 on the front surface of the solar cell may be formed. The textured surface can have a regular or irregularly shaped surface that scatters incident light and reduces the amount of light that reflects off the surface of the solar cell.

Referring to FIG. 6, the solar cell 100 can be heated 140 to move the doping material 109 from the layer 108 of doping material to the deposited silicon layer 104. The same heating 140 can also form a silicon oxide or second oxide layer 112 on the layer of doping material 108 and the first textured silicon region 130. During this process, a third oxide layer may be grown 114 on the second textured silicon region 132. Both oxide layers 112, 114 may include high quality oxide. High quality oxides are low interface state density oxides typically grown by thermal oxidation at temperatures above 900 degrees Celsius that can provide improved passivation.

Thus, referring to FIG. 7, the deposited silicon layer 104 can be doped with a doping material 109 from a layer of dopant material 108 to form a doped polysilicon layer 150. In one embodiment, the formation of the doped polysilicon layer is accomplished by growing the oxide layer while at the same time moving the dopant 109 from the layer 108 of doping material to the deposited silicon layer 104. Can be done. Doping the deposited silicon layer 104 with the dopant 109 from the layer of doping material 108 forms a doped crystallized polysilicon layer or a doped polysilicon layer 150. In one of some embodiments, the doped polysilicon layer 150 may include a layer of positively doped polysilicon if a positive doping material is used. In the illustrated embodiment, the silicon substrate 102 comprises a bulk N-type silicon substrate. In some embodiments, if a negative doping material is used, the doped polysilicon layer 150 may include a layer of negatively doped polysilicon. In one embodiment, silicon substrate 102 should include a bulk P-type silicon substrate.

Referring to FIG. 8, the doped first wide bandgap semiconductor layer 160 may be deposited on the back surface of the solar cell 100. In one embodiment, the doped first wide bandgap semiconductor layer 160 is partially conductive with a resistance of at least 10 Ω·cm. In the same embodiment, the doped first wide bandgap semiconductor layer 160 has a bandgap of greater than 1.05 electron volts (eV) and is provided by the first textured silicon region 130 and by the second oxide layer 112. It can act as a heterojunction in the area on the backside of the already coated solar cell. Examples of doped wide band gap semiconductors include silicon carbide and aluminum gallium nitride. Any other doped wide bandgap semiconductor material exhibiting the above properties and characteristics can be used as well. The doped first wide bandgap semiconductor layer 160 may be composed of a doped thick first wide bandgap amorphous silicon layer.

Referring to FIG. 9, a second doped wide bandgap semiconductor 162 may be deposited on the second textured silicon region 132 on the front surface of the solar cell 100. In one embodiment, the doped wide bandgap semiconductor layers 160, 162 on the back and front surfaces of the solar cell 100 may both include doped wide bandgap negative type semiconductors. In another embodiment, the doped second wide bandgap semiconductor 162 can be relatively thin compared to the doped thick first wide bandgap semiconductor layer. Thus, in some embodiments, the doped thin second wide bandgap semiconductor layer can include a thickness of 10% to 30% of the doped thick first wide bandgap semiconductor layer. In yet another embodiment, the doped wide bandgap semiconductor layers 160, 162 on the back and front of the solar cell are both doped wide bandgap negative semiconductors or doped wide bandgap positive semiconductors, respectively. It may include a semiconductor. Subsequently, an antireflection coating (ARC) 170 may be deposited on the doped second wide bandgap semiconductor 162 in the same process. In another embodiment, an antireflection coating 170 may be deposited on the doped first wide bandgap semiconductor 160 in the same process. In some embodiments, ARC 170 may be composed of silicon nitride.

FIG. 10 is a partial view of a doped first wide bandgap semiconductor 160, a second oxide layer 112, and a layer of doping material 108 on the back surface of a solar cell 100 to form a series of contact openings 180. Indicates removal. In one embodiment, the removal technique can be accomplished using an ablation process. One such ablation process is the laser ablation process. In another embodiment, the removal technique can be any conventional etching process, such as screen printing or inkjet printing of a mask followed by an etching process.

Referring to FIG. 11, a first metal grid or grid line 190 may be formed on the back surface of the solar cell 100. The first metal grid line 190 may be electrically coupled to the doped polysilicon 150 in the contact opening 180. In one embodiment, a first metal grid line 190 is formed in the doped first wide bandgap semiconductor 160, the second oxide layer 112, and the layer of doping material 108 through the contact opening 180, and the The positive electrical terminal of a powered external electrical circuit can be connected.

Referring to FIG. 12, a second metal grid or grid line 192 may be formed on the back surface of the solar cell 100. The second metal grid line 192 is electrically coupled to the second textured silicon region 132. In one embodiment, the second metal grid lines 192 are doped with a first wide bandgap semiconductor 160 that acts as a heterojunction in the area on the back surface of the solar cell, a second oxide layer 112, and a first textured silicon region. It can be coupled to 130 and connected to the negative electrical terminal of an external electrical circuit powered by the solar cell. In some embodiments, the formation of the metal grid lines referenced in FIGS. 11 and 12 may be performed by an electroplating process, a screen printing process, an inkjet process, a metal formed from aluminum metal nanoparticles, or any of the following. It can be performed by other metallization or metal forming process steps.

13 to 18 show another embodiment of manufacturing the solar cell 200. Unless otherwise indicated below, the numerical designations used to represent components in FIGS. 13-18 are the same as those shown in FIGS. 1-12 above except that the number of displays is increased by 100. Similar to the display of numbers used to represent features.

Referring to FIGS. 13-14, another embodiment for manufacturing the solar cell 200 forms a first oxide layer 210, a thin dielectric layer 206, a doped polysilicon layer 250 on a silicon substrate 202. Can include doing. The silicon substrate 202 can be cleaned, polished, planarized and/or thinned or otherwise processed prior to the formation of the thin dielectric layer 206, as previously described. The first oxide layer 210, the dielectric layer 206 and the doped polysilicon layer 250 can be grown by a thermal process. In one embodiment, the doped silicon layer is crystallized and doped by growing the silicon oxide layer or oxide layer 210 on the back surface of the solar cell by heating the silicon substrate 202 in an oxygenated environment. Forming a polysilicon layer 250. In another embodiment, growing the doped polysilicon layer 250 on the dielectric layer 206 includes growing positively doped polysilicon, the positively doped polysilicon being a boron dopant or the like. Of doping material 209. In another embodiment, negatively doped polysilicon can be used. The thin dielectric layer 206 and the doped polysilicon layer 250 are each described as being grown by a thermal process or deposited by a conventional deposition process, as described above or listed herein. Each layer or material can be formed using any suitable process, as well as any other forming, depositing, or growing process steps involving.

The solar cell 200 is further processed by partially removing the first oxide layer 210, the doped polysilicon layer 250 and the dielectric layer 206, and using a conventional masking and etching process, an interdigitated pattern. The exposed area 220 of the silicon substrate can be exposed. If conventional masking and etching processes are used, an ablation process can be used. If an ablation process is used, the first oxide layer 210 may be left partially intact on the doped polysilicon layer 250, as shown in FIG. In another embodiment, screen printing or inkjet printing techniques combined with an etching process may be used. In such an embodiment, the first oxide layer 210 may be etched away from the doped polysilicon layer 250.

Referring to FIG. 15, the exposed silicon substrate 220 and the exposed area on the front surface of the solar cell 200 are simultaneously etched to form a first textured silicon surface 230 and a second textured surface for increasing the concentration of solar radiation. A silicon surface 232 can be formed.

Referring to FIG. 16, the solar cell 200 may be heated 240 to a temperature above 900 degrees Celsius while forming the second oxide layer 212 on the back surface and the third oxide layer 214 on the front surface of the solar cell 200. In another embodiment, both oxide layers 212, 214 can include a high quality oxide, as described above.

Referring to FIG. 17, the doped first wide bandgap semiconductor layer 260 may be simultaneously deposited on the back surface and the front surface of the solar cell. The doped first wide bandgap semiconductor layer 260 may have a resistance greater than 10 Ω·cm and be partially conductive. The doped first wide bandgap semiconductor layer 260 may also have a bandgap greater than 1.05 eV. In addition, the first wide bandgap semiconductor layer can act as a heterojunction in the area on the back surface of the solar cell that covers the first textured silicon region 230 and the second oxide layer 212.

The doped first wide band gap semiconductor layer 260 may be 10% to 30% thicker than the doped second wide band gap semiconductor layer 262. In other embodiments, the thickness can be varied by less than 10% or more than 30% without departing from the techniques described herein. Both doped wide band gap semiconductor layers 260, 262 can be positively doped semiconductors. Note that in other embodiments with different substrates and polysilicon doped polarities, negatively doped wide bandgap semiconductor layers can be used as well. Subsequently, an antireflection coating (ARC) 270 may be deposited on the doped second wide bandgap semiconductor 262. In one embodiment, antireflective coating 270 can be composed of silicon nitride. In some embodiments, ARC may also be deposited on the doped first wide bandgap semiconductor layer 260.

Referring to FIG. 18, the doped first wide bandgap semiconductor layer 260 and the second oxide layer 212 are partially removed on the doped polysilicon layer 250. Referring to FIGS. A series of contact openings similar to those described above can be formed with similar molding techniques. Subsequently, a first metal grid line 290 may be formed on the back surface of the solar cell 200, and the first metal grid line 290 may be electrically coupled to the doped polysilicon 250 in the contact opening. it can. A second metal grid line 292 can be formed on the back surface of the solar cell 200 and electrically couples the second metal grid line 292 to the first textured silicon region or N-type emitter region 230. In one embodiment, both the first and second metal grid lines can be formed at the same time. Additional contacts may then be made to the first and second metal grid lines 290, 292 by other components of the energy system that incorporate the solar cell 200.

Although at least one exemplary embodiment has been presented in a form for carrying out the invention described above, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary embodiments described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. Rather, the above-described modes for carrying out the invention provide those skilled in the art with convenient guidance for practicing the described embodiments. Various variations in the function and arrangement of elements may be made at the time this patent application is filed, including known and foreseeable equivalents, without departing from the scope defined by the claims. It should be understood that changes can be implemented.
(Item 1)
A method of manufacturing a solar cell including a silicon substrate, the silicon substrate having a front surface facing the sun during normal operation and a back surface opposite to the front surface,
The above method
Providing a silicon substrate having a thin dielectric layer on the backside and a silicon layer deposited on the thin dielectric layer;
Forming a layer of doping material on the deposited silicon layer;
Forming an oxide layer on the layer of doping material;
Partially removing the oxide layer, the layer of doping material and the deposited silicon layer in an interdigitated pattern;
Increasing the temperature and moving the dopant from the layer of the doping material to the deposited silicon layer while at the same time growing an oxide layer;
Doping the deposited silicon layer with a dopant from a layer of the doping material to form a doped crystallized polysilicon layer;
Depositing a doped wide bandgap semiconductor and an antireflection coating on the back surface of the solar cell;
Depositing a doped wide bandgap semiconductor and an antireflection coating on the front surface of the solar cell.
(Item 2)
The method of claim 1, wherein providing the silicon substrate comprises providing a silicon substrate of N-type bulk silicon.
(Item 3)
The method of claim 1, wherein providing the silicon substrate comprises providing a silicon substrate of P-type bulk silicon.
(Item 4)
The method of claim 1, wherein forming a layer of doping material on the deposited silicon layer comprises forming a layer of positive doping material on the deposited silicon layer.
(Item 5)
The method of claim 1, wherein forming a layer of doping material on the deposited silicon layer comprises forming a layer of negative-type doping material on the deposited silicon layer.
(Item 6)
The method of claim 1, wherein depositing the doped wide band gap semiconductor comprises depositing a doped wide band gap amorphous silicon.
(Item 7)
The method of claim 1, wherein depositing the doped wide bandgap semiconductor comprises depositing a semiconductor having a bandgap greater than 1.05 electron volts.
(Item 8)
Partially removing the oxide layer, the layer of doping material and the deposited silicon layer in an interdigitated pattern is the oxide layer, the layer of doping material and the deposited silicon layer. The method of claim 1, comprising using an etching process to remove the.
(Item 9)
The partial removal of the oxide layer, the layer of doping material and the deposited silicon layer in the interdigitated pattern is performed by the oxide layer, the layer of doping material and the deposited silicon. The method of paragraph 1, comprising using an ablation process to remove the layer.
(Item 10)
The method of claim 1, wherein depositing an antireflective coating on the front surface of the solar cell comprises depositing silicon nitride.
(Item 11)
A method of manufacturing a solar cell comprising a silicon substrate, wherein the silicon substrate has a front surface facing the sun during normal operation and a back surface opposite to the front surface,
The above method
Providing a silicon substrate having a thin dielectric layer on the backside and a doped silicon layer on the thin dielectric layer;
Forming an oxide layer on the doped silicon layer;
Partially removing the oxide layer and the doped silicon layer in an interdigitated pattern;
Etching the exposed silicon substrate to form a textured silicon region;
Growing a silicon oxide layer on the back surface of the solar cell by heating the silicon substrate in an oxygen-supplied environment, crystallizing the doped silicon layer to form a doped poly Forming a silicon layer,
Simultaneously depositing a doped wide bandgap amorphous silicon and an antireflection coating on the front surface and the back surface of the solar cell;
Partially removing the antireflective coating, the doped wide bandgap amorphous silicon and the oxide layer to form a series of contact openings;
Simultaneously forming a first metal grid electrically coupled to the doped polysilicon and a second metal grid electrically coupled to a portion of the interdigital pattern on the back surface of the solar cell. And including methods.
(Item 12)
The method of claim 11, wherein the doped polysilicon layer comprises a layer of negatively doped polysilicon.
(Item 13)
The method of claim 11, wherein the doped polysilicon layer comprises a layer of positively doped polysilicon.
(Item 14)
12. The method of item 11, wherein depositing an antireflection coating on the front and back surfaces of the solar cell comprises depositing silicon nitride on the back and front surfaces of the solar cell.
(Item 15)
A method of manufacturing a solar cell comprising a silicon substrate, wherein the silicon substrate has a front surface facing the sun during normal operation and a back surface opposite to the front surface,
The above method
Providing a silicon substrate having a thin dielectric layer on the backside and a doped silicon layer on the thin dielectric layer;
Forming an oxide layer on the doped silicon layer;
Partially removing the oxide layer and the doped silicon layer in an interdigitated pattern;
Etching the exposed silicon substrate to form a textured silicon region;
Heating the silicon substrate in an oxygen-supplied environment to grow a silicon oxide layer on the back surface of the solar cell, crystallizing the silicon layer to form a doped polysilicon layer. Forming,
Depositing a doped wide bandgap amorphous silicon and an antireflection coating on the backside of the solar cell;
Depositing a doped wide bandgap amorphous silicon and an antireflection coating on the front surface of the solar cell.
(Item 16)
16. The method of item 15, wherein the doped polysilicon layer comprises phosphorus.
(Item 17)
16. The method of item 15, wherein the doped polysilicon layer comprises boron.
(Item 18)
A method of manufacturing a solar cell comprising a silicon substrate, wherein the silicon substrate has a front surface facing the sun during normal operation and a back surface opposite to the front surface,
The above method
Providing a silicon substrate having a thin dielectric layer on the backside and a doped silicon layer on the thin dielectric layer;
Forming an oxide layer on the doped silicon layer;
Partially removing the oxide layer and the doped silicon layer in an interdigitated pattern;
Heating the silicon substrate in an oxygen-supplied environment to grow a silicon oxide layer on the back surface of the solar cell, crystallizing the silicon layer to form a doped polysilicon layer. Forming,
Depositing a doped wide bandgap semiconductor on the backside of the solar cell;
Depositing a doped wide bandgap semiconductor and an antireflection coating on the front surface of the solar cell.
(Item 19)
19. The method of item 18, wherein providing the silicon substrate comprises providing a silicon substrate of N-type bulk silicon.
(Item 20)
19. The method of item 18, wherein providing the silicon substrate comprises providing a silicon substrate of P-type bulk silicon.

Claims (9)

A method of manufacturing a solar cell including a silicon substrate, the silicon substrate having a front surface facing the sun during normal operation and a back surface opposite to the front surface,
The method is
Forming an oxide layer on the doped silicon layer formed on the thin dielectric layer;
Partially removing the oxide layer and the doped silicon layer in an interdigitated pattern;
Growing a silicon oxide layer on the back surface of the solar cell by heating the silicon substrate in an oxygen-supplied environment, the silicon layer forming a doped polysilicon layer. Is crystallized,
Depositing a semiconductor layer on the back surface of the solar cell;
Depositing a semiconductor layer and an antireflection coating on the front surface of the solar cell. The method of claim 1, wherein depositing the semiconductor layer comprises depositing a doped wide bandgap semiconductor. The method of claim 2, wherein depositing the doped wide band gap semiconductor comprises depositing a doped wide band gap amorphous silicon. The method of claim 2 or 3, wherein depositing the doped wide bandgap semiconductor comprises depositing a semiconductor having a bandgap greater than 1.05 electron volts. 5. Depositing the doped wide bandgap semiconductor comprises depositing a partially conductive doped wide bandgap semiconductor having a resistance greater than 10 Ω·cm. The method according to any one of 1. Depositing the doped wide band gap semiconductor,
Coating a thick layer of doped wide bandgap amorphous silicon and an antireflection coating on the back surface of the solar cell;
Coating a thin layer of doped wide bandgap amorphous silicon and an antireflection coating on the front surface of the solar cell;
The method according to any one of claims 2 to 5, wherein the thin layer is less than 30% of the thickness of the thick layer. 7. The method of claim 6, wherein the thin layer is 10% of the thickness of the thick layer. Partially removing the antireflective coating, the semiconductor layer and the oxide layer to form a series of contact openings;
Forming a first metal grid electrically coupled to the doped polysilicon layer and a second metal grid electrically coupled to a portion of the interdigital pattern on the back surface of the solar cell. The method according to any one of claims 1 to 7, further comprising: Partially removing the oxide layer and the doped silicon layer in an interdigitated pattern to expose exposed regions of the silicon substrate, the oxide layer and the doped silicon layer. 9. The method of any one of claims 1-8, comprising using an ablation process to remove the.