JP2020123723A - スペーサーシステムの製造方法、スペーサーシステム、スペーサーシステムとチップの使用 - Google Patents
スペーサーシステムの製造方法、スペーサーシステム、スペーサーシステムとチップの使用 Download PDFInfo
- Publication number
- JP2020123723A JP2020123723A JP2020012668A JP2020012668A JP2020123723A JP 2020123723 A JP2020123723 A JP 2020123723A JP 2020012668 A JP2020012668 A JP 2020012668A JP 2020012668 A JP2020012668 A JP 2020012668A JP 2020123723 A JP2020123723 A JP 2020123723A
- Authority
- JP
- Japan
- Prior art keywords
- spacer system
- paste
- contact surface
- metal element
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/271—Manufacture and pre-treatment of the layer connector preform
- H01L2224/2711—Shaping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/271—Manufacture and pre-treatment of the layer connector preform
- H01L2224/2712—Applying permanent coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
- H01L2224/27312—Continuous flow, e.g. using a microsyringe, a pump, a nozzle or extrusion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
- H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29083—Three-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
- H01L2224/29084—Four-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/3301—Structure
- H01L2224/3303—Layer connectors having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/83122—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors by detecting inherent features of, or outside, the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83905—Combinations of bonding methods provided for in at least two different groups from H01L2224/838 - H01L2224/83904
- H01L2224/83907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
Abstract
Description
− 銅を含む導電性金属要素の提供するステップであって、金属要素には、互いに反対側に形成された2つの接触面がある、ステップと、
− 金属要素を構造化するステップであって、少なくとも1つの第1の接触面に窪みが形成される、ステップと、
− 少なくとも第1の接触面に、好適には接触する両側に、焼結ペーストを塗布するステップであって、第1の接触面の窪みは、少なくとも部分的に焼結ペーストで満たされている、ステップと、
− 焼結ペーストを乾燥するステップであって、塗布された焼結ペーストの材料の厚さが減少する、ステップと、
を含む、少なくとも1つのチップを基板と接触させるためのスペーサーシステムを製造する方法を示すという考えに基づいている。
− 基材を提供するステップと、
− 導電性金属要素を、乾燥した焼結ペーストと、必要に応じて形成された予備定着剤と一緒に、一時的なキャリアから取り外すステップと、
− 導電性金属要素を、乾燥した焼結ペーストおよびオプションで形成された予備定着剤とともに、第2の接触面が基板に面するように基板に付けるステップと、
− 少なくとも1つのチップを少なくとも1つのキャビティに配置するステップと、−スペーサーシステムをチップと基板で焼結するステップ。
Claims (14)
- 銅を含む、導電性金属要素(10、10')を供給するステップであって、該金属要素(10、10')は、互いに反対側に形成された2つの接触面(11、12)有する、ステップと、
前記金属要素(10、10')を構造化するステップであって、少なくとも1つの第1接触面(11)に、窪み(15)が形成される、ステップと、
前記少なくとも1つの第1接触面(11)に焼結ペースト(sinter paste)(30)を塗布するステップであって、好適には、接触する両側(11、12)に塗布し、該第1接触面(11)の前記窪み(15)は、少なくとも部分的に焼結ペースト(30)で満たされている、ステップと、
前記焼結ペースト(30)を乾燥するステップであって、前記塗布された焼結ペースト(30)の材料の厚さが減少する、ステップと、
のステップで構成される、少なくとも1つのチップ(90)を基板(70)と接触させるためのスペーサーシステム(100、110)の製造の方法。 - 焼結ペースト(30)を塗布する前に、前記構造化された金属要素(10、10')は金属化され、特に亜鉛メッキされることを特徴とする、請求項1に記載の方法。
- 一時的な予備定着剤(31)は、少なくとも部分的に接触面(11、12)、特に前記第2接触面(12)に塗布される、ことを特徴とする、請求項1または2に記載の方法。
- 前記金属要素(10、10')は、乾燥焼結ペースト(35)を含み、一時的キャリア(45)に塗布されることを特徴とする、請求項1ないし3のいずれか1項に記載の方法。
- 前記金属要素(10、10')は、前記第2接触面(12)が前記一時的キャリア(45)に面するように、前記一時的キャリア(45)に塗布されることを特徴とする、請求項4に記載の方法。
- 少なくとも1つのチップ(90)を基板(70)と接触させるための、特に、請求項1−5のいずれか1項に記載の方法に基づいて製造されるスペーサーシステム(100、110)であって、
銅と、互いに反対側に形成された2つの接触面(11、12)とを備える導電性金属要素(10、10')を備え、
少なくとも1つの第1接触面(11)に窪み(15)が形成され、乾燥焼結ペースト(35)が、第1接触面(11)、好適には、接触する両側(11、12)に形成され、
前記窪み(15)は、前記乾燥焼結ペースト(35)を含む前記窪み(15)がキャビティ(40)を形成するように、乾燥焼結ペースト(35)で部分的に満たされており、
前記スペーサーシステム(100、110)は、好適には、一時的キャリア(45)に適用される、
スペーサーシステム(100、110)。 - 前記導電性金属要素(10、10')は、
銅または銅合金を含む少なくとも1つの層を含む、および/または、
モリブデン−銅材料(MoCu)および/または
タングステン−銅材料(WCu)および/または
銅−モリブデン−銅複合材料(CuMoCu)
であることを特徴とする、
請求項6に記載のスペーサーシステム(100、110)。 - 前記乾燥焼結ペースト(35)は銀の焼結ペーストであることを特徴とする、請求項6または7に記載のスペーサーシステム(100、110)。
- 一時的予備定着剤(31)は、前記第2の接触面(12)に、特に接着点の形で、少なくとも部分的に形成されることを特徴とする、請求項6ないし8のいずれか1項に記載のスペーサーシステム(100、110)。
- 前記一時的予備定着剤(31)は、前記第2接触面(12)上の前記乾燥焼結ペースト(35)の前記側面に形成され、好適には、前記焼結ペースト(35)よりも大きい材料厚さを有する、ことを特徴とする、請求項9に記載のスペーサーシステム(100、110)。
- 前記少なくとも1つのキャビティ(40)は、乾燥した焼結ペースト部分(35)および前記金属要素(10、10')の内側側縁部(41)によって形成されることを特徴とする、請求項6ないし10のいずれか1項に記載のスペーサーシステム(100、110)。
- 基材(70)を提供するステップと、
任意選択的に、乾燥焼結ペースト(35)および任意選択的に、一時的キャリア(45)から形成された予備定着剤(31)と一緒に、導電性金属要素(10、10')を取り外すステップと、
前記導電性金属要素(10、10')を、前記乾燥焼結ペースト(35)および任意選択的に形成された予備定着剤(31)とともに、前記第2の接触面(12)が前記基板(70)に面して配置されるように、前記基板(70)上に塗布するステップと、
前記少なくとも1つのチップ(90)を前記少なくとも1つのキャビティ(15)に配置するステップと、
前記スペーサーシステム(100、110)を、前記チップ(90)および前記基板(70)とともに焼結するステップと
を含む、少なくとも1つのチップ(90)を基板(70)と接触させるための、請求項6ないし11のいずれか1項に記載のスペーサーシステム(100、110)の使用。 - 第2のスペーサーシステム(110)が、第1のスペーサーシステム(100)に接続されたチップ(90)に付けられ、前記チップ(90)とともに焼結されることを特徴とする、請求項12に記載の使用。
- 請求項6ないし11のいずれか1項に記載の、少なくとも1つのスペーサーシステム(100、110)に接続されたチップ(90)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP19154256.2A EP3690936A1 (de) | 2019-01-29 | 2019-01-29 | Verfahren zum herstellen eines spacer-systems mit chipvertiefung, entsprechendes spacer-system und dessen verwendung zur kontaktierung eines chips mit einem substrat mittels sintern |
EP19154256.2 | 2019-01-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2020123723A true JP2020123723A (ja) | 2020-08-13 |
JP7049376B2 JP7049376B2 (ja) | 2022-04-06 |
Family
ID=65268747
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020012668A Active JP7049376B2 (ja) | 2019-01-29 | 2020-01-29 | スペーサーシステムの製造方法、スペーサーシステム、スペーサーシステムとチップの使用 |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP3690936A1 (ja) |
JP (1) | JP7049376B2 (ja) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005072456A (ja) * | 2003-08-27 | 2005-03-17 | Kyocera Corp | 電気素子モジュール |
WO2013045345A2 (de) * | 2011-09-30 | 2013-04-04 | Robert Bosch Gmbh | Schichtverbund zum verbinden von elektronischen bauteilen umfassend eine ausgleichsschicht, anbindungsschichten und verbindungsschichten |
JP2016197723A (ja) * | 2015-04-02 | 2016-11-24 | ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー | 基板構造を製造する方法、基板構造、電子部品を基板構造と結合する方法、および電子部品 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006202938A (ja) * | 2005-01-20 | 2006-08-03 | Kojiro Kobayashi | 半導体装置及びその製造方法 |
JP2009164208A (ja) * | 2007-12-28 | 2009-07-23 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
DE102011005322B4 (de) * | 2011-03-10 | 2017-04-06 | Semikron Elektronik Gmbh & Co. Kg | Verfahren zur Herstellung eines Leistungshalbleitersubstrates |
DE102014114982B4 (de) * | 2014-10-15 | 2023-01-26 | Infineon Technologies Ag | Verfahren zum Bilden einer Chip-Baugruppe |
EP3086361A3 (de) * | 2015-04-02 | 2017-01-25 | Heraeus Deutschland GmbH & Co. KG | Verfahren zum herstellen einer substratanordnung mit einem vorfixiermittel, entsprechende substratanordnung, verfahren zum verbinden eines elektronikbauteils mit einer substratanordnung mit anwendung eines auf dem elektronikbauteil und/oder der substratanordnung aufgebrachten vorfixiermittels und mit einer substratanordnung verbundenes elektronikbauteil |
-
2019
- 2019-01-29 EP EP19154256.2A patent/EP3690936A1/de active Pending
-
2020
- 2020-01-29 JP JP2020012668A patent/JP7049376B2/ja active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005072456A (ja) * | 2003-08-27 | 2005-03-17 | Kyocera Corp | 電気素子モジュール |
WO2013045345A2 (de) * | 2011-09-30 | 2013-04-04 | Robert Bosch Gmbh | Schichtverbund zum verbinden von elektronischen bauteilen umfassend eine ausgleichsschicht, anbindungsschichten und verbindungsschichten |
JP2016197723A (ja) * | 2015-04-02 | 2016-11-24 | ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー | 基板構造を製造する方法、基板構造、電子部品を基板構造と結合する方法、および電子部品 |
Also Published As
Publication number | Publication date |
---|---|
EP3690936A1 (de) | 2020-08-05 |
JP7049376B2 (ja) | 2022-04-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7495179B2 (en) | Components with posts and pads | |
US10529638B2 (en) | Molded air cavity packages and methods for the production thereof | |
US20070246808A1 (en) | Power semiconductor module having surface-mountable flat external contacts and method for producing the same | |
CN102132403B (zh) | 模制超薄半导体管芯封装和使用该封装的系统及其制造方法 | |
US20030001289A1 (en) | Resin-sealed semiconductor device and manufacturing method thereof | |
US20020105073A1 (en) | Low cost and compliant microelectronic packages for high i/o and fine pitch | |
JP3744927B2 (ja) | カプセル化電子部品、特に集積回路の製造方法 | |
WO2006004672A1 (en) | Components with posts and pads | |
JP2003170465A (ja) | 半導体パッケージの製造方法およびそのための封止金型 | |
JP7233304B2 (ja) | 発光装置、および、その製造方法 | |
JP7049376B2 (ja) | スペーサーシステムの製造方法、スペーサーシステム、スペーサーシステムとチップの使用 | |
JP2011054889A (ja) | 樹脂封止型半導体装置およびその製造方法 | |
US9559078B2 (en) | Electronic component | |
JP4458260B2 (ja) | 中空パッケージの製造方法及び半導体パッケージの製造方法 | |
JP2011040640A (ja) | 半導体装置の製造方法 | |
KR101297662B1 (ko) | 리드프레임의 제조방법 | |
JP2000164934A (ja) | 面実装型led装置およびその製造方法 | |
CN116978795A (zh) | 扇出型封装体的制备方法 | |
JP3956530B2 (ja) | 集積回路の製造方法 | |
JP2022086084A (ja) | 電子回路装置の製造方法 | |
CN111952265A (zh) | 包括锁定凹陷的夹具 | |
CN117080092A (zh) | 扇出型封装体的制备方法 | |
CN110828386A (zh) | 包括凹陷的半导体器件及其制作方法 | |
JPH07326850A (ja) | 半導体素子の封止構造及び半導体素子の封止方法 | |
JP2002134646A (ja) | 配線基板の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200522 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20200522 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20210625 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210803 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20211022 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20220308 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20220325 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7049376 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |