JP2020107815A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP2020107815A JP2020107815A JP2018247547A JP2018247547A JP2020107815A JP 2020107815 A JP2020107815 A JP 2020107815A JP 2018247547 A JP2018247547 A JP 2018247547A JP 2018247547 A JP2018247547 A JP 2018247547A JP 2020107815 A JP2020107815 A JP 2020107815A
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- Prior art keywords
- semiconductor device
- lead
- lead portion
- insulating film
- conductor
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 title claims abstract description 6
- 239000004020 conductor Substances 0.000 claims abstract description 38
- 239000011347 resin Substances 0.000 claims abstract description 36
- 229920005989 resin Polymers 0.000 claims abstract description 36
- 238000000465 moulding Methods 0.000 claims description 6
- 238000009413 insulation Methods 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 description 11
- 230000017525 heat dissipation Effects 0.000 description 6
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
Claims (4)
- リード部の表面側にモールド樹脂部が突出している半導体装置において、
前記リード部は、前記モールド樹脂部の内部から外部へ突出する第1のリード部と、該第1のリード部に接続する第2のリード部とからなり、
該第2のリード部は、絶縁フィルムの一端から他端に延出するフレキシブルな導線からなり、該導線は、一端が前記第1のリード部の各リードと接続し、他端が前記絶縁フィルムの他端側に延出していることと、
前記モールド樹脂部の突出する表面は、前記絶縁フィルムの裏面側に突出していることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記第1のリード部の隣接するリード間に前記モールド樹脂が配置されていることを特徴とする半導体装置。 - リード部の表面側にモールド樹脂が突出している半導体装置の製造方法において、
前記モールド樹脂の内部から外部へ突出する第1のリード部を備えた半導体装置を用意する工程と、
一端から他端側に延出する導線が形成された絶縁フィルムからなる第2のリード部を用意する工程と、
前記モールド樹脂部の突出する表面を前記絶縁フィルムの裏面側に突出させた状態で、前記第2のリード部の前記導体の前記一端を前記第1のリード部の各リードに接続する工程と、を備えていることを特徴とする半導体装置の製造方法。 - 請求項3記載の半導体装置の製造方法において、
前記半導体装置として、前記リード部の隣接する前記リード間に前記モールド樹脂が配置されている半導体装置を用意する工程を含むことを特徴とする半導体装置の製造方法。
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JP2018247547A JP2020107815A (ja) | 2018-12-28 | 2018-12-28 | 半導体装置およびその製造方法 |
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JP2018247547A JP2020107815A (ja) | 2018-12-28 | 2018-12-28 | 半導体装置およびその製造方法 |
Publications (1)
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JP2020107815A true JP2020107815A (ja) | 2020-07-09 |
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JP2018247547A Pending JP2020107815A (ja) | 2018-12-28 | 2018-12-28 | 半導体装置およびその製造方法 |
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5198072U (ja) * | 1975-01-31 | 1976-08-06 | ||
JPH04348049A (ja) * | 1990-06-07 | 1992-12-03 | Casio Comput Co Ltd | Icモジュールの接続方法 |
JPH0653289A (ja) * | 1992-07-27 | 1994-02-25 | Nippon Telegr & Teleph Corp <Ntt> | フレキシブル配線板 |
JP2015222795A (ja) * | 2014-05-23 | 2015-12-10 | 新日本無線株式会社 | 放熱板を備えた電子部品の実装構造 |
JP2018014437A (ja) * | 2016-07-21 | 2018-01-25 | キヤノン株式会社 | 部品の実装方法及び電子モジュール |
JP2018195720A (ja) * | 2017-05-18 | 2018-12-06 | 新日本無線株式会社 | 半導体装置の製造方法 |
-
2018
- 2018-12-28 JP JP2018247547A patent/JP2020107815A/ja active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5198072U (ja) * | 1975-01-31 | 1976-08-06 | ||
JPH04348049A (ja) * | 1990-06-07 | 1992-12-03 | Casio Comput Co Ltd | Icモジュールの接続方法 |
JPH0653289A (ja) * | 1992-07-27 | 1994-02-25 | Nippon Telegr & Teleph Corp <Ntt> | フレキシブル配線板 |
JP2015222795A (ja) * | 2014-05-23 | 2015-12-10 | 新日本無線株式会社 | 放熱板を備えた電子部品の実装構造 |
JP2018014437A (ja) * | 2016-07-21 | 2018-01-25 | キヤノン株式会社 | 部品の実装方法及び電子モジュール |
JP2018195720A (ja) * | 2017-05-18 | 2018-12-06 | 新日本無線株式会社 | 半導体装置の製造方法 |
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