JP2020013990A - 高歩留まりの印刷された電子デバイス用の保護層 - Google Patents
高歩留まりの印刷された電子デバイス用の保護層 Download PDFInfo
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- JP2020013990A JP2020013990A JP2019115179A JP2019115179A JP2020013990A JP 2020013990 A JP2020013990 A JP 2020013990A JP 2019115179 A JP2019115179 A JP 2019115179A JP 2019115179 A JP2019115179 A JP 2019115179A JP 2020013990 A JP2020013990 A JP 2020013990A
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- acrylate monomer
- acrylate
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- 239000013013 elastic material Substances 0.000 description 1
- ORBFAMHUKZLWSD-UHFFFAOYSA-N ethyl 2-(dimethylamino)benzoate Chemical compound CCOC(=O)C1=CC=CC=C1N(C)C ORBFAMHUKZLWSD-UHFFFAOYSA-N 0.000 description 1
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- HCWCAKKEBCNQJP-UHFFFAOYSA-N magnesium orthosilicate Chemical compound [Mg+2].[Mg+2].[O-][Si]([O-])([O-])[O-] HCWCAKKEBCNQJP-UHFFFAOYSA-N 0.000 description 1
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- FZUGPQWGEGAKET-UHFFFAOYSA-N parbenate Chemical compound CCOC(=O)C1=CC=C(N(C)C)C=C1 FZUGPQWGEGAKET-UHFFFAOYSA-N 0.000 description 1
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- KUAZQDVKQLNFPE-UHFFFAOYSA-N thiram Chemical compound CN(C)C(=S)SSC(=S)N(C)C KUAZQDVKQLNFPE-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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Abstract
Description
Claims (20)
- あるパターンで配置された複数のコンタクトパッドと、
別のパターンで配置された複数の電極トレースであって、一組の下部電極トレースおよび一組の上部電極トレースを含み、各電極トレースが、前記複数のコンタクトパッドのうちの関連付けられたコンタクトパッドと電気的に連絡する、複数の電極トレースと、
複数のメモリセルであって、各メモリセルが、前記複数の電極トレースのうちの一対の電極トレースの交差部に位置し、前記下部電極トレースのうちの1つの領域から形成される下部電極層、前記上部電極トレースのうちの1つの領域から形成される上部電極層、および前記下部電極層と前記上部電極層との間の強誘電体層を含む、複数のメモリセルと、
前記複数の電極トレースを覆う保護層であって、アミン変性ポリエステル(メタ)アクリレート、(メタ)アクリル化アミンオリゴマー、(メタ)アクリレートモノマー、粘土鉱物、および光開始剤を含む硬化性組成物から形成された、保護層と、を備える、印刷された電子デバイス。 - 前記(メタ)アクリレートモノマーは、1つ以上の環式基を含む、請求項1に記載のデバイス。
- 前記硬化性組成物は、単官能(メタ)アクリレートモノマー、二官能(メタ)アクリレートモノマー、および三官能(メタ)アクリレートモノマーを含む、請求項1に記載のデバイス。
- 前記単官能(メタ)アクリレートモノマーは、1つ以上の環式基を含む、請求項3に記載のデバイス。
- 前記硬化性組成物は、25%〜45%の前記アミン変性ポリエステル(メタ)アクリレート、0.5%〜7%の前記(メタ)アクリル化アミンオリゴマー、20%〜50%の前記(メタ)アクリレートモノマー、15%〜35%の前記粘土鉱物、および5%〜15%の前記光開始剤を含む、請求項1に記載のデバイス。
- 前記(メタ)アクリレートモノマーは、単官能(メタ)アクリレートモノマー、二官能(メタ)アクリレートモノマー、および三官能(メタ)アクリレートモノマーの組み合わせである、請求項5に記載のデバイス。
- 前記単官能(メタ)アクリレートモノマーは、1つ以上の環式基を含む、請求項6に記載のデバイス。
- 前記単官能(メタ)アクリレートモノマーは、18%〜40%の量で存在し、前記二官能(メタ)アクリレートモノマーは、0.5%〜7%の量で存在し、前記三官能性(メタ)アクリレートモノマーは、0.1〜2%の量で存在する、請求項6に記載のデバイス。
- 前記硬化性組成物は、1種以上の前記アミン変性ポリエステル(メタ)アクリレート、1種以上の前記(メタ)アクリル化アミンオリゴマー、1種以上の前記(メタ)アクリレートモノマー、1種以上の前記粘土鉱物、および1種以上の前記光開始剤から本質的になる、請求項1に記載のデバイス。
- 前記硬化性組成物は、25%〜45%の前記アミン変性ポリエステル(メタ)アクリレート、0.5%〜7%の前記(メタ)アクリル化アミンオリゴマー、20%〜50%の前記(メタ)アクリレートモノマー、15%〜35%の前記粘土鉱物、および5%〜15%の前記光開始剤を含む、請求項9に記載のデバイス。
- 前記(メタ)アクリレートモノマーは、単官能(メタ)アクリレートモノマー、二官能(メタ)アクリレートモノマー、および三官能(メタ)アクリレートモノマーの組み合わせである、請求項10に記載のデバイス。
- 前記単官能(メタ)アクリレートモノマーは、1つ以上の環式基を含む、請求項11に記載のデバイス。
- 前記単官能(メタ)アクリレートモノマーは、18%〜40%の量で存在し、前記二官能(メタ)アクリレートモノマーは、0.5%〜7%の量で存在し、前記三官能性(メタ)アクリレートモノマーは、0.1〜2%の量で存在する、請求項12に記載のデバイス。
- 前記デバイスは、前記複数のコンタクトパッドと、前記複数の電極トレースと、前記複数のメモリセルと、前記保護層と、任意選択で前記保護層の下にあり、かつ有機材料からなる第2の保護層と、任意選択で基板と前記複数の電極トレースのうちの前記一組の下部電極トレースとの間の絶縁層とから本質的になる、請求項1に記載のデバイス。
- 前記保護層は、完全に硬化している、請求項1に記載のデバイス。
- 前記デバイスは、0の歩留まり低下を示す、請求項1に記載のデバイス。
- 前記複数のコンタクトパッドは、互いに平行に延在し、それらの間に空間を画定する2つのアレイに配置され、さらに、前記複数の電極トレースは、前記空間内に位置付けられた格子パターンで配置されている、請求項1に記載のデバイス。
- 基板と、前記基板上の複数の印刷された電子デバイスとを含む複数の印刷された電子デバイスであって、各デバイスが、請求項1に記載のデバイスに従って構成されている、複数の印刷された電子デバイス。
- 印刷された電子デバイスを製造する方法であって、
基板上に複数の下部電極トレースを印刷することと、
前記複数の下部電極トレース上に強誘電体材料の層を印刷することと、
前記強誘電体材料の層上に複数の上部電極トレースを印刷することであって、前記複数の下部電極トレースおよび前記複数の上部電極トレースが、あるパターンで配置された複数の電極トレースを形成し、かつ複数のメモリセルを画定し、各メモリセルが、前記複数の電極トレースのうちの一対の電極トレースの交差部に位置する、印刷することと、
前記複数の電極トレース上に複数のコンタクトパッドを印刷することであって、前記複数のコンタクトパッドが、別のパターンで配置され、前記複数の電極トレースの各電極トレースが、前記複数のコンタクトパッドのうちの関連付けられたコンタクトパッドと電気的に連絡している、印刷することと、
前記複数の電極トレースを覆うように硬化性組成物を印刷することであって、前記硬化性組成物が、アミン変性ポリエステル(メタ)アクリレート、(メタ)アクリル化アミンオリゴマー、(メタ)アクリレートモノマー、粘土鉱物、および光開始剤を含む、印刷することと、
前記硬化性組成物を硬化させて保護層を提供することと、を含む、方法。 - 印刷された電子デバイスを使用する方法であって、被覆された印刷された電子デバイスの複数のコンタクトパッドを読み取り/書き込みユニットの複数のピンと接触させることを含み、前記デバイスは、
あるパターンで配置された前記複数のコンタクトパッドと、
別のパターンで配置された複数の電極トレースであって、一組の下部電極トレースおよび一組の上部電極トレースを含み、各電極トレースが、前記複数のコンタクトパッドのうちの関連付けられたコンタクトパッドと電気的に連絡する、複数の電極トレースと、
複数のメモリセルであって、各メモリセルが、前記複数の電極トレースのうちの一対の電極トレースの交差部に位置し、前記下部電極トレースのうちの1つの領域から形成される下部電極層、上部電極トレースのうちの1つの領域から形成される上部電極層、および前記下部電極層と前記上部電極層との間の強誘電体層を含む、複数のメモリセルと、
前記複数の電極トレースを覆う保護層であって、アミン変性ポリエステル(メタ)アクリレート、(メタ)アクリル化アミンオリゴマー、(メタ)アクリレートモノマー、粘土鉱物、および光開始剤を含む硬化性組成物から形成された、保護層と、を備える、方法。
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