JP2019510246A - アレイ基板及び表示装置 - Google Patents
アレイ基板及び表示装置 Download PDFInfo
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- JP2019510246A JP2019510246A JP2017532849A JP2017532849A JP2019510246A JP 2019510246 A JP2019510246 A JP 2019510246A JP 2017532849 A JP2017532849 A JP 2017532849A JP 2017532849 A JP2017532849 A JP 2017532849A JP 2019510246 A JP2019510246 A JP 2019510246A
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- 239000000758 substrate Substances 0.000 title claims abstract description 153
- 229910052751 metal Inorganic materials 0.000 claims abstract description 125
- 239000002184 metal Substances 0.000 claims abstract description 125
- 239000010409 thin film Substances 0.000 claims abstract description 3
- 239000003990 capacitor Substances 0.000 abstract description 49
- 230000000694 effects Effects 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 193
- 238000010586 diagram Methods 0.000 description 18
- 238000000034 method Methods 0.000 description 16
- 239000004973 liquid crystal related substance Substances 0.000 description 14
- 239000000463 material Substances 0.000 description 10
- 238000001259 photo etching Methods 0.000 description 6
- 230000001788 irregular Effects 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
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- 229910000838 Al alloy Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 210000002858 crystal cell Anatomy 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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Abstract
Description
一実施例では、例えば、前記ゲート金属層が前記ベース基板と前記活性層との間に設置される。
一実施例では、例えば、前記第2パターンが前記第1パターンに接続される。
一実施例では、例えば、前記重なり部が前記ストレージ電極線と前記データ線との交差位置に設置される。
一実施例では、例えば、前記データ線の幅方向に、前記重なり部の寸法が前記接続部の寸法より大きい。
一実施例では、例えば、前記ストレージ電極線は、前記データ線との交差位置に拡幅部を含む。
一実施例では、例えば、前記ベース基板の第1主面における前記拡幅部の正投影が、前記ベース基板の第1主面における前記重なり部の正投影と重なる。
一実施例では、例えば、前記金属層パターンが前記ストレージ電極線と前記データ線との交差位置に設置される。
一実施例では、例えば、前記金属層パターンと前記データ線とは一体化される。
一実施例では、例えば、前記データ線の幅方向における前記金属層パターンの寸法が前記データ線の幅より大きい。
一実施例では、例えば、前記ストレージ電極線の幅方向における前記金属層パターンの寸法が前記ストレージ電極線の幅以下である。
一実施例では、例えば、前記ベース基板の第1主面における前記拡幅部の正投影が、前記ベース基板の第1主面における前記金属層パターンの正投影と重なる。
本開示の別の態様は、上記アレイ基板を含む表示装置を提供する。
図2aは本開示の実施例のアレイ基板における活性層とストレージ電極線とによって形成されるストレージコンデンサーを示す上面模式図である。図2bは本開示の実施例の活性層の構造を示す模式図である。
当該実施例では、例えば、前記重なり部が板状構造である。ストレージコンデンサーの大きさは、互いに対向する金属板の対向面積によって決められると共に、金属板間の距離によって決められる。重なり部を板状に設置することによって、重なり部とストレージ電極線との対応位置での対向面積を大きくさせることができ、それによって、ストレージコンデンサーを大きくさせ、点滅とクロストークとを効果的に防止することができる。ここでの板状構造の形状は、例えば長方形、正方形、円形及び他の規則的又は不規則な形状である。
一実施例では、ソース・ドレイン金属層は、データ線パターンと、前記基板の厚さ方向にストレージ電極線と少なくとも部分的に重なる金属層パターンとを含む。
当該実施例では、例えば、データ線の幅方向における金属層パターンの寸法がデータ線の幅より大きい。図6は本開示の実施例の金属層パターンとデータ線とのデータ線の幅方向における寸法関係を示す模式図である。図6に示すように、データ線108に金属層パターン110が設置され、即ち、図中の陰線に示される部分である。前記のように、データ線108と当該金属層パターン110とがいずれもソース・ドレイン金属層に設置される。データ線108の幅方向(図6の矢印に示す方向)における当該金属層パターン110の寸法がデータ線108の幅より大きい。例えば、上記のように、当該金属層パターン110は当該データ線108と一体化されてもよく、両者は同一の金属層を利用し、パターニングプロセスによって得られる。金属層パターンの幅をデータ線の幅より大きくさせることによって、大きなストレージコンデンサーを取得でき、表示装置のクロストークと表示不良を防止することができる。
上記実施例のアレイ基板に対して、本開示の実施例はアレイ基板の製造方法を提供するが、本開示のアレイ基板の製造方法は以下の方法に限定されない。
その後、パッシベーション層の上に一層の透明導電層(例えばITO)を被覆し、マスクを利用しフォトエッチングを行って、本開示の一実施例のアレイ基板構造を取得する。
本開示の別の態様は、上記アレイ基板を含む表示装置を提供する。
当該表示装置のさらに別の例は電子紙表示装置であり、アレイ基板に電子インク層が形成される。各画素ユニットの画素電極は、表示動作のために、電子インクにおける帯電粒子を移動させる電圧を印加する。
本願は、2016年1月27日に提出した中国特許出願第No.201620080097.6号の「アレイ基板及び表示装置」の優先権を主張し、ここで、内容全体が援用され本願に組み込まれる。
11 第1主面
12 第2主面
100 ストレージ電極線
102 ゲート線
106 活性層
108 データ線
109 画素電極
110 金属層パターン
112 ゲート
118 ソース
119 ドレイン
1001 拡幅部
1061 チャネル領域
1062 接続部
1063 重なり部
Claims (20)
- ベース基板と、前記ベース基板に設置されたゲート金属層、活性層、ソース・ドレイン金属層とを含み、
前記ゲート金属層は、ゲート線と、前記ゲート線と平行に延びるストレージ電極線とを含み、前記活性層は、薄膜トランジスタ(TFT)のチャネル領域である第1パターンと、前記基板の厚さ方向に前記ストレージ電極線と少なくとも部分的に重なる第2パターンとを含み、又は前記ソース・ドレイン金属層は、データ線パターンと、前記基板の厚さ方向に前記ストレージ電極線と少なくとも部分的に重なる金属層パターンとを含むことを特徴とするアレイ基板。 - 前記活性層は、TFTのチャネル領域である前記第1パターンと、前記基板の厚さ方向に前記ストレージ電極線と少なくとも部分的に重なる前記第2パターンとを含み、且つ前記ソース・ドレイン金属層は、データ線パターンと、前記基板の厚さ方向に前記ストレージ電極線と少なくとも部分的に重なる前記金属層パターンとを含むことを特徴とする、請求項1に記載のアレイ基板。
- 前記活性層は、前記ベース基板と前記ゲート金属層との間に設置されることを特徴とする、請求項1又は2に記載のアレイ基板。
- 前記ゲート金属層は、前記ベース基板と前記活性層との間に設置されることを特徴とする、請求項1又は2に記載のアレイ基板。
- 前記第2パターンは、前記第1パターンに接続されることを特徴とする、請求項1に記載のアレイ基板。
- 前記第2パターンは、接続部と、前記接続部に接続される重なり部とを含み、前記接続部は、前記第1パターンに接続され、前記重なり部は、前記基板の厚さ方向に前記ストレージ電極線と重なることを特徴とする、請求項5に記載のアレイ基板。
- 前記重なり部は、前記ストレージ電極線と前記データ線との交差位置に設置されることを特徴とする、請求項6に記載のアレイ基板。
- 前記接続部と前記データ線との延び方向が同じであり、且つ前記ベース基板の第1主面における前記接続部の正投影が、前記ベース基板の第1主面における前記データ線の正投影内に位置することを特徴とする、請求項7に記載のアレイ基板。
- 前記データ線の幅方向に、前記重なり部の寸法が前記接続部の寸法より大きいことを特徴とする、請求項8に記載のアレイ基板。
- 前記重なり部は板状構造であることを特徴とする、請求項6〜9のいずれか一項に記載のアレイ基板。
- 前記ストレージ電極線は、前記データ線との交差位置に拡幅部を含むことを特徴とする、請求項6〜9のいずれか一項に記載のアレイ基板。
- 前記ベース基板の第1主面における前記拡幅部の正投影が、前記ベース基板の第1主面における前記重なり部の正投影と重なることを特徴とする、請求項11に記載のアレイ基板。
- 前記金属層パターンは、前記ストレージ電極線と前記データ線との交差位置に設置されることを特徴とする、請求項1及び請求項6〜9のいずれか一項に記載のアレイ基板。
- 前記金属層パターンと前記データ線とは一体化されることを特徴とする、請求項13に記載のアレイ基板。
- 前記金属層パターンは板状構造であることを特徴とする、請求項14に記載のアレイ基板。
- 前記データ線の幅方向における前記金属層パターンの寸法は前記データ線の幅より大きいことを特徴とする、請求項14に記載のアレイ基板。
- 前記ストレージ電極線の幅方向における前記金属層パターンの寸法は前記ストレージ電極線の幅以下であることを特徴とする、請求項16に記載のアレイ基板。
- 前記ストレージ電極線は、前記データ線との交差位置に拡幅部を含むことを特徴とする、請求項13に記載のアレイ基板。
- 前記ベース基板の第1主面における前記拡幅部の正投影が、前記ベース基板の第1主面における前記金属層パターンの正投影と重なることを特徴とする、請求項18に記載のアレイ基板。
- 請求項1〜19のいずれか一項に記載のアレイ基板を含むことを特徴とする表示装置。
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