JP2018515939A - 横方向拡散金属酸化物半導体電界効果トランジスタ及びその製造方法 - Google Patents
横方向拡散金属酸化物半導体電界効果トランジスタ及びその製造方法 Download PDFInfo
- Publication number
- JP2018515939A JP2018515939A JP2018503704A JP2018503704A JP2018515939A JP 2018515939 A JP2018515939 A JP 2018515939A JP 2018503704 A JP2018503704 A JP 2018503704A JP 2018503704 A JP2018503704 A JP 2018503704A JP 2018515939 A JP2018515939 A JP 2018515939A
- Authority
- JP
- Japan
- Prior art keywords
- well
- effect transistor
- field effect
- semiconductor field
- metal oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 34
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 34
- 230000005669 field effect Effects 0.000 title claims abstract description 33
- 238000009792 diffusion process Methods 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 238000002955 isolation Methods 0.000 claims abstract description 38
- 238000005530 etching Methods 0.000 claims abstract description 25
- 238000001039 wet etching Methods 0.000 claims abstract description 16
- 238000000206 photolithography Methods 0.000 claims abstract description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 15
- 229920005591 polysilicon Polymers 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 11
- 238000001312 dry etching Methods 0.000 claims abstract description 10
- 238000005468 ion implantation Methods 0.000 claims abstract description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 7
- 239000010410 layer Substances 0.000 claims description 40
- 239000000758 substrate Substances 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 2
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 239000002356 single layer Substances 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims description 2
- 230000005684 electric field Effects 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 1
- 239000012495 reaction gas Substances 0.000 claims 1
- 150000002500 ions Chemical class 0.000 abstract description 3
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 230000015556 catabolic process Effects 0.000 description 6
- 230000002411 adverse Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (11)
- 第1Nウェル、第1Pウェル及びチャネル領域シャロートレンチアイソレーション構造が形成されたウェハを提供するステップと、
前記ウェハの表面に高温酸化膜を成長させるステップと、
前記高温酸化膜に対してフォトリソグラフィー及びドライエッチングを行い、エッチングで除去される厚みを前記高温酸化膜の厚みより小さくすることにより、フォトレジストで被覆されていない領域に、エッチングバッファ層として一層の高温酸化膜を残すステップと、
ウェットエッチングを行い、前記エッチングバッファ層を除去し、残った高温酸化膜を、前記フォトレジストの下方にミニ酸化層を形成するステップと、
第2Nウェル及び第2Pウェルに対してフォトリソグラフィー及びイオン注入を行うことにより、前記第1Nウェル内に第2Nウェルを形成するとともに、前記第1Pウェル内に第2Pウェルを形成し、前記チャネル領域シャロートレンチアイソレーション構造が前記第2Nウェルの表面から内部まで下へ延伸し、前記ミニ酸化層が前記第2Nウェルに位置し、且つその一端を前記第1Pウェルに近い前記チャネル領域シャロートレンチアイソレーション構造の第1端に接続するステップと、
前記ウェハの表面にポリシリコンゲート及びゲート酸化層を形成し、前記ポリシリコンゲート及びゲート酸化層は、その一端が前記第2Pウェルに接続され、他端が前記チャネル領域シャロートレンチアイソレーション構造の第1端まで延伸するとともに前記ミニ酸化層を覆うステップと、
フォトリソグラフィー及びN型イオンの注入を行うことにより、前記第2Nウェル内において前記チャネル領域シャロートレンチアイソレーション構造に近く、第1端と対向する第2端の隣の位置にドレインを形成するとともに、前記第2Pウェル内にソースを形成するステップと、
を含むことを特徴とする横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。 - 前記高温酸化膜に対してフォトリソグラフィー及びドライエッチングを行う前記ステップにおいて、残されたエッチングバッファ層の厚みは、70〜150Åであることを特徴とする請求項1に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- ウェットエッチングを行う前記ステップの後に、前記チャネル領域シャロートレンチアイソレーション構造のエッジは、前記第1Nウェルの表面より200〜400Å高くなることを特徴とする請求項1又は2に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- ウェハの表面に高温酸化膜を成長させる前記ステップは、750〜850℃で二酸化ケイ素を成長させることを特徴とする請求項1に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- 前記ウェハの表面に高温酸化膜を成長させる前記ステップに使用される反応ガスは、N2O及びSiH2Cl2であることを特徴とする請求項4に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- 前記ウェハの表面に高温酸化膜を成長させる前記ステップの後、且つウェットエッチングを行う前記ステップの前に、さらにウェハに対してドライブイン熱処理を行うステップを含むことを特徴とする請求項1に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- ウェットエッチングを行う前記ステップは、エッチング時間固定の方式を採用してエッチングを行うものであることを特徴とする請求項1に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- ウェハの表面に高温酸化膜を成長させる前記ステップの前に、さらにウェハの表面に対して化学機械研磨を行うステップを含むことを特徴とする請求項1に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- ウェハに対してドライブイン熱処理を行う前記ステップは、温度が1000℃以上、時間が60分間以上の条件で行われることを特徴とする請求項6に記載の横方向拡散金属酸化物半導体電界効果トランジスタの製造方法。
- 基板と、前記基板内に位置する第1Nウェル、第1Pウェルと、前記第1Nウェルの表面に位置する第2Nウェルと、前記第1Pウェルの表面に位置する第2Pウェルと、前記基板上に位置するチャネル領域シャロートレンチアイソレーション構造とを有し、前記チャネル領域シャロートレンチアイソレーション構造は、第2Nウェルの表面から内部まで下へ延伸し、
前記第2Pウェルの表面に設けられるソースと、
前記第2Nウェルの表面に設けられ、前記第2Pウェルから遠いチャネル領域シャロートレンチアイソレーション構造の一端の隣に位置するドレインと、
ポリシリコンゲートとゲート酸化層を有し、その一端が前記第2Pウェルに接続され、他端が前記チャネル領域シャロートレンチアイソレーション構造まで延伸するゲートと、
を有する横方向拡散金属酸化物半導体電界効果トランジスタであって、
ミニ酸化層を有し、
前記ミニ酸化層の一端が、前記第2Pウェルに近い前記チャネル領域シャロートレンチアイソレーション構造の一端に接続され、他端が前記第2Nウェルまで延伸し、
前記ミニ酸化層が前記ポリシリコンゲートで被覆されていることを特徴とする横方向拡散金属酸化物半導体電界効果トランジスタ。 - 前記横方向拡散金属酸化物半導体電界効果トランジスタは、Nチャネル横方向拡散金属酸化物半導体電界効果トランジスタであることを特徴とする請求項10に記載の横方向拡散金属酸化物半導体電界効果トランジスタ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510169433.4A CN106158957B (zh) | 2015-04-10 | 2015-04-10 | 横向扩散金属氧化物半导体场效应管及其制造方法 |
CN201510169433.4 | 2015-04-10 | ||
PCT/CN2016/072853 WO2016161842A1 (zh) | 2015-04-10 | 2016-01-29 | 横向扩散金属氧化物半导体场效应管及其制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018515939A true JP2018515939A (ja) | 2018-06-14 |
JP6464313B2 JP6464313B2 (ja) | 2019-02-06 |
Family
ID=57072980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018503704A Active JP6464313B2 (ja) | 2015-04-10 | 2016-01-29 | 横方向拡散金属酸化物半導体電界効果トランジスタ及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10290705B2 (ja) |
JP (1) | JP6464313B2 (ja) |
CN (1) | CN106158957B (ja) |
WO (1) | WO2016161842A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106483758B (zh) | 2015-09-02 | 2019-08-20 | 无锡华润上华科技有限公司 | 光学邻近效应修正方法和系统 |
CN106653842B (zh) | 2015-10-28 | 2019-05-17 | 无锡华润上华科技有限公司 | 一种具有静电释放保护结构的半导体器件 |
CN106816468B (zh) | 2015-11-30 | 2020-07-10 | 无锡华润上华科技有限公司 | 具有resurf结构的横向扩散金属氧化物半导体场效应管 |
CN107465983B (zh) | 2016-06-03 | 2021-06-04 | 无锡华润上华科技有限公司 | Mems麦克风及其制备方法 |
KR102227666B1 (ko) * | 2017-05-31 | 2021-03-12 | 주식회사 키 파운드리 | 고전압 반도체 소자 |
CN112309865B (zh) * | 2019-08-01 | 2022-10-18 | 无锡华润上华科技有限公司 | 横向扩散金属氧化物半导体器件及其制造方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001015741A (ja) * | 1999-06-30 | 2001-01-19 | Toshiba Corp | 電界効果トランジスタ |
JP2002176173A (ja) * | 2000-12-07 | 2002-06-21 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
JP2007533127A (ja) * | 2004-04-08 | 2007-11-15 | オーストリアマイクロシステムズ アクチエンゲゼルシャフト | 高圧接合型電界効果トランジスタ |
JP2009528671A (ja) * | 2005-12-19 | 2009-08-06 | エヌエックスピー ビー ヴィ | Sti領域を有する非対称型電界効果半導体デバイス |
JP2013115144A (ja) * | 2011-11-25 | 2013-06-10 | Toyota Motor Corp | 半導体装置およびその製造方法 |
JP2014107302A (ja) * | 2012-11-22 | 2014-06-09 | Renesas Electronics Corp | 半導体装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6262459B1 (en) * | 2000-01-18 | 2001-07-17 | United Microelectronics Corp. | High-voltage device and method for manufacturing high-voltage device |
US7851314B2 (en) | 2008-04-30 | 2010-12-14 | Alpha And Omega Semiconductor Incorporated | Short channel lateral MOSFET and method |
US8274114B2 (en) * | 2010-01-14 | 2012-09-25 | Broadcom Corporation | Semiconductor device having a modified shallow trench isolation (STI) region and a modified well region |
CN102130170B (zh) * | 2010-01-20 | 2013-02-13 | 上海华虹Nec电子有限公司 | 高压隔离n型晶体管及高压隔离p型晶体管 |
CN102254946B (zh) | 2011-01-11 | 2013-07-10 | 苏州英诺迅科技有限公司 | 一种射频横向扩散n型mos管及其制造方法 |
TWI478336B (zh) * | 2011-05-06 | 2015-03-21 | Episil Technologies Inc | 減少表面電場的結構及橫向雙擴散金氧半導體元件 |
CN102790089A (zh) * | 2012-07-24 | 2012-11-21 | 华中科技大学 | 一种漏极下具有埋层的射频ldmos器件 |
CN103151386A (zh) * | 2013-03-27 | 2013-06-12 | 上海宏力半导体制造有限公司 | 横向扩散金属氧化物半导体器件及其制造方法 |
CN105810583B (zh) * | 2014-12-30 | 2019-03-15 | 无锡华润上华科技有限公司 | 横向绝缘栅双极型晶体管的制造方法 |
-
2015
- 2015-04-10 CN CN201510169433.4A patent/CN106158957B/zh active Active
-
2016
- 2016-01-29 US US15/564,181 patent/US10290705B2/en active Active
- 2016-01-29 JP JP2018503704A patent/JP6464313B2/ja active Active
- 2016-01-29 WO PCT/CN2016/072853 patent/WO2016161842A1/zh active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001015741A (ja) * | 1999-06-30 | 2001-01-19 | Toshiba Corp | 電界効果トランジスタ |
JP2002176173A (ja) * | 2000-12-07 | 2002-06-21 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
JP2007533127A (ja) * | 2004-04-08 | 2007-11-15 | オーストリアマイクロシステムズ アクチエンゲゼルシャフト | 高圧接合型電界効果トランジスタ |
JP2009528671A (ja) * | 2005-12-19 | 2009-08-06 | エヌエックスピー ビー ヴィ | Sti領域を有する非対称型電界効果半導体デバイス |
JP2013115144A (ja) * | 2011-11-25 | 2013-06-10 | Toyota Motor Corp | 半導体装置およびその製造方法 |
JP2014107302A (ja) * | 2012-11-22 | 2014-06-09 | Renesas Electronics Corp | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
US20180130877A1 (en) | 2018-05-10 |
WO2016161842A1 (zh) | 2016-10-13 |
US10290705B2 (en) | 2019-05-14 |
CN106158957A (zh) | 2016-11-23 |
CN106158957B (zh) | 2019-05-17 |
JP6464313B2 (ja) | 2019-02-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6464313B2 (ja) | 横方向拡散金属酸化物半導体電界効果トランジスタ及びその製造方法 | |
US9607839B2 (en) | NLDMOS transistor and fabrication method thereof | |
TWI610435B (zh) | 具有橫向擴散金屬氧化物半導體結構之高壓鰭式場效電晶體元件及其製造方法 | |
WO2018121132A1 (zh) | Ldmos器件及其制作方法 | |
KR20160012459A (ko) | 반도체 소자 및 그 제조 방법 | |
TW201622139A (zh) | 高壓半導體裝置與其製造方法 | |
EP3190606A1 (en) | Pmos transistor and fabrication method thereof | |
KR20160018322A (ko) | 반도체 장치의 제조 방법 | |
US9496331B2 (en) | Semiconductor device having vertical MOSFET with super junction structure, and method for manufacturing the same | |
JP6555552B2 (ja) | 横型絶縁ゲートバイポーラトランジスタの製造方法 | |
WO2019109924A1 (zh) | Ldmos器件及其制备方法 | |
US10229995B2 (en) | Fabricating method of fin structure with tensile stress and complementary FinFET structure | |
US20150137146A1 (en) | Transistor device | |
US9034709B2 (en) | Method for manufacturing semiconductor device | |
CN102915971B (zh) | 一种半导体器件的制造方法 | |
TWI703675B (zh) | 半導體元件及其製造方法 | |
JP2018064070A (ja) | 半導体装置の製造方法 | |
US8928047B2 (en) | MOSFET with source side only stress | |
KR100848242B1 (ko) | 반도체 소자 및 반도체 소자의 제조 방법 | |
JP2016004952A (ja) | 半導体装置の製造方法 | |
KR20100020688A (ko) | Ldmos 반도체 소자와 그 제조 방법 | |
KR101015529B1 (ko) | Ldmos 트랜지스터 및 그 제조방법 | |
KR101198938B1 (ko) | 고전압 소자의 소자 분리 방법 | |
CN104217933B (zh) | 半导体结构及其形成方法 | |
KR101262853B1 (ko) | 반도체 소자 및 그 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180926 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20181002 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181207 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20181218 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190107 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6464313 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |