JP2018101730A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP2018101730A JP2018101730A JP2016247972A JP2016247972A JP2018101730A JP 2018101730 A JP2018101730 A JP 2018101730A JP 2016247972 A JP2016247972 A JP 2016247972A JP 2016247972 A JP2016247972 A JP 2016247972A JP 2018101730 A JP2018101730 A JP 2018101730A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 82
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims description 19
- 238000003860 storage Methods 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 238000007599 discharging Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000003825 pressing Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Die Bonding (AREA)
- Led Device Packages (AREA)
- Supply And Installment Of Electrical Components (AREA)
Abstract
Description
半導体素子が重ねて収容された収容部を備えた本体と、収容部の上側開口部に備えられ、エア供給口を備えたキャップと、収容部の下側開口部に備えられるストッパと、を備えた半導体素子収容済のカートリッジを準備する工程と、基板を準備する工程と、基板の上方にカートリッジを配置した後、エア供給口から収容部内にエアを供給し、半導体素子を下側開口部から放出し、基板の上面に半導体素子を載置する工程と、を備える半導体装置の製造方法。
1)半導体素子が収容されたカートリッジを準備する工程
2)基板を準備する工程
3)カートリッジの開口部から半導体素子を放出し、基板上に載置する工程
図1は、実施形態で用いられるカートリッジ10を示す概略断面図である。カートリッジ10は、本体20と、本体20の上側に設けられるキャップ30と、本体20の下側に設けられるストッパ40と、を備える。
基板60は、例えば、例えば、半導体装置の筐体となる基板や、製造工程内において仮実装されるシート等の仮置き用の基板を用いることができる。仮置き用の基板とは、最終的には半導体装置を構成しない基板であり、工程内のみで用いられる基板を指す。半導体装置の筐体となる基板としては、配線を備えたセラミックパッケージ、リードを一体成形した樹脂パッケージ等が挙げられる。また、仮置き用の基板としては、耐熱シート等が挙げられる。
半導体素子50を収容したカートリッジ10を、基板60の所定の位置の上方に配置する。そして、エア供給口31から本体20の収容部21内にエアを供給する。これにより、収容部21内の半導体素子50が上方から押圧されると共に、ストッパ40が下方に開放する。これにより、半導体素子50は収容部21の下側開口部24から下方に放出され、基板60の上面に載置される。
上述のようにして、半導体素子50を基板60上に載置した後、種々の工程を備えることができる。例えば、半導体素子50として発光素子を用い、半導体装置100として図5に示すような構成を備えた発光装置を得る場合について説明する。
20…本体
21…収容部
22…内側面
23…上側開口部
24…下側開口部
30…キャップ
31…エア供給口
32…エア供給チューブ
40…ストッパ
50…半導体素子
51…積層構造体
52…電極
60…基板
70…接合部材
80…ワイヤ
90…封止部材
100…半導体装置
Claims (6)
- 半導体素子が重ねて収容された収容部を備えた本体と、前記収容部の上側開口部に備えられ、エア供給口を備えたキャップと、前記収容部の下側開口部に備えられるストッパと、を備えた半導体素子収容済のカートリッジを準備する工程と、
基板を準備する工程と、
前記基板の上方に前記カートリッジを配置した後、前記エア供給口から前記収容部内にエアを供給し、前記半導体素子を前記下側開口部から放出し、前記基板の上面に前記半導体素子を載置する工程と、
を備える半導体装置の製造方法。 - 前記収容部の幅は、前記半導体素子の幅の105%〜130%程度である請求項1記載の半導体装置の製造方法。
- 前記収容部の内側面は、鏡面加工された面である請求項1又は請求項2記載の半導体装置の製造方法。
- 前記収容部の内側面は、コーティング膜を備えている請求項1又は請求項2記載の半導体装置の製造方法。
- 前記ストッパは、弾性体である請求項1〜請求項4のいずれか1項に記載の半導体装置の製造方法。
- 前記半導体素子は、発光素子である請求項1〜請求項5のいずれか1項に記載の半導体装置の製造方法。
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JP2018101730A true JP2018101730A (ja) | 2018-06-28 |
JP6747280B2 JP6747280B2 (ja) | 2020-08-26 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102141203B1 (ko) * | 2019-02-11 | 2020-08-04 | 세메스 주식회사 | 본딩 헤드 및 이를 갖는 칩 본딩 장치 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55165832A (en) * | 1979-06-13 | 1980-12-24 | Sanyo Electric Co Ltd | Delivery method of small-sized parts |
JPS57183043A (en) * | 1981-05-07 | 1982-11-11 | Nec Home Electronics Ltd | Mounting of semiconductor pellet |
JPS58187000A (ja) * | 1982-04-26 | 1983-11-01 | 松下電器産業株式会社 | チップ形電子部品の実装方法 |
JPH0348226U (ja) * | 1989-09-13 | 1991-05-08 | ||
JPH10273192A (ja) * | 1997-03-28 | 1998-10-13 | Nec Corp | 電子部品収納パック |
JPH10284881A (ja) * | 1997-04-08 | 1998-10-23 | Matsushita Electric Ind Co Ltd | 電子部品実装機 |
JPH11312897A (ja) * | 1998-04-27 | 1999-11-09 | Sony Corp | 部品搬送体 |
JP2000062890A (ja) * | 1998-08-18 | 2000-02-29 | Sony Corp | チップ部品のマガジンケース |
-
2016
- 2016-12-21 JP JP2016247972A patent/JP6747280B2/ja active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55165832A (en) * | 1979-06-13 | 1980-12-24 | Sanyo Electric Co Ltd | Delivery method of small-sized parts |
JPS57183043A (en) * | 1981-05-07 | 1982-11-11 | Nec Home Electronics Ltd | Mounting of semiconductor pellet |
JPS58187000A (ja) * | 1982-04-26 | 1983-11-01 | 松下電器産業株式会社 | チップ形電子部品の実装方法 |
JPH0348226U (ja) * | 1989-09-13 | 1991-05-08 | ||
JPH10273192A (ja) * | 1997-03-28 | 1998-10-13 | Nec Corp | 電子部品収納パック |
JPH10284881A (ja) * | 1997-04-08 | 1998-10-23 | Matsushita Electric Ind Co Ltd | 電子部品実装機 |
JPH11312897A (ja) * | 1998-04-27 | 1999-11-09 | Sony Corp | 部品搬送体 |
JP2000062890A (ja) * | 1998-08-18 | 2000-02-29 | Sony Corp | チップ部品のマガジンケース |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102141203B1 (ko) * | 2019-02-11 | 2020-08-04 | 세메스 주식회사 | 본딩 헤드 및 이를 갖는 칩 본딩 장치 |
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