JP2018036823A - 制御回路の検査方法 - Google Patents

制御回路の検査方法 Download PDF

Info

Publication number
JP2018036823A
JP2018036823A JP2016168916A JP2016168916A JP2018036823A JP 2018036823 A JP2018036823 A JP 2018036823A JP 2016168916 A JP2016168916 A JP 2016168916A JP 2016168916 A JP2016168916 A JP 2016168916A JP 2018036823 A JP2018036823 A JP 2018036823A
Authority
JP
Japan
Prior art keywords
unit
inspection
signal line
control circuit
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016168916A
Other languages
English (en)
Japanese (ja)
Inventor
広昭 水谷
Hiroaki Mizutani
広昭 水谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP2016168916A priority Critical patent/JP2018036823A/ja
Priority to PCT/JP2017/023910 priority patent/WO2018042858A1/fr
Publication of JP2018036823A publication Critical patent/JP2018036823A/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16—Protection against loss of memory contents

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP2016168916A 2016-08-31 2016-08-31 制御回路の検査方法 Pending JP2018036823A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2016168916A JP2018036823A (ja) 2016-08-31 2016-08-31 制御回路の検査方法
PCT/JP2017/023910 WO2018042858A1 (fr) 2016-08-31 2017-06-29 Procédé d'inspection pour circuit de commande

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016168916A JP2018036823A (ja) 2016-08-31 2016-08-31 制御回路の検査方法

Publications (1)

Publication Number Publication Date
JP2018036823A true JP2018036823A (ja) 2018-03-08

Family

ID=61305277

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016168916A Pending JP2018036823A (ja) 2016-08-31 2016-08-31 制御回路の検査方法

Country Status (2)

Country Link
JP (1) JP2018036823A (fr)
WO (1) WO2018042858A1 (fr)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03293572A (ja) * 1990-04-11 1991-12-25 Sharp Corp 基板部品検査回路
JP2013073649A (ja) * 2011-09-27 2013-04-22 Toshiba Corp 半導体記憶装置

Also Published As

Publication number Publication date
WO2018042858A1 (fr) 2018-03-08

Similar Documents

Publication Publication Date Title
WO2016101411A1 (fr) Procédé et dispositif d'affichage de serveur
JP4758471B2 (ja) 保守ガイダンス表示装置、保守ガイダンス表示方法、保守ガイダンス表示プログラム
JP5067266B2 (ja) Ｊｔａｇ機能付き集積回路ボード
JP6486011B2 (ja) 車載装置の検査システム、車載装置の検査用装置、車載装置、および、可搬型の記憶媒体
CN110322921A (zh) 一种终端及电子设备
JP2018036823A (ja) 制御回路の検査方法
KR100944325B1 (ko) 리페어 퓨즈 장치
KR100983070B1 (ko) 어드레스선 고장 처리 장치, 어드레스선 고장 처리 방법, 어드레스선 고장 처리 명령을 기억하는 컴퓨터 판독 가능한 기억 매체, 정보 처리 장치, 및 메모리 컨트롤러
US5828673A (en) Logical check apparatus and method for semiconductor circuits and storage medium storing logical check program for semiconductor circuits
JP2016004279A (ja) 保守システム及び保守方法
JP2007148536A (ja) Ｒａｍ診断装置および方法
TW201603034A (zh) 半導體裝置之測試混合陣列的方法
JP3873586B2 (ja) 回路基板検査装置および回路基板検査方法
JP5573638B2 (ja) 情報処理装置及びその作動方法
JP3664466B2 (ja) メモリ・チェック・テスト実行方法及び記憶媒体
JPS59114648A (ja) 診断装置
KR101686464B1 (ko) 단일 기판 컴퓨터를 위한 메모리 점검 장치 및 방법
JP2010040133A (ja) 半導体メモリ検査装置
WO2017208456A1 (fr) Carte de commande, dispositif de fabrication de carte de commande et procédé de fabrication de carte de commande
JPH03245071A (ja) 試験装置
JP2007150543A (ja) 携帯端末装置
JPS5914196A (ja) マイクロコンピユ−タの試験装置
JPH05167020A (ja) 半導体理論集積回路
JP2006254031A (ja) テレビジョン受像機
JPH01242979A (ja) 故障診断支援装置