JP2017529644A5 - - Google Patents

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Publication number
JP2017529644A5
JP2017529644A5 JP2017515931A JP2017515931A JP2017529644A5 JP 2017529644 A5 JP2017529644 A5 JP 2017529644A5 JP 2017515931 A JP2017515931 A JP 2017515931A JP 2017515931 A JP2017515931 A JP 2017515931A JP 2017529644 A5 JP2017529644 A5 JP 2017529644A5
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Japan
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nfet
header
gate
coupled
pfet
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JP2017515931A
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Japanese (ja)
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JP6668337B2 (ja
JP2017529644A (ja
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Priority claimed from US14/499,052 external-priority patent/US9251875B1/en
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JP2017515931A 2014-09-26 2015-08-04 レジスタファイル回路および最小動作供給電圧を改善するための方法 Active JP6668337B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/499,052 2014-09-26
US14/499,052 US9251875B1 (en) 2014-09-26 2014-09-26 Register file circuit and method for improving the minimum operating supply voltage
PCT/US2015/043602 WO2016048455A1 (en) 2014-09-26 2015-08-04 Register file circuit and method for improving the minimum operating supply voltage

Publications (3)

Publication Number Publication Date
JP2017529644A JP2017529644A (ja) 2017-10-05
JP2017529644A5 true JP2017529644A5 (enExample) 2018-08-23
JP6668337B2 JP6668337B2 (ja) 2020-03-18

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ID=53836860

Family Applications (1)

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JP2017515931A Active JP6668337B2 (ja) 2014-09-26 2015-08-04 レジスタファイル回路および最小動作供給電圧を改善するための方法

Country Status (6)

Country Link
US (1) US9251875B1 (enExample)
EP (1) EP3198608B1 (enExample)
JP (1) JP6668337B2 (enExample)
KR (1) KR102133758B1 (enExample)
CN (1) CN106716541B (enExample)
WO (1) WO2016048455A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5317900B2 (ja) 2009-09-14 2013-10-16 ルネサスエレクトロニクス株式会社 半導体集積回路およびその動作方法
US10163524B2 (en) 2016-06-22 2018-12-25 Darryl G. Walker Testing a semiconductor device including a voltage detection circuit and temperature detection circuit that can be used to generate read assist and/or write assist in an SRAM circuit portion and method therefor
US9940999B2 (en) 2016-06-22 2018-04-10 Darryl G. Walker Semiconductor devices, circuits and methods for read and/or write assist of an SRAM circuit portion based on voltage detection and/or temperature detection circuits
US11417370B2 (en) 2020-08-12 2022-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device
RU2771447C1 (ru) * 2021-08-03 2022-05-04 Владимир Владимирович Шубин Элемент входного регистра
US11955171B2 (en) 2021-09-15 2024-04-09 Mavagail Technology, LLC Integrated circuit device including an SRAM portion having end power select circuits

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JP2002042476A (ja) * 2000-07-25 2002-02-08 Mitsubishi Electric Corp スタティック型半導体記憶装置
US6771095B1 (en) * 2002-11-22 2004-08-03 Analog Devices, Inc. Level translating digital switch
JP4917767B2 (ja) * 2005-07-01 2012-04-18 パナソニック株式会社 半導体記憶装置
US20070047364A1 (en) * 2005-08-31 2007-03-01 International Business Machines Corporation Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
US7313032B2 (en) * 2005-11-29 2007-12-25 International Business Machines Corporation SRAM voltage control for improved operational margins
JP4865360B2 (ja) * 2006-03-01 2012-02-01 パナソニック株式会社 半導体記憶装置
US20070242498A1 (en) * 2006-04-13 2007-10-18 Anantha Chandrakasan Sub-threshold static random access memory
KR100780750B1 (ko) * 2006-05-11 2007-11-30 한국과학기술원 표준 셀과 파워 게이팅 셀을 이용한 파워 네트워크 및 이를가지는 반도체 장치
US7542329B2 (en) * 2006-07-19 2009-06-02 International Business Machines Corporation Virtual power rails for integrated circuits
US7692130B2 (en) * 2006-11-01 2010-04-06 International Business Machines Corporation CMOS imaging sensor having a third FET device with a gate terminal coupled to a second diffusion region of a first FET device and a first terminal coupled to a row select signal
US7414878B1 (en) * 2007-05-04 2008-08-19 International Business Machines Corporation Method for implementing domino SRAM leakage current reduction
JP2009076164A (ja) * 2007-09-21 2009-04-09 Fujitsu Microelectronics Ltd 半導体記憶装置
US7551508B2 (en) * 2007-11-16 2009-06-23 International Business Machines Corporation Energy efficient storage device using per-element selectable power supply voltages
US8099688B2 (en) * 2007-11-19 2012-01-17 International Business Machines Corporation Circuit design
JP5200506B2 (ja) * 2007-11-28 2013-06-05 富士通セミコンダクター株式会社 メモリ装置
US8111579B2 (en) 2008-11-10 2012-02-07 Intel Corporation Circuits and methods for reducing minimum supply for register file cells
US8094505B2 (en) 2009-10-09 2012-01-10 Intel Corporation Method and system to lower the minimum operating voltage of a memory array
TWI419162B (zh) * 2009-11-03 2013-12-11 Univ Hsiuping Sci & Tech 具放電路徑之單埠靜態隨機存取記憶體
US8400819B2 (en) * 2010-02-26 2013-03-19 Freescale Semiconductor, Inc. Integrated circuit having variable memory array power supply voltage
US8320203B2 (en) 2010-03-26 2012-11-27 Intel Corporation Method and system to lower the minimum operating voltage of register files
US8493124B2 (en) 2010-07-26 2013-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Low minimum power supply voltage level shifter
US9093125B2 (en) 2012-01-23 2015-07-28 Qualcomm Incorporated Low voltage write speed bitcell
US8823454B2 (en) * 2012-03-30 2014-09-02 Freescale Semiconductor, Inc. Fully complementary self-biased differential receiver with startup circuit
US9111600B2 (en) * 2012-03-30 2015-08-18 Intel Corporation Memory cell with improved write margin
KR20140000010A (ko) 2012-06-22 2014-01-02 삼성전자주식회사 반도체 메모리 장치
US9153304B2 (en) 2012-06-28 2015-10-06 Jaydeep P. Kulkarni Apparatus for reducing write minimum supply voltage for memory
US20140112429A1 (en) * 2012-10-23 2014-04-24 Apple Inc. Low Voltage Register File Cell Structure
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US9135987B2 (en) * 2013-07-01 2015-09-15 Internatinal Business Machines Corporation FinFET-based boosting supply voltage circuit and method

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