KR102133758B1 - 레지스터 파일 회로 및 최소 동작 공급 전압을 개선하기 위한 방법 - Google Patents

레지스터 파일 회로 및 최소 동작 공급 전압을 개선하기 위한 방법 Download PDF

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KR102133758B1
KR102133758B1 KR1020177007915A KR20177007915A KR102133758B1 KR 102133758 B1 KR102133758 B1 KR 102133758B1 KR 1020177007915 A KR1020177007915 A KR 1020177007915A KR 20177007915 A KR20177007915 A KR 20177007915A KR 102133758 B1 KR102133758 B1 KR 102133758B1
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header
gate
pfet
coupled
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KR20170063609A (ko
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프란체스코 이브라힘 아탈라
지훈 정
케이스 알란 보우만
아메이 수디르 쿨카니
제이슨 필립 마르츠로프
조슈아 랜스 푸켓
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퀄컴 인코포레이티드
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/007Register arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Power Engineering (AREA)
KR1020177007915A 2014-09-26 2015-08-04 레지스터 파일 회로 및 최소 동작 공급 전압을 개선하기 위한 방법 Active KR102133758B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/499,052 2014-09-26
US14/499,052 US9251875B1 (en) 2014-09-26 2014-09-26 Register file circuit and method for improving the minimum operating supply voltage
PCT/US2015/043602 WO2016048455A1 (en) 2014-09-26 2015-08-04 Register file circuit and method for improving the minimum operating supply voltage

Publications (2)

Publication Number Publication Date
KR20170063609A KR20170063609A (ko) 2017-06-08
KR102133758B1 true KR102133758B1 (ko) 2020-07-14

Family

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KR1020177007915A Active KR102133758B1 (ko) 2014-09-26 2015-08-04 레지스터 파일 회로 및 최소 동작 공급 전압을 개선하기 위한 방법

Country Status (6)

Country Link
US (1) US9251875B1 (enExample)
EP (1) EP3198608B1 (enExample)
JP (1) JP6668337B2 (enExample)
KR (1) KR102133758B1 (enExample)
CN (1) CN106716541B (enExample)
WO (1) WO2016048455A1 (enExample)

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Publication number Priority date Publication date Assignee Title
JP5317900B2 (ja) 2009-09-14 2013-10-16 ルネサスエレクトロニクス株式会社 半導体集積回路およびその動作方法
US10163524B2 (en) 2016-06-22 2018-12-25 Darryl G. Walker Testing a semiconductor device including a voltage detection circuit and temperature detection circuit that can be used to generate read assist and/or write assist in an SRAM circuit portion and method therefor
US9940999B2 (en) 2016-06-22 2018-04-10 Darryl G. Walker Semiconductor devices, circuits and methods for read and/or write assist of an SRAM circuit portion based on voltage detection and/or temperature detection circuits
US11417370B2 (en) 2020-08-12 2022-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device
RU2771447C1 (ru) * 2021-08-03 2022-05-04 Владимир Владимирович Шубин Элемент входного регистра
US11955171B2 (en) 2021-09-15 2024-04-09 Mavagail Technology, LLC Integrated circuit device including an SRAM portion having end power select circuits

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US20070206404A1 (en) * 2006-03-01 2007-09-06 Yoshinobu Yamagami Semiconductor memory device
US20130343135A1 (en) 2012-06-22 2013-12-26 Samsung Electronics Co., Ltd Semiconductor memory devices

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JP4917767B2 (ja) * 2005-07-01 2012-04-18 パナソニック株式会社 半導体記憶装置
US20070047364A1 (en) * 2005-08-31 2007-03-01 International Business Machines Corporation Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
US7313032B2 (en) * 2005-11-29 2007-12-25 International Business Machines Corporation SRAM voltage control for improved operational margins
US20070242498A1 (en) * 2006-04-13 2007-10-18 Anantha Chandrakasan Sub-threshold static random access memory
KR100780750B1 (ko) * 2006-05-11 2007-11-30 한국과학기술원 표준 셀과 파워 게이팅 셀을 이용한 파워 네트워크 및 이를가지는 반도체 장치
US7542329B2 (en) * 2006-07-19 2009-06-02 International Business Machines Corporation Virtual power rails for integrated circuits
US7692130B2 (en) * 2006-11-01 2010-04-06 International Business Machines Corporation CMOS imaging sensor having a third FET device with a gate terminal coupled to a second diffusion region of a first FET device and a first terminal coupled to a row select signal
US7414878B1 (en) * 2007-05-04 2008-08-19 International Business Machines Corporation Method for implementing domino SRAM leakage current reduction
JP2009076164A (ja) * 2007-09-21 2009-04-09 Fujitsu Microelectronics Ltd 半導体記憶装置
US7551508B2 (en) * 2007-11-16 2009-06-23 International Business Machines Corporation Energy efficient storage device using per-element selectable power supply voltages
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JP5200506B2 (ja) * 2007-11-28 2013-06-05 富士通セミコンダクター株式会社 メモリ装置
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TWI419162B (zh) * 2009-11-03 2013-12-11 Univ Hsiuping Sci & Tech 具放電路徑之單埠靜態隨機存取記憶體
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JP2002042476A (ja) * 2000-07-25 2002-02-08 Mitsubishi Electric Corp スタティック型半導体記憶装置
US20070206404A1 (en) * 2006-03-01 2007-09-06 Yoshinobu Yamagami Semiconductor memory device
US20130343135A1 (en) 2012-06-22 2013-12-26 Samsung Electronics Co., Ltd Semiconductor memory devices

Also Published As

Publication number Publication date
EP3198608B1 (en) 2019-11-06
EP3198608A1 (en) 2017-08-02
JP6668337B2 (ja) 2020-03-18
WO2016048455A1 (en) 2016-03-31
CN106716541B (zh) 2021-06-04
JP2017529644A (ja) 2017-10-05
CN106716541A (zh) 2017-05-24
US9251875B1 (en) 2016-02-02
KR20170063609A (ko) 2017-06-08

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