JP2017520910A - 先進的金属−窒化物−酸化物−シリコン複数回プログラム可能メモリ - Google Patents

先進的金属−窒化物−酸化物−シリコン複数回プログラム可能メモリ Download PDF

Info

Publication number
JP2017520910A
JP2017520910A JP2016567094A JP2016567094A JP2017520910A JP 2017520910 A JP2017520910 A JP 2017520910A JP 2016567094 A JP2016567094 A JP 2016567094A JP 2016567094 A JP2016567094 A JP 2016567094A JP 2017520910 A JP2017520910 A JP 2017520910A
Authority
JP
Japan
Prior art keywords
mnos
gate
mtp
fet
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016567094A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017520910A5 (enExample
Inventor
シア・リ
ジョンゼ・ワン
ダニエル・ウェイン・ペリー
Original Assignee
クアルコム,インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by クアルコム,インコーポレイテッド filed Critical クアルコム,インコーポレイテッド
Publication of JP2017520910A publication Critical patent/JP2017520910A/ja
Publication of JP2017520910A5 publication Critical patent/JP2017520910A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/691IGFETs having charge trapping gate insulators, e.g. MNOS transistors having more than two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/696IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having at least one additional gate, e.g. program gate, erase gate or select gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/697IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having trapping at multiple separated sites, e.g. multi-particles trapping sites
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/037Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2016567094A 2014-05-16 2015-05-14 先進的金属−窒化物−酸化物−シリコン複数回プログラム可能メモリ Pending JP2017520910A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/280,213 2014-05-16
US14/280,213 US9461055B2 (en) 2014-05-16 2014-05-16 Advanced metal-nitride-oxide-silicon multiple-time programmable memory
PCT/US2015/030891 WO2015175834A1 (en) 2014-05-16 2015-05-14 Advanced metal-nitride-oxide-silicon multiple-time programmable memory

Publications (2)

Publication Number Publication Date
JP2017520910A true JP2017520910A (ja) 2017-07-27
JP2017520910A5 JP2017520910A5 (enExample) 2018-06-07

Family

ID=53276294

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016567094A Pending JP2017520910A (ja) 2014-05-16 2015-05-14 先進的金属−窒化物−酸化物−シリコン複数回プログラム可能メモリ

Country Status (5)

Country Link
US (1) US9461055B2 (enExample)
EP (1) EP3143639A1 (enExample)
JP (1) JP2017520910A (enExample)
CN (1) CN106256022B (enExample)
WO (1) WO2015175834A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210129562A (ko) * 2020-04-17 2021-10-28 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 스페이서 내에 에어 보이드를 갖는 반도체 디바이스

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150214331A1 (en) * 2014-01-30 2015-07-30 Globalfoundries Inc. Replacement metal gate including dielectric gate material
US9461055B2 (en) * 2014-05-16 2016-10-04 Qualcomm Incorporated Advanced metal-nitride-oxide-silicon multiple-time programmable memory
JP5982055B1 (ja) * 2015-12-18 2016-08-31 株式会社フローディア メモリセル、不揮発性半導体記憶装置、および不揮発性半導体記憶装置の製造方法
CN105702737B (zh) 2016-02-05 2019-01-18 中国科学院微电子研究所 连接有负电容的多栅FinFET及其制造方法及电子设备
US9953977B1 (en) 2017-04-13 2018-04-24 International Business Machines Corporation FinFET semiconductor device
US10903217B2 (en) * 2019-01-18 2021-01-26 Globalfoundries Singapore Pte. Ltd. Anti-fuse memory cell and a method for forming the anti-fuse memory cell
CN117320452B (zh) * 2023-11-29 2024-04-05 合肥晶合集成电路股份有限公司 多次可编程器件及其制备方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164446A (ja) * 2000-09-12 2002-06-07 Sony Corp 不揮発性半導体記憶装置、動作方法および製造方法
JP2011060997A (ja) * 2009-09-10 2011-03-24 Renesas Electronics Corp 不揮発性半導体記憶装置、及びその製造方法
JP2014049460A (ja) * 2012-08-29 2014-03-17 Renesas Electronics Corp 不揮発性半導体記憶装置及びその製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1291491C (zh) * 2002-11-12 2006-12-20 旺宏电子股份有限公司 半导体元件及其制作方法
KR100843244B1 (ko) 2007-04-19 2008-07-02 삼성전자주식회사 반도체 소자 및 그 제조 방법
US20050093057A1 (en) * 2003-11-03 2005-05-05 Fu-Chia Shone Common spacer dual gate memory cell and method for forming a nonvolatile memory array
DE102004031385B4 (de) 2004-06-29 2010-12-09 Qimonda Ag Verfahren zur Herstellung von Stegfeldeffekttransistoren in einer DRAM-Speicherzellenanordnung, Feldeffekttransistoren mit gekrümmtem Kanal und DRAM-Speicherzellenanordnung
JP2006060030A (ja) * 2004-08-20 2006-03-02 Renesas Technology Corp 半導体記憶装置
US8026553B2 (en) 2007-05-10 2011-09-27 Kabushiki Kaisha Toshiba Semiconductor memory device and manufacturing method thereof
JP2011040458A (ja) 2009-08-07 2011-02-24 Renesas Electronics Corp 半導体装置およびその製造方法
JP5538024B2 (ja) * 2010-03-29 2014-07-02 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
US8466027B2 (en) 2011-09-08 2013-06-18 Taiwan Semiconductor Manufacturing Company, Ltd. Silicide formation and associated devices
US9461055B2 (en) * 2014-05-16 2016-10-04 Qualcomm Incorporated Advanced metal-nitride-oxide-silicon multiple-time programmable memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164446A (ja) * 2000-09-12 2002-06-07 Sony Corp 不揮発性半導体記憶装置、動作方法および製造方法
JP2011060997A (ja) * 2009-09-10 2011-03-24 Renesas Electronics Corp 不揮発性半導体記憶装置、及びその製造方法
JP2014049460A (ja) * 2012-08-29 2014-03-17 Renesas Electronics Corp 不揮発性半導体記憶装置及びその製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210129562A (ko) * 2020-04-17 2021-10-28 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 스페이서 내에 에어 보이드를 갖는 반도체 디바이스
US11404537B2 (en) 2020-04-17 2022-08-02 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device with air-void in spacer
KR102453508B1 (ko) * 2020-04-17 2022-10-11 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 스페이서 내에 에어 보이드를 갖는 반도체 디바이스
US12027581B2 (en) 2020-04-17 2024-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with air-void in spacer

Also Published As

Publication number Publication date
CN106256022B (zh) 2019-10-18
CN106256022A (zh) 2016-12-21
EP3143639A1 (en) 2017-03-22
WO2015175834A1 (en) 2015-11-19
US9461055B2 (en) 2016-10-04
US20150333072A1 (en) 2015-11-19

Similar Documents

Publication Publication Date Title
JP2017520910A (ja) 先進的金属−窒化物−酸化物−シリコン複数回プログラム可能メモリ
US11672124B2 (en) High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memory
US9406689B2 (en) Logic finFET high-K/conductive gate embedded multiple time programmable flash memory
US9484352B2 (en) Method for forming a split-gate flash memory cell device with a low power logic device
US9184252B2 (en) Flash memory embedded with HKMG technology
TWI613797B (zh) 單層多晶矽非揮發性記憶體元件
CN106537605B (zh) 非易失性多次可编程存储器器件
US7551494B2 (en) Single-poly non-volatile memory device and its operation method
US9735245B2 (en) Recessed salicide structure to integrate a flash memory device with a high κ, metal gate logic device
CN104517969A (zh) 非挥发性存储器单元及非挥发性存储器单元的制作方法
CN101243554A (zh) 使用高k电介质中的空穴捕集的存储器
TW201301485A (zh) 具有雙功能的非揮發性半導體記憶單元
US20170125425A1 (en) Non-volatile memory and manufacturing method thereof
US20200194588A1 (en) Asymmetric transistors and related devices and methods
CN108155190A (zh) 非易失性存储器件及其制造方法
US8921916B2 (en) Single poly electrically erasable programmable read only memory (single poly EEPROM) device
US6740556B1 (en) Method for forming EPROM with low leakage
JP3998098B2 (ja) 半導体記憶装置
US9799668B2 (en) Memory cell having isolated charge sites and method of fabricating same
US20070077707A1 (en) Non volatile memory device and method of manufacturing the same

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20161117

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180419

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20180419

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20190514

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20190520

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20191209