JP2017517154A5 - - Google Patents

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Publication number
JP2017517154A5
JP2017517154A5 JP2016569994A JP2016569994A JP2017517154A5 JP 2017517154 A5 JP2017517154 A5 JP 2017517154A5 JP 2016569994 A JP2016569994 A JP 2016569994A JP 2016569994 A JP2016569994 A JP 2016569994A JP 2017517154 A5 JP2017517154 A5 JP 2017517154A5
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JP
Japan
Prior art keywords
register
integrated circuit
layer
polysilicon
dummy
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JP2016569994A
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English (en)
Japanese (ja)
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JP2017517154A (ja
JP6600318B2 (ja
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Priority claimed from US14/287,434 external-priority patent/US9202859B1/en
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Publication of JP2017517154A publication Critical patent/JP2017517154A/ja
Publication of JP2017517154A5 publication Critical patent/JP2017517154A5/ja
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Publication of JP6600318B2 publication Critical patent/JP6600318B2/ja
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JP2016569994A 2014-05-27 2015-05-27 ウェルレジスタ及びポリシリコンレジスタ Active JP6600318B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/287,434 US9202859B1 (en) 2014-05-27 2014-05-27 Well resistors and polysilicon resistors
US14/287,434 2014-05-27
PCT/US2015/032690 WO2015183964A1 (en) 2014-05-27 2015-05-27 Well resistors and polysilicon resistors

Publications (3)

Publication Number Publication Date
JP2017517154A JP2017517154A (ja) 2017-06-22
JP2017517154A5 true JP2017517154A5 (enrdf_load_stackoverflow) 2018-06-21
JP6600318B2 JP6600318B2 (ja) 2019-10-30

Family

ID=54609336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016569994A Active JP6600318B2 (ja) 2014-05-27 2015-05-27 ウェルレジスタ及びポリシリコンレジスタ

Country Status (4)

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US (2) US9202859B1 (enrdf_load_stackoverflow)
JP (1) JP6600318B2 (enrdf_load_stackoverflow)
CN (1) CN106463505B (enrdf_load_stackoverflow)
WO (1) WO2015183964A1 (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9202859B1 (en) * 2014-05-27 2015-12-01 Texas Instruments Incorporated Well resistors and polysilicon resistors
JP2016040814A (ja) * 2014-08-13 2016-03-24 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US10879106B2 (en) * 2018-02-21 2020-12-29 Texas Instruments Incorporated Apparatus with overlapping deep trench and shallow trench and method of fabricating the same with low defect density
CN110265294B (zh) * 2019-06-17 2021-06-15 武汉新芯集成电路制造有限公司 一种提高浮栅厚度均匀性的方法及一种半导体结构
US10985244B2 (en) * 2019-06-25 2021-04-20 Globalfoundries U.S. Inc. N-well resistor
US11637173B2 (en) * 2020-09-29 2023-04-25 Globalfoundries U.S. Inc. Structure including polycrystalline resistor with dopant-including polycrystalline region thereunder
CN114823842A (zh) * 2021-01-21 2022-07-29 中芯北方集成电路制造(北京)有限公司 半导体结构及其形成方法
US20230038119A1 (en) * 2021-08-03 2023-02-09 Mediatek Inc. Semiconductor device with improved matching characteristics of polysilicon resistive structures

Family Cites Families (20)

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Publication number Priority date Publication date Assignee Title
JPS57100755A (en) * 1980-12-15 1982-06-23 Fujitsu Ltd Semiconductor device
US6103592A (en) * 1997-05-01 2000-08-15 International Business Machines Corp. Manufacturing self-aligned polysilicon fet devices isolated with maskless shallow trench isolation and gate conductor fill technology with active devices and dummy doped regions formed in mesas
US6555476B1 (en) * 1997-12-23 2003-04-29 Texas Instruments Incorporated Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric
US6121078A (en) * 1998-09-17 2000-09-19 International Business Machines Corporation Integrated circuit planarization and fill biasing design method
US6528389B1 (en) * 1998-12-17 2003-03-04 Lsi Logic Corporation Substrate planarization with a chemical mechanical polishing stop layer
US6444581B1 (en) * 1999-07-15 2002-09-03 International Business Machines Corporation AB etch endpoint by ABFILL compensation
JP2002158278A (ja) * 2000-11-20 2002-05-31 Hitachi Ltd 半導体装置およびその製造方法ならびに設計方法
US7172948B2 (en) * 2004-01-20 2007-02-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method to avoid a laser marked area step height
US7304354B2 (en) * 2004-02-17 2007-12-04 Silicon Space Technology Corp. Buried guard ring and radiation hardened isolation structures and fabrication methods
JP4744103B2 (ja) * 2004-06-28 2011-08-10 富士通セミコンダクター株式会社 抵抗素子を含む半導体装置及びその製造方法
US7141831B1 (en) * 2004-07-28 2006-11-28 National Semiconductor Corporation Snapback clamp having low triggering voltage for ESD protection
JP4811988B2 (ja) * 2005-03-23 2011-11-09 セイコーインスツル株式会社 半導体装置
US7403094B2 (en) * 2005-04-11 2008-07-22 Texas Instruments Incorporated Thin film resistor and dummy fill structure and method to improve stability and reduce self-heating
US7449354B2 (en) * 2006-01-05 2008-11-11 Fairchild Semiconductor Corporation Trench-gated FET for power device with active gate trenches and gate runner trench utilizing one-mask etch
JP2008226935A (ja) * 2007-03-09 2008-09-25 Fujitsu Ltd 半導体装置の製造方法
US20090047870A1 (en) * 2007-08-16 2009-02-19 Dupont Air Products Nanomaterials Llc Reverse Shallow Trench Isolation Process
US8618610B2 (en) * 2009-12-31 2013-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy pattern design for thermal annealing
US8536072B2 (en) * 2012-02-07 2013-09-17 United Microelectronics Corp. Semiconductor process
US9953975B2 (en) * 2013-07-19 2018-04-24 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming STI regions in integrated circuits
US9202859B1 (en) * 2014-05-27 2015-12-01 Texas Instruments Incorporated Well resistors and polysilicon resistors

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