JP2017517067A5 - - Google Patents

Download PDF

Info

Publication number
JP2017517067A5
JP2017517067A5 JP2016568911A JP2016568911A JP2017517067A5 JP 2017517067 A5 JP2017517067 A5 JP 2017517067A5 JP 2016568911 A JP2016568911 A JP 2016568911A JP 2016568911 A JP2016568911 A JP 2016568911A JP 2017517067 A5 JP2017517067 A5 JP 2017517067A5
Authority
JP
Japan
Prior art keywords
peripheral
microcontroller
pin
selection module
ownership
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2016568911A
Other languages
English (en)
Japanese (ja)
Other versions
JP2017517067A (ja
Filing date
Publication date
Priority claimed from US14/729,402 external-priority patent/US9921988B2/en
Application filed filed Critical
Publication of JP2017517067A publication Critical patent/JP2017517067A/ja
Publication of JP2017517067A5 publication Critical patent/JP2017517067A5/ja
Ceased legal-status Critical Current

Links

JP2016568911A 2014-06-05 2015-06-05 マルチプロセッサコアデバイスのためにデバイスピン機能性を割り当てるためのデバイスおよび方法 Ceased JP2017517067A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201462008265P 2014-06-05 2014-06-05
US62/008,265 2014-06-05
US14/729,402 2015-06-03
US14/729,402 US9921988B2 (en) 2014-06-05 2015-06-03 Device and method to assign device pin functionality for multi-processor core devices
PCT/US2015/034399 WO2015188055A1 (en) 2014-06-05 2015-06-05 Ice pin functionality for multi-processor core devices

Publications (2)

Publication Number Publication Date
JP2017517067A JP2017517067A (ja) 2017-06-22
JP2017517067A5 true JP2017517067A5 (enExample) 2018-07-05

Family

ID=53484154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016568911A Ceased JP2017517067A (ja) 2014-06-05 2015-06-05 マルチプロセッサコアデバイスのためにデバイスピン機能性を割り当てるためのデバイスおよび方法

Country Status (7)

Country Link
US (1) US9921988B2 (enExample)
EP (1) EP3152670B1 (enExample)
JP (1) JP2017517067A (enExample)
KR (1) KR20170013875A (enExample)
CN (1) CN106415524B (enExample)
TW (1) TW201610707A (enExample)
WO (1) WO2015188055A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9921982B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin ownership for multi-processor core devices
CN106791152B (zh) * 2016-12-30 2019-08-27 Oppo广东移动通信有限公司 一种通信方法及移动终端
US10353815B2 (en) 2017-05-26 2019-07-16 Microsoft Technology Licensing, Llc Data security for multiple banks of memory
US10346345B2 (en) 2017-05-26 2019-07-09 Microsoft Technology Licensing, Llc Core mapping
US10587575B2 (en) 2017-05-26 2020-03-10 Microsoft Technology Licensing, Llc Subsystem firewalls
US11144487B1 (en) 2020-03-18 2021-10-12 Microsoft Technology Licensing, Llc Method to overload hardware pin for improved system management
US11755785B2 (en) 2020-08-03 2023-09-12 Nxp Usa, Inc. System and method of limiting access of processors to hardware resources
US11886370B2 (en) * 2022-05-13 2024-01-30 Advanced Micro Devices, Inc. Sharing package pins in a multi-chip module (MCM)

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6496880B1 (en) 1999-08-26 2002-12-17 Agere Systems Inc. Shared I/O ports for multi-core designs
JP2002032355A (ja) * 2000-07-17 2002-01-31 Fujitsu Ltd マイクロコンピュータ
US7199607B2 (en) * 2004-12-22 2007-04-03 Infineon Technologies Ag Pin multiplexing
CN100570591C (zh) * 2007-09-29 2009-12-16 中兴通讯股份有限公司 终端芯片管脚复用装置
US8269524B2 (en) * 2010-04-27 2012-09-18 Atmel Corporation General purpose input/output pin mapping
US9021284B2 (en) 2011-09-08 2015-04-28 Infineon Technologies Ag Standby operation with additional micro-controller
US9904646B2 (en) * 2011-09-27 2018-02-27 Microchip Technology Incorporated Virtual general purpose input/output for a microcontroller
CN103678226A (zh) * 2012-09-24 2014-03-26 炬力集成电路设计有限公司 一种芯片的通用输入输出gpio端口复用电路及方法
US9921982B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin ownership for multi-processor core devices
US10102050B2 (en) * 2015-02-05 2018-10-16 Microchip Technology Incorporated System and method for generating cross-core breakpoints in a multi-core microcontroller
US10002103B2 (en) * 2015-03-13 2018-06-19 Microchip Technology Incorporated Low-pin microcontroller device with multiple independent microcontrollers
US10002102B2 (en) * 2015-03-13 2018-06-19 Microchip Technology Incorporated Low-pin microcontroller device with multiple independent microcontrollers

Similar Documents

Publication Publication Date Title
JP2017517067A5 (enExample)
US9921988B2 (en) Device and method to assign device pin functionality for multi-processor core devices
JP7599514B2 (ja) 集積回路パッケージへのプログラマブルデバイスおよび処理システムの集積
US10990556B2 (en) Programmable logic device with on-chip user non-volatile memory
KR102544392B1 (ko) 이기종 멀티프로세서 시스템에서의 프로세서간 인터럽트를 위한 메커니즘
TWI620071B (zh) 一微控制器之虛擬通用輸入/輸出
JP6113964B2 (ja) 動的ポート優先割当能力を有しているメモリコントローラー
JP6660374B2 (ja) プログラマブル論理のためのメモリの仮想化
JP2018518773A (ja) イベント発生装置
US20140173147A1 (en) Trigger routing unit
WO2016149086A3 (en) Microcontroller device with multiple independent microcontrollers
JP2018512662A5 (enExample)
CN107430565A (zh) 具有多个独立微控制器的低接脚微控制器装置
WO2015181533A3 (en) Manufacturing methods
US8547136B1 (en) Logic block protection system
TWI649654B (zh) 用於多處理器核心裝置分配裝置引腳所有權之裝置及方法
US9244867B1 (en) Memory controller interface with adjustable port widths
CN110678866A (zh) 子系统防火墙
JP6488683B2 (ja) Ｆｐｇａ用ｉｃ基板
RU155550U1 (ru) Вычислительный модуль (варианты)
US9645830B2 (en) On-chip circuitry for configuring peripherals of a system on a chip
CN202083778U (zh) 一种集成电路
TW200615843A (en) In-circuit configuration architecture for embedded configurable logic array