CN106415524B - 用于为多处理器核心装置指派装置引脚功能的装置及方法 - Google Patents

用于为多处理器核心装置指派装置引脚功能的装置及方法 Download PDF

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CN106415524B
CN106415524B CN201580029699.7A CN201580029699A CN106415524B CN 106415524 B CN106415524 B CN 106415524B CN 201580029699 A CN201580029699 A CN 201580029699A CN 106415524 B CN106415524 B CN 106415524B
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peripheral
pin
microcontrollers
microcontroller
embedded device
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Chinese (zh)
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CN106415524A (zh
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布赖恩·克里斯
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Microchip Technology Inc
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Microchip Technology Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22—Means for limiting or controlling the pin/gate ratio
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/287—Multiplexed DMA

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
CN201580029699.7A 2014-06-05 2015-06-05 用于为多处理器核心装置指派装置引脚功能的装置及方法 Active CN106415524B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201462008265P 2014-06-05 2014-06-05
US62/008,265 2014-06-05
US14/729,402 2015-06-03
US14/729,402 US9921988B2 (en) 2014-06-05 2015-06-03 Device and method to assign device pin functionality for multi-processor core devices
PCT/US2015/034399 WO2015188055A1 (en) 2014-06-05 2015-06-05 Ice pin functionality for multi-processor core devices

Publications (2)

Publication Number Publication Date
CN106415524A CN106415524A (zh) 2017-02-15
CN106415524B true CN106415524B (zh) 2020-10-09

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CN201580029699.7A Active CN106415524B (zh) 2014-06-05 2015-06-05 用于为多处理器核心装置指派装置引脚功能的装置及方法

Country Status (7)

Country Link
US (1) US9921988B2 (enExample)
EP (1) EP3152670B1 (enExample)
JP (1) JP2017517067A (enExample)
KR (1) KR20170013875A (enExample)
CN (1) CN106415524B (enExample)
TW (1) TW201610707A (enExample)
WO (1) WO2015188055A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9921982B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin ownership for multi-processor core devices
CN106791152B (zh) * 2016-12-30 2019-08-27 Oppo广东移动通信有限公司 一种通信方法及移动终端
US10353815B2 (en) 2017-05-26 2019-07-16 Microsoft Technology Licensing, Llc Data security for multiple banks of memory
US10587575B2 (en) 2017-05-26 2020-03-10 Microsoft Technology Licensing, Llc Subsystem firewalls
US10346345B2 (en) 2017-05-26 2019-07-09 Microsoft Technology Licensing, Llc Core mapping
US11144487B1 (en) 2020-03-18 2021-10-12 Microsoft Technology Licensing, Llc Method to overload hardware pin for improved system management
US11755785B2 (en) 2020-08-03 2023-09-12 Nxp Usa, Inc. System and method of limiting access of processors to hardware resources
US11886370B2 (en) * 2022-05-13 2024-01-30 Advanced Micro Devices, Inc. Sharing package pins in a multi-chip module (MCM)

Citations (5)

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Publication number Priority date Publication date Assignee Title
JP2002032355A (ja) * 2000-07-17 2002-01-31 Fujitsu Ltd マイクロコンピュータ
US6496880B1 (en) * 1999-08-26 2002-12-17 Agere Systems Inc. Shared I/O ports for multi-core designs
CN101136005A (zh) * 2007-09-29 2008-03-05 中兴通讯股份有限公司 终端芯片管脚复用装置
CN103678226A (zh) * 2012-09-24 2014-03-26 炬力集成电路设计有限公司 一种芯片的通用输入输出gpio端口复用电路及方法
CN104011697A (zh) * 2011-09-27 2014-08-27 密克罗奇普技术公司 微控制器的虚拟通用输入/输出

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7199607B2 (en) * 2004-12-22 2007-04-03 Infineon Technologies Ag Pin multiplexing
US8269524B2 (en) * 2010-04-27 2012-09-18 Atmel Corporation General purpose input/output pin mapping
US9021284B2 (en) 2011-09-08 2015-04-28 Infineon Technologies Ag Standby operation with additional micro-controller
US9921982B2 (en) * 2014-06-05 2018-03-20 Microchip Technology Incorporated Device and method to assign device pin ownership for multi-processor core devices
US10102050B2 (en) * 2015-02-05 2018-10-16 Microchip Technology Incorporated System and method for generating cross-core breakpoints in a multi-core microcontroller
US10002103B2 (en) * 2015-03-13 2018-06-19 Microchip Technology Incorporated Low-pin microcontroller device with multiple independent microcontrollers
US10002102B2 (en) * 2015-03-13 2018-06-19 Microchip Technology Incorporated Low-pin microcontroller device with multiple independent microcontrollers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6496880B1 (en) * 1999-08-26 2002-12-17 Agere Systems Inc. Shared I/O ports for multi-core designs
JP2002032355A (ja) * 2000-07-17 2002-01-31 Fujitsu Ltd マイクロコンピュータ
CN101136005A (zh) * 2007-09-29 2008-03-05 中兴通讯股份有限公司 终端芯片管脚复用装置
CN104011697A (zh) * 2011-09-27 2014-08-27 密克罗奇普技术公司 微控制器的虚拟通用输入/输出
CN103678226A (zh) * 2012-09-24 2014-03-26 炬力集成电路设计有限公司 一种芯片的通用输入输出gpio端口复用电路及方法

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Publication number Publication date
US20150356039A1 (en) 2015-12-10
JP2017517067A (ja) 2017-06-22
TW201610707A (zh) 2016-03-16
US9921988B2 (en) 2018-03-20
CN106415524A (zh) 2017-02-15
EP3152670B1 (en) 2024-08-14
KR20170013875A (ko) 2017-02-07
WO2015188055A1 (en) 2015-12-10
EP3152670A1 (en) 2017-04-12

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